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* Blackfin arch: setup aliases for some core Core A MMRsMike Frysinger2007-07-24
| | | | | | | | | setup aliases for some core Core A MMRs to ease porting in cases where common code would actually want Core A (or Core B MMR is reserved) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: clean up some coding style issuesBryan Wu2007-07-12
| | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Add Support for Peripheral PortMux and resouce allocationMichael Hennerich2007-07-12
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add missing implementations SIC_IWR crosses several registersMichael Hennerich2007-06-20
| | | | | | | | | | SIC_IWR crosses several registers - add missing implementations - make sure SIC_IWR is SET after boot Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: initial supporting for BF548-EZKITRoy Huang2007-07-12
| | | | | | | | | | | | | | | | | The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add missing braces around array bfin serial initMike Frysinger2007-06-20
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: update blackfin header files to latest one in VDSP.Bryan Wu2007-05-21
| | | | | | | | | | | | a) add new processor BF52x/BF54x header files b) update blackfin BF533/BF537/BF561 header files to latest one in VDSP. c) scrub watchdog/rtc masks from headers as we dont need/want them (too generic and the drivers dont use them) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Blackfin arch: Move write to VR_CTL closer to IDLEMichael Hennerich2007-05-21
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* blackfin architectureBryan Wu2007-05-07
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>