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* driver core: add devname module aliases to allow module on-demand auto-loadingKay Sievers2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds: alias: devname:<name> to some common kernel modules, which will allow the on-demand loading of the kernel module when the device node is accessed. Ideally all these modules would be compiled-in, but distros seems too much in love with their modularization that we need to cover the common cases with this new facility. It will allow us to remove a bunch of pretty useless init scripts and modprobes from init scripts. The static device node aliases will be carried in the module itself. The program depmod will extract this information to a file in the module directory: $ cat /lib/modules/2.6.34-00650-g537b60d-dirty/modules.devname # Device nodes to trigger on-demand module loading. microcode cpu/microcode c10:184 fuse fuse c10:229 ppp_generic ppp c108:0 tun net/tun c10:200 dm_mod mapper/control c10:235 Udev will pick up the depmod created file on startup and create all the static device nodes which the kernel modules specify, so that these modules get automatically loaded when the device node is accessed: $ /sbin/udevd --debug ... static_dev_create_from_modules: mknod '/dev/cpu/microcode' c10:184 static_dev_create_from_modules: mknod '/dev/fuse' c10:229 static_dev_create_from_modules: mknod '/dev/ppp' c108:0 static_dev_create_from_modules: mknod '/dev/net/tun' c10:200 static_dev_create_from_modules: mknod '/dev/mapper/control' c10:235 udev_rules_apply_static_dev_perms: chmod '/dev/net/tun' 0666 udev_rules_apply_static_dev_perms: chmod '/dev/fuse' 0666 A few device nodes are switched to statically allocated numbers, to allow the static nodes to work. This might also useful for systems which still run a plain static /dev, which is completely unsafe to use with any dynamic minor numbers. Note: The devname aliases must be limited to the *common* and *single*instance* device nodes, like the misc devices, and never be used for conceptually limited systems like the loop devices, which should rather get fixed properly and get a control node for losetup to talk to, instead of creating a random number of device nodes in advance, regardless if they are ever used. This facility is to hide the mess distros are creating with too modualized kernels, and just to hide that these modules are not compiled-in, and not to paper-over broken concepts. Thanks! :) Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: David S. Miller <davem@davemloft.net> Cc: Miklos Szeredi <miklos@szeredi.hu> Cc: Chris Mason <chris.mason@oracle.com> Cc: Alasdair G Kergon <agk@redhat.com> Cc: Tigran Aivazian <tigran@aivazian.fsnet.co.uk> Cc: Ian Kent <raven@themaw.net> Signed-Off-By: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-05-25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (103 commits) ARM: 6141/1: Add audio support part in arch/arm/mach-w90x900 ARM: 5939/1: ARM: Add option CMDLINE_FORCE to force usage of the in-kernel cmdline ARM: 6140/1: silence a bogus sparse warning in unwind.c ARM: mach-at91: duplicated include ARM: arch/arm/nwfpe/fpsr.h: Checkpatch cleanup ARM: arch/arm/mach-shark/pci.c: Checkpatch cleanup ARM: arch/arm/nwfpe/ChangeLog: Checkpatch cleanup ARM: arch/arm/mach-sa1100/leds.c: Checkpatch cleanup ARM: arch/arm/mach-h720x/common.h: Checkpatch cleanup ARM: arch/arm/mach-footbridge/ebsa285-pci.c: Checkpatch cleanup ARM: arch/arm/mach-clps711x/Makefile.boot: Checkpatch cleanup ARM: arch/arm/boot/bootp/bootp.lds: Checkpatch cleanup ARM: SPEAR6xx: remove duplicated #include ARM: s3c6400_defconfig: Add NAND driver ARM: s3c6400_defconfig: enable sound as modules ARM: s3c6400_defconfig: enable power management ARM: s5pv210_defconfig: Update s5pv210_defconfig to v2.6.34 ARM: s5pc110_defconfig: Update s5pc110_defconfig to v2.6.34 ARM: s5p6442_defconfig: Update s5p6442_defconfig to v2.6.34 ARM: s5p6440_defconfig: Update s5p6440_defconfig to v2.6.34 ...
| * Merge branch 'devel-stable' into develRussell King2010-05-24
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| | * Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into ↵Russell King2010-05-20
| | |\ | | | | | | | | | | | | devel-stable
| | | * ARM: mx3: Fix a race condition in mxcmmcDaniel Mack2010-05-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From cefcdab08d1c9636c4a7290bc2bbe937d051bce4 Mon Sep 17 00:00:00 2001 From: Volker Ernst <volker.ernst@txtr.com> Date: Mon, 26 Apr 2010 22:51:07 +0200 Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc This fixes a race condition regarding interrupt bits in the SDHC controller driver code. In case of PIO-transfer it does not clear SDHC-status bit#11/12 in the INT-handler anymore. INT-handler might be called during an ongoing PIO-data-transfer (with some other INT-flag set) and PIO-transfer depends on these bits being set to detect the end of the data-transfer. This also means that at the end of PIO- transfer that PIO-software has to clear these bits itself. However in case of DMA-transfer these bits have to be cleared in the INT-handler, because they are used to generate INTs then. Works solid, no more problems here, can transfer big files. Signed-off-by: Volker Ernst <volker.ernst@txtr.com> Acked-by: Daniel Mack <daniel@caiaq.de> Cc: Andy Green <andy@warmcat.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * mxc: Add generic USB HW initialization for MX51Dinh Nguyen2010-05-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds USB HW initializiation code to /plat-mxc/ehci.c. -Sets some specific PHY settings Renames mxc_set_usbcontrol to mxc_initialize_usb_hw. Adds new register bit defines for the USB HW on Freescale SoCs. This patch applies to 2.6.34-rc6. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Reviewed-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * ARM: MXC: mxcmmc: work around a bug in the SDHC busy line handlingDaniel Mack2010-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MX3 SoCs have a silicon bug which corrupts CRC calculation of multi-block transfers when connected SDIO peripheral doesn't drive the BUSY line as required by the specs. One way to prevent this is to only allow 1-bit transfers. Another way is playing tricks with the DMA engine, but this isn't mainline yet. So for now, we live with the performance drawback of 1-bit transfers until a nicer solution is found. This patch introduces a new host controller callback 'init_card' which is for now only called from mmc_sdio_init_card(). Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Volker Ernst <volker.ernst@txtr.com> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Michał Mirosław <mirqus@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * ARM: MXC: mxcmmc: Teach the driver SDIO operationsDaniel Mack2010-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Successfully tested on MX31 hardware using libertas SDIO peripherals. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Volker Ernst <volker.ernst@txtr.com> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Michał Mirosław <mirqus@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * ARM: MXC: mxcmmc: misc cleanupsDaniel Mack2010-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Be more verbose on error messages and add one debug message. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Volker Ernst <volker.ernst@txtr.com> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Michał Mirosław <mirqus@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * MXC: mxc_nand: support i.MX21Ivo Clarysse2010-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On i.MX21 SoCs, if the NFC_CONFIG1:NFC_INT_MASK bit is set, NFC_CONFIG2:NFC_INT always reads out zero, even if an operation is completed. This patch uses enable_irq and disable_irq_nosync instead of NFC_CONFIG1:NFC_INT_MASK to mask NFC interrupts. This allows NFC_CONFIG2:NFC_INT to also be used to detect operation completion on i.MX21. The i.MX21 NFC does not signal reset completion using NFC_CONFIG1:NFC_INT_MASK, so instead reset completion is tested by checking if NFC_CONFIG2 becomes 0. Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * MXC: mxc_nand: set NFC registers after resetIvo Clarysse2010-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows the mxc_nand driver to reset the NAND flash controller. NFC registers are (re-)set after completion of the reset, as a reset will have reverted the NFC registers to their default values. Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: 6137/1: nomadik hwrng: Add clock supportSrinidhi Kasagar2010-05-20
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the clock support to the Nomadik RNG driver Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus walleij <linus.walleij@stericsson.com> Acked-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2010-05-25
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: RDMA/nes: Fix incorrect unlock in nes_process_mac_intr() RDMA/nes: Async event for closed QP causes crash RDMA/nes: Have ethtool read hardware registers for rx/tx stats RDMA/cxgb4: Only insert sq qid in lookup table RDMA/cxgb4: Support IB_WR_READ_WITH_INV opcode RDMA/cxgb4: Set fence flag for inv-local-stag work requests RDMA/cxgb4: Update some HW limits RDMA/cxgb4: Don't limit fastreg page list depth RDMA/cxgb4: Return proper errors in fastreg mr/pbl allocation RDMA/cxgb4: Fix overflow bug in CQ arm RDMA/cxgb4: Optimize CQ overflow detection RDMA/cxgb4: CQ size must be IQ size - 2 RDMA/cxgb4: Register RDMA provider based on LLD state_change events RDMA/cxgb4: Detach from the LLD after unregistering RDMA device IB/ipath: Remove support for QLogic PCIe QLE devices IB/qib: Add new qib driver for QLogic PCIe InfiniBand adapters IB/mad: Make needlessly global mad_sendq_size/mad_recvq_size static IB/core: Allow device-specific per-port sysfs files mlx4_core: Clean up mlx4_alloc_icm() a bit mlx4_core: Fix possible chunk sg list overflow in mlx4_alloc_icm()
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| *-----. \ \ Merge branches 'cxgb4', 'misc', 'mlx4', 'nes' and 'qib' into for-nextRoland Dreier2010-05-25
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| | | | | * | | IB/ipath: Remove support for QLogic PCIe QLE devicesRalph Campbell2010-05-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ib_qib driver is taking over support for QLogic PCIe QLE devices, so remove support for them from ib_ipath. The ib_ipath driver now supports only the obsolete QLogic Hyper-Transport IB host channel adapter (model QHT7140). Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| | | | | * | | IB/qib: Add new qib driver for QLogic PCIe InfiniBand adaptersRalph Campbell2010-05-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a low-level IB driver for QLogic PCIe adapters. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| | | | | * | | IB/core: Allow device-specific per-port sysfs filesRalph Campbell2010-05-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new parameter to ib_register_device() so that low-level device drivers can pass in a pointer to a callback function that will be called for each port that is registered in sysfs. This allows low-level device drivers to create files in /sys/class/infiniband/<hca>/ports/<N>/ without having to poke through the internals of the RDMA sysfs handling. There is no need for an unregister function since the kobject reference will go to zero when ib_unregister_device() is called. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| | | | * | | | RDMA/nes: Fix incorrect unlock in nes_process_mac_intr()Chien Tung2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ce6e74f2 ("RDMA/nes: Make nesadapter->phy_lock usage consistent") introduced a problem where phy_lock was only unlocked within an if statement and so nes_process_mac_intr() could return with phy_lock still held. Fix this. This was discovered because of the sparse warning: drivers/infiniband/hw/nes/nes_hw.c:2643:9: warning: context imbalance in 'nes_process_mac_intr' - different lock contexts for basic block Reported-by: Roland Dreier <rdreier@cisco.com> Signed-off-by: Chien Tung <chien.tin.tung@intel.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| | | | * | | | RDMA/nes: Async event for closed QP causes crashFaisal Latif2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Under abnormal termination, modify_qp() closes the QP, and async event (AE) handling also attempts to close the same QP, causing a crash. Fix this by checking the state of the QP before processing the AE. Signed-off-by: Faisal Latif <faisal.latif@intel.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| | | | * | | | RDMA/nes: Have ethtool read hardware registers for rx/tx statsFaisal Latif2010-05-25
| | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhance ethtool to read hardware registers for rcv/tx error stats. Also add support for free pbl resources. Remove cq depth stats, which are not used. Signed-off-by: Faisal Latif <faisal.latif@intel.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| | | * | | | mlx4_core: Clean up mlx4_alloc_icm() a bitRoland Dreier2010-05-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Handle the allocation error case first, so that we don't have further nested if for handling the common case of success. Signed-off-by: Roland Dreier <rolandd@cisco.com>
| | | * | | | mlx4_core: Fix possible chunk sg list overflow in mlx4_alloc_icm()Sebastien Dugue2010-05-20
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the number of sg entries in the ICM chunk reaches MLX4_ICM_CHUNK_LEN, we must set chunk to NULL even for coherent mappings so that the next time through the loop will allocate another chunk. Otherwise we'll overflow the sg list the next time through the loop. This will lead to memory corruption if this case is hit. mthca does not have this bug. Signed-off-by: Sebastien Dugue <sebastien.dugue@bull.net> Cc: <stable@kernel.org> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| | * / / / IB/mad: Make needlessly global mad_sendq_size/mad_recvq_size staticRoland Dreier2010-05-24
| | |/ / / | | | | | | | | | | | | | | | Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Only insert sq qid in lookup tableSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Support IB_WR_READ_WITH_INV opcodeSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Set fence flag for inv-local-stag work requestsSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Update some HW limitsSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Don't limit fastreg page list depthSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Return proper errors in fastreg mr/pbl allocationSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Fix overflow bug in CQ armSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - wrap cq->cqidx_inc based on cq size. - optimize t4_arm_cq logic. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Optimize CQ overflow detectionSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) save the timestamp flit in the cq when we consume a CQE. 2) always compare the saved flit with the previous entry flit when reading the next CQE entry. If the flits don't compare, then we have overflowed. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: CQ size must be IQ size - 2Steve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need 1 extra entry for the status page and 1 to always have 1 free entry to detect when the queue is full. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Register RDMA provider based on LLD state_change eventsSteve Wise2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LLD now supports proper UP state change events, so move the RDMA provider registration to UP path. This fixes a crash when loading iw_cxgb4 _after_ the NFS/RDMA transport is up and running. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
| * | | | RDMA/cxgb4: Detach from the LLD after unregistering RDMA deviceSteve Wise2010-05-25
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the RDMA core unregister path, kernel users will be calling down into the T4 provider to release resources. So we cannot detach from the LLD until this process completes. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
* | | | Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2010-05-25
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next-spi' of git://git.secretlab.ca/git/linux-2.6: spi/xilinx: Fix compile error spi/davinci: Fix clock prescale factor computation spi: move bitbang txrx utility functions to private header spi/mpc5121: Add SPI master driver for MPC5121 PSC powerpc/mpc5121: move PSC FIFO memory init to platform code spi/ep93xx: implemented driver for Cirrus EP93xx SPI controller Documentation/spi/* compile warning fix spi/omap2_mcspi: Check params before dereference or use spi/omap2_mcspi: add turbo mode support spi/omap2_mcspi: change default DMA_MIN_BYTES value to 160 spi/pl022: fix stop queue procedure spi/pl022: add support for the PL023 derivate spi/pl022: fix up differences between ARM and ST versions spi/spi_mpc8xxx: Do not use map_tx_dma to unmap rx_dma spi/spi_mpc8xxx: Fix QE mode Litte Endian spi/spi_mpc8xxx: fix potential memory corruption.
| * | | | spi/xilinx: Fix compile errorGrant Likely2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 58f9b0b02414062eaff46716bc04b47d7e79add5, "of: eliminate of_device->node and dev_archdata->{of,prom}_node" changed the location of the device_node pointer. Most drivers were converted to the new location, but the xilinx_spi_of driver was missed and now fails to compile. This patch fixes up the xilinx_spi_of driver to use the new location. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | Merge remote branch 'origin' into secretlab/next-spiGrant Likely2010-05-25
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| * | | | | spi/davinci: Fix clock prescale factor computationThomas Koeller2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Computation of the clock prescaler value returned bogus results if the requested SPI clock was impossible to set. It now sets either the maximum or minimum clock frequency, as appropriate. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi: move bitbang txrx utility functions to private headerhartleys2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of files in drivers/spi fail checkincludes.pl due to the double include of <linux/spi/spi_bitbang.h>. The first include is needed to get the struct spi_bitbang definition and the spi_bitbang_* function prototypes. The second include happens after defining EXPAND_BITBANG_TXRX to get the inlined bitbang_txrx_* utility functions. The <linux/spi/spi_bitbang.h> header is also included by a number of other spi drivers, as well as some arch/ code, in order to use struct spi_bitbang and the associated functions. To fix the double include, and remove any potential confusion about it, move the inlined bitbang_txrx_* functions to a new private header in drivers/spi and also remove the need to define EXPAND_BITBANG_TXRX. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/mpc5121: Add SPI master driver for MPC5121 PSCAnatolij Gustschin2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: John Rigby <jcrigby@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | powerpc/mpc5121: move PSC FIFO memory init to platform codeAnatolij Gustschin2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since PSC could also be used in other modes than UART mode we move PSC FIFO memory initialization from serial driver to common platform code. The initialized FIFO memory slices may not overlap, so the most easy way would be to configure them all at once at init time for all PSC devices. This is now done by this patch. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/ep93xx: implemented driver for Cirrus EP93xx SPI controllerMika Westerberg2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found in EP93xx chips. Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/omap2_mcspi: Check params before dereference or useScott Ellis2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check spi->chip_select for range before use. Signed-off-by: Scott Ellis <scott@jumpnowtek.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/omap2_mcspi: add turbo mode supportRoman Tereshonkov2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Turbo mode allows to read data to shift register when rx-buffer is full thus improving the perfomance. This feature is available for RX-only mode. In PIO turbo mode when the penultimate word is available in RX-buffer the controller should be disabled before reading data to prevent the next transaction triggering. The controller itself handles the last word to be correctly loaded to shift-register and then transferred to RX-buffer. The turbo mode is enabled by setting turbo_mode parameter to 1. This parameter is a part of omap2_mcspi_device_config structure which is passed through the spi_device controller_data pointer. Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/omap2_mcspi: change default DMA_MIN_BYTES value to 160Roman Tereshonkov2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The value 160 has been obtained as optimal in testing it for wl1271 which use spi for communication. In some sense this change might also influence on other spi devices connected to omap2_mcspi controller. Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/pl022: fix stop queue procedureGrzegorz Sygieda2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fix prevents queue being marked as "stopped", if data exists in the queue list. Signed-off-by: Grzegorz Sygieda <grzegorz.sygieda@tieto.com> Signed-off-by: Lukasz Baj <lukasz.baj@tieto.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/pl022: add support for the PL023 derivateLinus Walleij2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for a further ST variant of the PL022 called PL023. Some differences in the control registers due to being stripped down to SPI mode only, and a new clock feedback sample delay config setting is available. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/pl022: fix up differences between ARM and ST versionsLinus Walleij2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PL022 SPI driver did not cleanly separate between the original unmodified ARM version and the ST Microelectronics versions. Split this more cleanly and fix some whitespace moaning from checkpatch at the same time. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/spi_mpc8xxx: Do not use map_tx_dma to unmap rx_dmaJoakim Tjernlund2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a typo were map_tx_dma is used instead of map_rx_dma, casing the driver to unmap rx_dma when it shouldn't. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | spi/spi_mpc8xxx: Fix QE mode Litte EndianJoakim Tjernlund2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QE mode uses Little Endian so words > 8 bits are byte swapped. Workaround this by always enforcing wordsize 8 for words > 8 bits. Unfortunately this will not work for LSB transfers where wordsize is > 8 bits so disable these for now. Also move the different quirks into its own function to keep mpc8xxx_spi_setup_transfer() sane. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-30 11:29:45 -0500