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* intel-gtt: consolidate fake_agp driver structsDaniel Vetter2010-09-21
| | | | | | | They're now all the same. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: move chipset flush to the gtt driver structDaniel Vetter2010-09-21
| | | | | | | This is the last differentiator between the different fake agp drivers. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: kill mask_memory functionsDaniel Vetter2010-09-21
| | | | | | | | That indirection mess can now go. Add a dummy i81x gtt_driver to avoid a NULL pointer check. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: generic (insert|remove)_entries for sandybridgeDaniel Vetter2010-09-21
| | | | | | | | Like before, but now with the added bonus of being able to kill quite a bit of no-longer userful code (the old dmar support stuff). Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: generic (insert|remove)_entries for g33/i965Daniel Vetter2010-09-21
| | | | | | | Like for the i915. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: generic (insert|remove)_entries for i915Daniel Vetter2010-09-21
| | | | | | | | | Beef up the generic version to support dmar. Otherwise like for the i830. v2: Don't try to DMA remap on resume for already remapped pages. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: generic (insert|remove)_entries for i830Daniel Vetter2010-09-21
| | | | | | | | | | | Well, not all too generic because it does not yet support dmar. Add a new function check_flags to ensure that non-gem code does not try to screw us over. v2: Beautify i830_check_flags with an idea from Chris Wilson. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* agp: kill agp_(map|unmap)_pageDaniel Vetter2010-09-21
| | | | | | | | | Only used to remap the scratch page. Now that intel-gtt does this itself, kill the support code. Cc: Dave Airlie <airlied@linux.ie> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: drop agp scratch page support stuffDaniel Vetter2010-09-21
| | | | | | | | intel-gtt.c now handles the scratch page itself, so drop all that was just there to support it. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: introduce pte write function for gen6Daniel Vetter2010-09-21
| | | | | | | Like for i830. intel_i9xx_configure is now unused, so kill it. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: introduce pte write function for g33/i965/gm45Daniel Vetter2010-09-21
| | | | | | | Like for the i830. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: introduce pte write function for i8xx/i915/i945Daniel Vetter2010-09-21
| | | | | | | | | And put it to use in the gtt configuration code that writes the scratch page addr in all gtt ptes. This makes intel_i830_configure generic, hence rename it to intel_fake_agp_configure. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* intel-gtt: initialize our own scratch pageDaniel Vetter2010-09-21
| | | | | | | | | | | | | | | | | | The intel gtt fake agp driver is the only agp driver to use dma address remapping. So it makes sense to fold this code back into the only user (and thus reduce the reliance on the agp code). This patch does the first step by initializing (and remapping) the scratch page in a new function intel_gtt_setup_scratch_page. Unfortunately intel_gtt_cleanup had to move to avoid a forward declaration. The new scratch page is not yet used, though. v2: Refactor out scratch page teardown. Suggested by Chris Wilson on irc. This makes it clear what's going on and results in a nice symmetry between setup and teardown. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Track pinned objectsChris Wilson2010-09-21
| | | | | | | | Keep a list of pinned objects and display it via debugfs. Now all objects that exist in the GTT are always tracked on one of the active, flushing, inactive or pinned lists. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Drain any pending flips on the fb prior to unpinningChris Wilson2010-09-21
| | | | | | | | If we have queued a page flip on the current fb and then request a mode change, wait until the page flip completes before performing the new request. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Merge ring flushing and lazy requestsChris Wilson2010-09-21
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Track gpu fence usageChris Wilson2010-09-21
| | | | | | | | Track if the gpu requires the fence for the execution of a batch buffer and so only wait upon the retirement of the object's last rendering seqno if the fence is in use by the GPU. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/ringbuffer: whitespace cleanupChris Wilson2010-09-21
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: drop alignment ringbuffer parameterDaniel Vetter2010-09-21
| | | | | | | Always PAGE_SIZE and only complicates the code. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: don't explicitly initialize ringbuffer members to zeroDaniel Vetter2010-09-21
| | | | | | | The compiler happily does that for us. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: use new macros to access the ring ctl registerDaniel Vetter2010-09-21
| | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: use new macros to access the ring head registerDaniel Vetter2010-09-21
| | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: use new macros to access the ring start registerDaniel Vetter2010-09-21
| | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: use new macros to access the ring tail registerDaniel Vetter2010-09-21
| | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: add relative ring register macrosDaniel Vetter2010-09-21
| | | | | | | | | | | | Documentation explicitly mentions that the ring registers are designed to have the same offsets relative to a base registers. Use this to fight the code beaurocratic in intel_ringbuffer.c. No code changes in this patch, just the new definitions. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: kill duplicated/unneeded register definesDaniel Vetter2010-09-21
| | | | | | | | This looks like a copy-paste remnant from the i810. All the regs that are actually used are already defined somewhere else in i915_reg.h! Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Use ring->flush() instead of MI_FLUSHChris Wilson2010-09-21
| | | | | | | Use the ring abstraction to hide the details of having choose the appropriate flushing method. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/ringbuffer: Mark the initialisation structs as constant.Chris Wilson2010-09-21
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: add a new BSD ring buffer for SandybridgeXiang, Haihao2010-09-21
| | | | | | | | This ring buffer is used for video decoding/encoding on Sandybridge. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/ringbuffer: Implement advance using set_tailChris Wilson2010-09-21
| | | | | | | As noted by Zhenyu, we can now simply replace the existing advance hook by calling the new set_tail function pointer directly. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: add set_tail hook in struct intel_ring_bufferXiang, Haihao2010-09-21
| | | | | | | | | | This is prepared for video codec ring buffer on Sandybridge. It is needed to read/write more than one register to move the tail pointer of the video codec ring on Sandybridge. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: do not export the instances of struct intel_ring_bufferXiang, Haihao2010-09-21
| | | | | | | | | Introduce intel_init_render_ring_buffer(), intel_init_bsd_ring_buffer for ring initialization. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: fix HAS_BSD with a device info flagXiang, Haihao2010-09-21
| | | | | | Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Clean up bo lists on all hung gpusChris Wilson2010-09-21
| | | | | | | | | | Previously we only tidied up the active bo lists for chipsets were we would attempt to reset the GPU. However, this action is necessary for the system to continue and reclaim the dead bo for all chipsets. Pointed out, in passing, by Owain Ainsworth. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Clear GPU read domains on resetChris Wilson2010-09-21
| | | | | | | Clear the GPU read domain for the inactive objects on a reset so that they are correctly invalidated on reuse. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Clear flushing lists on GPU resetChris Wilson2010-09-21
| | | | | | | Owain Ainsworth noticed that the reset code failed to clear the flushing list leaving the driver in an inconsistent state following a hung GPU. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Only emit a flush request on the active ring.Chris Wilson2010-09-21
| | | | | | | | When flushing the GPU domains,we emit a flush on *both* rings, even though they share a unified cache. Only emit the flush on the currently active ring. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Inline i915_gem_ring_retire_request()Chris Wilson2010-09-21
| | | | | | | | | | | | Change the semantics to retire any buffer older than the current seqno rather than repeatedly calling calling the function to retire the buffer at the head of the list matching the request seqno. Whilst this should have no semantic impact on the implementation, Daniel was wondering if there was a bug where we might miss a retirement and so end up with a continually growing active list. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/debug: Dump BSD ring buffers to debugfsChris Wilson2010-09-21
| | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: After a reset perform a forced modesetChris Wilson2010-09-21
| | | | | | | | On more recent chipsets, restoring the display is not as simple as writing a few registers, so force a full modeset of the current configuration in order to retrain the display link. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Add support for GPU soft reset on Ironlake.Kenneth Graunke2010-09-21
| | | | | | | | Ironlake's graphics reset register has to be accessed via the MCHBAR, rather than via PCI config space, which requires some refactoring. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Rename graphics reset registers.Kenneth Graunke2010-09-21
| | | | | | | | | The graphics domains are listed as GRDOM in the documentation, and the GDRST PCI config register (0xc0) is only valid on I965 and GM45. Newer chips (like Sandy Bridge) have a different GDRST. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Actually set the reset bit in i965_reset.Kenneth Graunke2010-09-21
| | | | | | | | | | | | Previously, it was only being set if passed GDRST_FULL - but the only caller passed GDRST_RENDER. So the hardware never actually reset. The comments also did not match the code. Instead, just set the reset bit regardless of what flags were passed. The GPU now resets correctly on my GM45. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965gChris Wilson2010-09-21
| | | | | | | Avoid confusion between i965g meaning broadwater and the gen4+ chipset families. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Cache LVDS EDIDChris Wilson2010-09-21
| | | | | | | We assume that the panel is permenantly connected and that the EDID data is consistent from boot, so simply cache the whole EDID for the panel. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* Merge branch 'drm-intel-fixes' into HEADChris Wilson2010-09-21
|\ | | | | | | | | | | Conflicts: drivers/char/agp/intel-agp.c drivers/gpu/drm/i915/intel_crt.c
| * Merge remote branch 'linus' into drm-intel-fixesChris Wilson2010-09-21
| |\
| | * Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6Linus Torvalds2010-09-20
| | |\ | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6: Staging: vt6655: fix buffer overflow Revert: "Staging: batman-adv: Adding netfilter-bridge hooks"
| | | * Staging: vt6655: fix buffer overflowDan Carpenter2010-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "param->u.wpa_associate.wpa_ie_len" comes from the user. We should check it so that the copy_from_user() doesn't overflow the buffer. Also further down in the function, we assume that if "param->u.wpa_associate.wpa_ie_len" is set then "abyWPAIE[0]" is initialized. To make that work, I changed the test here to say that if "wpa_ie_len" is set then "wpa_ie" has to be a valid pointer or we return -EINVAL. Oddly, we only use the first element of the abyWPAIE[] array. So I suspect there may be some other issues in this function. Signed-off-by: Dan Carpenter <error27@gmail.com> Cc: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | | * Revert: "Staging: batman-adv: Adding netfilter-bridge hooks"Sven Eckelmann2010-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 96d592ed599434d2d5f339a1d282871bc6377d2c. The netfilter hook seems to be misused and may leak skbs in situations when NF_HOOK returns NF_STOLEN. It may not filter everything as expected. Also the ethernet bridge tables are not yet capable to understand batman-adv packet correctly. It was only added for testing purposes and can be removed again. Reported-by: Vasiliy Kulikov <segooon@gmail.com> Signed-off-by: Sven Eckelmann <sven.eckelmann@gmx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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