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Pull slave-dmaengine updates from Vinod Koul:
"This time we have Andy updates on dw_dmac which is attempting to make
this IP block available as PCI and platform device though not fully
complete this time.
We also have TI EDMA moving the dma driver to use dmaengine APIs, also
have a new driver for mmp-tdma, along with bunch of small updates.
Now for your excitement the merge is little unusual here, while
merging the auto merge on linux-next picks wrong choice for pl330
(drivers/dma/pl330.c) and this causes build failure. The correct
resolution is in linux-next. (DMA: PL330: Fix build error) I didn't
back merge your tree this time as you are better than me so no point
in doing that for me :)"
Fixed the pl330 conflict as in linux-next, along with trivial header
file conflicts due to changed includes.
* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits)
dma: tegra: fix interrupt name issue with apb dma.
dw_dmac: fix a regression in dwc_prep_dma_memcpy
dw_dmac: introduce software emulation of LLP transfers
dw_dmac: autoconfigure data_width or get it via platform data
dw_dmac: autoconfigure block_size or use platform data
dw_dmac: get number of channels from hardware if possible
dw_dmac: fill optional encoded parameters in register structure
dw_dmac: mark dwc_dump_chan_regs as inline
DMA: PL330: return ENOMEM instead of 0 from pl330_alloc_chan_resources
DMA: PL330: Remove redundant runtime_suspend/resume functions
DMA: PL330: Remove controller clock enable/disable
dmaengine: use kmem_cache_zalloc instead of kmem_cache_alloc/memset
DMA: PL330: Set the capability of pdm0 and pdm1 as DMA_PRIVATE
ARM: EXYNOS: Set the capability of pdm0 and pdm1 as DMA_PRIVATE
dma: tegra: use list_move_tail instead of list_del/list_add_tail
mxs/dma: Enlarge the CCW descriptor area to 4 pages
dw_dmac: utilize slave_id to pass request line
dmaengine: mmp_tdma: add dt support
dmaengine: mmp-pdma support
spi: davici - make davinci select edma
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Reported-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Removes use of the DaVinci EDMA private DMA API and replaces
it with use of the DMA engine API.
Signed-off-by: Matt Porter <mporter@ti.com>
Tested-by: Tom Rini <trini@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Pull MIPS update from Ralf Baechle:
"This is the MIPS update for 3.7.
A fair chunk of them are platform updates to the Cavium Octeon SOC
(which involves machine generated header files of considerable size),
Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx
platforms.
Support for the commercial MIPS simulator MIPSsim has been removed as
MIPS Technologies is shifting away from this product and Qemu is
offering various more powerful platforms. The generic MIPS code can
now also probe for no-execute / write-only TLB features implemented
without the full SmartMIPS extension as permitted by the latest MIPS
processor architecture. Lots of small changes to generic code."
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits)
MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs
MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x
MIPS: BCM63XX: Properly handle mac address octet overflow
MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user.
MIPS: Replace `-' in defconfig filename wth `_' for consistency.
MIPS: Wire kcmp syscall.
MIPS: MIPSsim: Remove the MIPSsim platform.
MIPS: NOTIFY_RESUME is not needed in TIF masks
MIPS: Merge the identical "return from syscall" per-ABI code
MIPS: Unobfuscate _TIF..._MASK
MIPS: Prevent hitting do_notify_resume() with !user_mode(regs).
MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.
MIPS: Add base architecture support for RI and XI.
MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.
MIPS: uasm: Add INS and EXT instructions.
MIPS: Avoid pipeline stalls on some MIPS32R2 cores.
MIPS: Make VPE count to be one-based.
MIPS: Add new end of interrupt functionality for GIC.
MIPS: Add EIC support for GIC.
MIPS: Code clean-ups for the GIC.
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mips-for-linux-next
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Add the driver, link it into the kbuild system and provide device tree
binding documentation.
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Patchwork: http://patchwork.linux-mips.org/patch/4292/
Signed-off-by: John Crispin <blogic@openwrt.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull late ARM soc platform updates from Olof Johansson:
"This branch contains updates to OMAP and Marvell platforms (kirkwood,
dove, mvebu) that came in after we had done the big multiplatform
merges, so they were kept separate from the rest, and not separated
into the traditional topics of cleanup/driver/platform features.
For OMAP, the updates are:
- Runtime PM conversions for the GPMC and RNG IP blocks
- Preparation patches for the OMAP common clock framework conversion
- clkdev alias additions required by other drivers
- Performance Monitoring Unit (PMU) support for OMAP2, 3, and
non-4430 OMAP4
- OMAP hwmod code and data improvements
- Preparation patches for the IOMMU runtime PM conversion
- Preparation patches for OMAP4 full-chip retention support
For Kirkwood/Dove/mvebu:
- New driver for "address decoder controller" for mvebu, which is a
piece of hardware that configures addressable devices and
peripherals. First user is the boot rom aperture on armada XP
since it is needed for SMP support.
- New device tree bindings for peripherals such as gpio-fan, iconnect
nand, mv_cesa and the above address decoder controller.
- Some defconfig updates, mostly to enable new DT boards and a few
drivers.
- New drivers using the pincontrol subsystem for dove, kirkwood and
mvebu
- New clean gpio driver for mvebu"
* tag 'soc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (98 commits)
ARM: mvebu: fix build breaks from multi-platform conversion
ARM: OMAP4460/4470: PMU: Enable PMU for OMAP4460/70
ARM: OMAP2+: PMU: Add runtime PM support
ARM: OMAP4430: PMU: prepare to create PMU device via HWMOD
ARM: OMAP2+: PMU: Convert OMAP2/3 devices to use HWMOD
ARM: OMAP3: hwmod data: Add debugss HWMOD data
ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems
ARM: OMAP: Add a timer attribute for timers that can interrupt the DSP
hwrng: OMAP: remove SoC restrictions from driver registration
ARM: OMAP: split OMAP1, OMAP2+ RNG device registration
hwrng: OMAP: convert to use runtime PM
hwrng: OMAP: store per-device data in per-device variables, not file statics
ARM: OMAP2xxx: hwmod/CM: add RNG integration data
ARM: OMAP2+: gpmc: minimal driver support
ARM: OMAP2+: gpmc: Adapt to HWMOD
ARM: OMAP2/3: hwmod data: add gpmc
ARM: OMAP4: hwmod data: add mmu hwmod for ipu and dsp
ARM: OMAP3: hwmod data: add mmu data for iva and isp
ARM: OMAP: iommu: fix including iommu.h without IOMMU_API selected
ARM: OMAP4: hwmod data: add missing HWMOD_NO_IDLEST flags to some PRCM IP blocks
...
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Merge in the late Kirkwood branch with the OMAP late branch for upstream
submission.
Final contents described in shared tag.
Fixup remove/change conflicts in arch/arm/mach-omap2/devices.c and
drivers/spi/spi-omap2-mcspi.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
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Remove unnecessary includes of plat/clock.h from the OMAP SPI
controller drivers. These need to be removed to build multi-subarch
ARM kernels which include these drivers.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
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Pull devicetree updates from Rob Herring:
- Import of latest upstream device tree compiler (dtc)
- New function of_get_child_by_name
- Support for #size-cells of 0 and #addr-cells of >2
- Couple of DT binding documentation updates
Fix up trivial conflicts due to of_get_child_by_name() having been added
next to the new of_get_next_available_child().
* tag 'dt-for-3.7' of git://sources.calxeda.com/kernel/linux:
MAINTAINERS: add scripts/dtc under Devicetree maintainers
dtc: import latest upstream dtc
dt: Document general interrupt controller bindings
dt/s3c64xx/spi: Use of_get_child_by_name to get a named child
dt: introduce of_get_child_by_name to get child node by name
of: i2c: add support for wakeup-source property
of/address: Handle #address-cells > 2 specially
DT: export of_irq_to_resource_table()
devicetree: serial: Add documentation for imx serial
devicetree: pwm: mxs-pwm.txt: Fix reg field annotation
of: Allow busses with #size-cells=0
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As follow-up to "dt: introduce of_get_child_by_name to get child node by
name." patch, This patch removes some of the code duplication in the
driver by replacing it with of_get_child_by_name instead.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc
Pull spi updates from Mark Brown:
"No framework work here, only a bunch of driver updates of varying
sizes:
- Factoring out of the core hardware support from the MXS MMC driver
by Marek Vasut to allow the hardware to also be used for SPI.
- Lots of error handling cleanups from Guenter Roeck
- Removal of the existing Tegra driver which is quite comprehensively
broken as detailed in the changelog for the removal.
- DT suppport for the PL022 and GPIO drivers.
- pinctrl support for OMAP and PL022."
Pulling from Mark Brown as Grant Likely is still busy moving.
* tag 'spi-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/misc: (53 commits)
spi: remove completely broken Tegra driver
spi/imx: set the inactive state of the clock according to the clock polarity
spi/pl022: get/put resources on suspend/resume
spi/pl022: use more managed resources
spi/pl022: Devicetree support w/o platform data
spi/s3c64xx: Don't free controller_data on non-dt platforms
spi: omap2-mcspi: add pinctrl support
spi/pl022: adopt pinctrl support
spi: omap2-mcspi: Cleanup the omap2_mcspi_txrx_dma function
spi/gpio: Fix stub for spi_gpio_probe_dt()
spi/mxs: Make the SPI block clock speed configurable via DT
spi: spi-sh-hspi: drop frees of devm_ alloc'd data
spi/pl022: Fix chipselects pointer computation
spi: spi-tle62x0: Use module_spi_driver macro
mxs/spi: Rework the mxs_ssp_timeout to be more readable
mxs/spi: Decrement the DMA/PIO border
mxs/spi: Increment the transfer length only if transfer succeeded
mxs/spi: Fix issues when doing long continuous transfer
spi: spi-gpio: Add DT bindings
spi: spi-gpio: store chipselect information in private structure
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The current SPI driver has many issues. Examples are:
* Segfaulting on most transfers due to expecting all transfers to have
both RX and TX buffers.
* Hanging on TX transfers since the whole driver flow is driven by RX
DMA completion, but the HW is only told to enable RX for RX transfers.
* Use of clk_disable_unprepare() from atomic context.
* Once those and other minor issues are fixed, the driver still doesn't
actually work.
* The driver also implements a deprecated API to the SPI core.
For this reason, simply remove the driver completely. This has two
advantages:
1) This will remove the last use of Tegra's <mach/dma.h>, which will
allow that file to be removed, which is required for single zImage
work.
2) The downstream driver is significaly different from the current
code. I believe a patch to re-add the downstream driver (with
appropriate cleanup) will be much simpler to review if it's a new
file rather than randomly interspered with essentially unrelated
existing code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Linux 3.6-rc6
Conflicts (overlap between moving code that accesses registers around
and factoring the register access out into a SSP layer):
drivers/mmc/host/mxs-mmc.c
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Add "clock-frequency" property, which allows configuring the SPI block's
base speed.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Rework the mxs_ssp_timeout() function to make it a bit more readable
and hopefully less error prone. Also, have only one successful exit
from the function and one failing exit instead of two.
Finally, discard the udelay() from this function altogether, as this
tightloop is quick enough it's pointless.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This driver checks the length of transfer to be made and based
on this information, either chooses to transfer data via DMA or
PIO. Decrement this border further to gain better performace eg.
during SPI flash writes.
Empiric measurement shows that this gives extra 3kB/s write speed
with a M25P80 flash clocked at 40MHz.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The transfer function incremented (struct spi_message)->actual_length
unconditionally, even if the transfer failed. Rectify this by incrementing
this only if transfer succeeded.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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When doing long continuous transfer, eg. from SPI flash via /dev/mtd,
the driver dies. This is caused by a bug in the DMA chaining. Rework
the DMA transfer code so that this issue does not happen any longer.
This involves proper allocation of correct amount of sg-list members.
Also, this means proper creation of DMA descriptors. There is actually an
important catch to this, the data transfer descriptors must be interleaved
with PIO register write descriptor, otherwise the transfer stalls. This
can be done in one descriptor, but due to the limitation of the DMA API,
it's not possible.
It turns out that in order for the SPI DMA to properly support
continuous transfers longer than 65280 bytes, there are some very
important parts that were left out from the documentation about about
the PIO transfer that is used.
Firstly, the XFER_SIZE register is not written with the whole length
of a transfer, but is written by each and every chained descriptor
with the length of the descriptors data buffer.
Next, unlike the demo code supplied by FSL, which only writes one PIO
word per descriptor, this does not apply if the descriptors are chained,
since the XFER_SIZE register must be written. Therefore, it is essential
to use four PIO words, CTRL0, CMD0, CMD1, XFER_SIZE. CMD0 and CMD1 are
written with zero, since they don't apply. The DMA programs the PIO words
in an incrementing order, so four PIO words.
Finally, unlike the demo code supplied by FSL, the SSP_CTRL0_IGNORE_CRC
must not be set during the whole transfer, but it must be set only on the
last descriptor in the chain.
Lastly, this code lends code from drivers/mtd/nand/omap2.c, which solves
trouble when the buffer supplied to the DMA transfer was vmalloc()'d. So
with this patch, it's safe to use /dev/mtdblockX interface again.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The call sequence spi_alloc_master/spi_register_master/spi_unregister_master
is complete; it reduces the device reference count to zero, which results in
device memory being freed. The remove function accesses the freed memory after
the call to spi_unregister_master(), _and_ it calls spi_master_put on the freed
memory.
Acquire a reference to the SPI master device and release it after cleanup is
complete (with the existing spi_master_put) to solve the problem.
Also, the device subsystem ensures that the remove function is only called once,
and resets device driver data to NULL. Remove the unnecessaary calls to
platform_set_drvdata().
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The init_completion() call does reinit not only the variable carrying
the flag that the completion finished, but also initialized the
waitqueue associated with the completion. On the contrary, the
INIT_COMPLETION() call only reinits the flag.
In case there was anything still stuck in the waitqueue, subsequent call
to init_completion() would be able to create possible race condition. This
patch uses the proper function and moves init_completion() into .probe() call
of the driver, to be issued only once.
Note that such scenario is impossible, since two threads can never enter the
mxs_spi_txrx_dma(), since whole this section is protected by mutex in SPI core.
This by no means allows this issue to exit though.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Restart the SSP block in case the SSP transfer failed in any way.
The block hung in some cases otherwise.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Chris Ball <cjb@laptop.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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These parts will be used by the MXS SPI driver too.
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Chris Ball <cjb@laptop.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This is slightly reworked version of the SPI driver.
Support for DT has been added and it's been converted
to queued API.
Based on previous attempt by:
Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Chris Ball <cjb@laptop.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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There are SPI devices which need a SPI clock with active low polarity and
high inactive state.
Add the setting of the inactive state ECSPIx_CONFIGREG:SCLK CTL
according to the clock polarity ECSPIx_CONFIGREG:SCLK POL:
DT without "spi-cpol" = 0 = clock active high polarity = inactive state low
DT with "spi-cpol" = 1 = clock active low polarity = inactive state high
Signed-off-by: Knut Wohlrab <knut.wohlrab@de.bosch.com>
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This factors out the resource handling in runtime
suspend/resume and also calls it from the ordinary suspend
and resume hooks.
The semantics require that ordinary PM op suspend is called
with runtime PM in resumed mode, so that ordinary suspend
can assume that it will e.g. decrease the clock reference
counter to 0, runtime resume having previously increased it
to 1.
Cc: Vipul Kumar Samar <vipulkumar.samar@st.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This switches the PL022 SPI driver to use devm_* managed resources
for IRQ, clocks, ioremap and GPIO. Prior to this, the GPIOs would
even leak.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Linux 3.6-rc6
Conflicts:
drivers/spi/spi-omap2-mcspi.c
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Even with devicetree support, we needed platform data to provide some data,
leading to mixed device tree and platform data. This patch makes it possible to
provide all that information via device tree. Now, the data must be provided
via platform data _or_ device tree completely.
Only in case of DMA where a callback specification is necessary (dma_filter()),
platform data is the only option.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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When s3c64xx-spi is instantiated from device tree an instance of
struct s3c64xx_spi_csinfo is dynamically allocated in the driver.
For non-dt platform it is passed from board code through
spi_register_board_info(). On error path in s3c64xx_spi_setup()
function there is an attempt to free this data struct
s3c64xx_spi_csinfo object as it would have been allocated in the
driver for both, dt and non-dt based platforms. This leads to
following bug when gpio request fails:
spi spi1.0: Failed to get /CS gpio [21]: -16
kernel BUG at mm/slub.c:3478!
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 Not tainted (3.6.0-rc5-00092-g9b0b493-dirty #6111)
PC is at kfree+0x148/0x158
LR is at s3c64xx_spi_setup+0xac/0x290
pc : [<c00a513c>] lr : [<c0227014>] psr: 40000013
sp : ee043e10 ip : c032883c fp : c0481f7c
r10: ee0abd80 r9 : 00000063 r8 : 00000000
r7 : ee129e78 r6 : ee104a00 r5 : fffffff0 r4 : c047bc64
r3 : 40000400 r2 : c047bc64 r1 : c04def60 r0 : 0004047b
Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c5387d Table: 4000404a DAC: 00000015
Process swapper/0 (pid: 1, stack limit = 0xee0422f0)
Stack: (0xee043e10 to 0xee044000)
...
[<c00a513c>] (kfree+0x148/0x158) from [<c0227014>] (s3c64xx_spi_setup+0xac/0x290)
[<c0227014>] (s3c64xx_spi_setup+0xac/0x290) from [<c02251a4>] (spi_setup+0x34/0x4c)
[<c02251a4>] (spi_setup+0x34/0x4c) from [<c02258d0>] (spi_add_device+0x98/0x128)
[<c02258d0>] (spi_add_device+0x98/0x128) from [<c02259d4>] (spi_new_device+0x74/0xa8)
[<c02259d4>] (spi_new_device+0x74/0xa8) from [<c0225a2c>] (spi_match_master_to_boardinfo+0x24/0x44)
[<c0225a2c>] (spi_match_master_to_boardinfo+0x24/0x44) from [<c0225b40>] (spi_register_master+0xf4/0x2a8)
[<c0225b40>] (spi_register_master+0xf4/0x2a8) from [<c043fe0c>] (s3c64xx_spi_probe+0x34c/0x42c)
[<c043fe0c>] (s3c64xx_spi_probe+0x34c/0x42c) from [<c01fc198>] (platform_drv_probe+0x18/0x1c)
There should be no attempt to kfree controller_data when it was
externally provided through the board code. Fix this by freeing
controller_data only when dev->of_node is not null.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Adds pinctrl support to support OMAP platforms that boot from DT
and rely on pinctrl support to set pinmuxes.
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Amend the PL022 pin controller to optionally take a pin control
handle and set the state of the pins to "default" on boot and
runtime resume, and to "sleep" at runtime suspend. This way we
will dynamically save power on the SPI busses, for example some
electronic designs may be able to ground the pins when unused
instead of pull-up. Some pin controllers may want to set the
pins as wake-up sources when sleeping.
Effect on platforms using the PL022 driver:
- If the platform does not use pin control - no semantic effect,
the pinctrl stubs will kick in and resolve the situation.
- Platforms using this driver and have pin control but no
function defined for the PL022 need to either supply a
"default" function in their map or enable pinctrl dummies
so the driver is satisfied.
- Platforms using this driver with hogs for setting up the PL022
pin control - stop using hogs to take the pl022 pin control
handle, let the driver handle this.
I'be looked at some platforms that may be affected:
- SPEAr: appears to define the proper functions in their device
trees and not hogging them, so things should be smooth, the
driver will simply start to take its pins.
- Ux500: the proper function is defined and will be taken properly
by the driver. New sleep states introduced by a separate patch to
ux500 but no regression, since the default state is sufficient.
- U300: old hog deleted as part of this patch.
- LPC32xx: does not appear to be using pinctrl.
- ARM Integrator IMPD1, RealView & Versatile: does not use pinctrl.
Tested-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Currently in omap2_mcspi_txrx_dma the tx and the rx support is
interleaved. Make the rx related code in omap2_mcspi_rx_dma
and the tx related code omap2_mcspi_tx_dma and call the functions.
While at it remove the braces in the if statements which has only
one line.
Also fix ["foo * bar" to "foo *bar"] warn for the rx and tx variables.
Only a cleanup no functional change.
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Tested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The gpio_ was missing from the name. Add a name for the parameter while
we're at it since GCC warns.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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devm free functions should not have to be explicitly used.
A semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@@
@@
(
* devm_kfree(...);
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* devm_free_irq(...);
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* devm_iounmap(...);
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* devm_release_region(...);
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* devm_release_mem_region(...);
)
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The new chip select handling via GPIO introduced a pointer computation bug:
(int *) pl022 + sizeof(struct pl022)
doesn't point to the data immediately after the actual struct pl022 (as was
intended) but to a multiple of bytes after it because of the (int *) type.
Replacing the kludgy pointer arithmetic with managed memory allocation for the
chip selects.
Reported-by: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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module_spi_driver eliminates module_init and module_exit
calls and makes the code simpler.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This patch adds DT bindings to the spi-gpio driver and some
documentation about how to use it.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The spi-gpio driver currently assumes the chipselect gpio number is
stored in ->controller_data of the device's static board information.
In devicetree environments, this information is unavailable and has to
be derived from the DT node.
This patch moves the gpio storage to the controller's private data so
the DT bindings can easily build upon the driver.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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Suspend and resume functions call spi_master_get() without matching
spi_master_put(). The extra references are unnecessary and cause subsequent
module unload attempts to fail. Drop the calls.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The call sequence spi_alloc_master/spi_register_master/spi_unregister_master
is complete; it reduces the device reference count to zero, which results in
device memory being freed. An extra call to spi_master_put is unnecessary
and results in an access to free memory. Drop it.
Also, the device subsystem resets device driver data to NULL after the call to
the remove function returns, so there is no need to do it here.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The call to spi_unregister_master() in the device remove function frees device
memory, and with it any device local data. However, device local data is still
accessed after the call to spi_unregister_master().
Acquire a reference to the SPI master device and release it after cleanup is
complete to solve the problem.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The call sequence spi_alloc_master/spi_register_master/spi_unregister_master
is complete; it reduces the device reference count to zero, which results in
device memory being freed. The remove function accesses the freed memory after
the call to spi_unregister_master(), _and_ it calls spi_master_put on the freed
memory.
Acquire a reference to the SPI master device and release it after cleanup is
complete (with the existing spi_master_put) to solve the problem.
Also, the device subsystem ensures that the remove function is only called once,
and resets device driver data to NULL. Remove the respective check and drop the
unnecessaary call to platform_set_drvdata().
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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If the I2C bus master driver does not support the required functionality,
the driver returns -ENODEV. This causes a silent probe failure without error
message. Since the device has to be explicitly instantiated, and the user
should know the correct bus, this event really reflects an error condition.
Replace error return value with -EINVAL to trigger an error message showing
that the probe function failed.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This patch adds device tree support to the spi-pl022 driver.
Based on the initial patch by Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This patch adds the ability for the driver to control the chip select directly.
This enables independence from cs_control callbacks. Configurable via
platform_data, to be extended as DT in the following patch.
Based on the initial patch by Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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This driver adds support for NXP SC18IS602/603 I2C to SPI bus bridge.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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The call to spi_unregister_master() in the device remove function frees device
memory, and with it any device local data. However, device local data is still
accessed after the call to spi_unregister_master().
Acquire a reference to the SPI master device and release it after cleanup is
complete to solve the problem.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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