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* Merge tag 'multiplatform-for-linus' of ↵Linus Torvalds2013-05-02
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform updates from Olof Johansson: "More multiplatform enablement for ARM platforms. The ones converted in this branch are: - bcm2835 - cns3xxx - sirf - nomadik - msx - spear - tegra - ux500 We're getting close to having most of them converted! One of the larger platforms remaining is Samsung Exynos, and there are a bunch of supporting patches in this merge window for it. There was a patch in this branch to a early version of multiplatform conversion, but it ended up being reverted due to need of more bake time. The revert commit is part of the branch since it would have required rebasing multiple dependent branches and they were stable by then" * tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits) mmc: sdhci-s3c: Fix operation on non-single image Samsung platforms clocksource: nomadik-mtu: fix up clocksource/timer Revert "ARM: exynos: enable multiplatform support" ARM: SPEAr13xx: Fix typo "ARCH_HAVE_CPUFREQ" ARM: exynos: enable multiplatform support rtc: s3c: make header file local mtd: onenand/samsung: make regs-onenand.h file local thermal/exynos: remove unnecessary header inclusions mmc: sdhci-s3c: remove platform dependencies ARM: samsung: move mfc device definition to s5p-dev-mfc.c ARM: exynos: move debug-macro.S to include/debug/ ARM: exynos: prepare for sparse IRQ ARM: exynos: introduce EXYNOS_ATAGS symbol ARM: tegra: build assembly files with -march=armv7-a ARM: Push selects for TWD/SCU into machine entries ARM: ux500: build hotplug.o for ARMv7-a ARM: ux500: move to multiplatform ARM: ux500: make remaining headers local ARM: ux500: make irqs.h local to platform ARM: ux500: get rid of <mach/[hardware|db8500-regs].h> ...
| * Merge branch 'mxs/cleanup' into next/multiplatformArnd Bergmann2013-04-09
| |\ | | | | | | | | | | | | | | | | | | | | | | | | This is a dependency for mxs/multiplatform Signed-off-by: Arnd Bergmann <arnd@arndb.de> Conflicts: drivers/clocksource/Makefile
| * | pinctrl: sirf: convert to linear irq domainArnd Bergmann2013-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sirf platforms use no hardcoded IRQ numbers, so there is no reason to use the legacy domain, and by converting to the linear domain, we get a more efficient representation of sparse IRQs and remove the dependency on the mach/irqs.h header file. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Linus Walleij <linus.walleij@linaro.org>
* | | Merge tag 'dt-for-linus' of ↵Linus Torvalds2013-05-02
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree updates from Olof Johansson: "Part 1 of device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits) arm: mvebu: PCIe Device Tree informations for Armada XP GP arm: mvebu: PCIe Device Tree informations for Armada 370 DB arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox arm: mvebu: PCIe Device Tree informations for Armada XP DB arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 arm: mvebu: add PCIe Device Tree informations for Armada XP arm: mvebu: add PCIe Device Tree informations for Armada 370 ARM: sunxi: unify osc24M_fixed and osc24M arm: vt8500: Add SDHC support to WM8505 DT ARM: dts: Add a 64 bits version of the skeleton device tree ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board ARM: mvebu: Add support for NOR flash device on Armada XP-GP board ARM: mvebu: Add Device Bus support for Armada 370/XP SoC ARM: dts: imx6dl-wandboard: Add USB Host support ARM: dts: imx51 cpu node ARM: dts: Add missing imx27-phytec-phycore dtb target ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module ARM: i.MX51: Add PATA support ARM: dts: Add initial support for Wandboard Dual-Lite ...
| * | | pinctrl: add pinctrl driver for imx6slShawn Guo2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a pinctrl driver for i.MX6 SoloLite based on pinctrl-imx core driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: add pinctrl driver for imx6dlShawn Guo2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The imx6dl is a derivative of imx6q with very limited difference. These two SoCs are so compatible that they can be handled as one platform in software. That said, we will not have target SOC_IMX6DL but just reusing SOC_IMX6Q. That's why the pinctrl-imx6dl driver is added here with symbol PINCTRL_IMX6Q controlling the build of it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: imx: move hard-coding data into device treeShawn Guo2013-04-09
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, all imx pinctrl drivers maintain a big array of struct imx_pin_reg which hard-codes data like register offset and mux mode setting for each pin function. Every time a new imx SoC support is added, we need to add such a big mount of data. With moving to single kernel build, it's only matter of time to be blamed on memory consuming. With DTC pre-processor support in place, the patch moves all these data into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and changing the PIN_FUNC_ID parsing code a little bit. The pin id gets re-numbered based on mux register offset, or config register offset if the pin has no mux register, so that kernel can identify the pin id from register offsets provided by device tree. As a bonus point of the change, those arbitrary magic numbers standing for particular PIN_FUNC_ID in device tree sources are now replaced by macros to improve the readability of dts files. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | | Merge tag 'cleanup-for-linus' of ↵Linus Torvalds2013-05-02
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanup from Olof Johansson: "Here is a collection of cleanup patches. Among the pieces that stand out are: - The deletion of h720x platforms - Split of at91 non-dt platforms to their own Kconfig file to keep them separate - General cleanups and refactoring of i.MX and MXS platforms - Some restructuring of clock tables for OMAP - Convertion of PMC driver for Tegra to dt-only - Some renames of sunxi -> sun4i (Allwinner A10) - ... plus a bunch of other stuff that I haven't mentioned" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits) ARM: i.MX: remove unused ARCH_* configs ARM i.MX53: remove platform ahci support ARM: sunxi: Rework the restart code irqchip: sunxi: Rename sunxi to sun4i irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro clocksource: sunxi: Rename sunxi to sun4i clocksource: sunxi: make use of CLKSRC_OF clocksource: sunxi: Cleanup the timer code ARM: at91: remove trailing semicolon from macros ARM: at91/setup: fix trivial typos ARM: EXYNOS: remove "config EXYNOS_DEV_DRM" ARM: EXYNOS: change the name of USB ohci header ARM: SAMSUNG: Remove unnecessary code for dma ARM: S3C24XX: Remove unused GPIO drive strength register definitions ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412 ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410 ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC" ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI" ...
| * | | Merge tag 'v3.9-rc5' into next/cleanupArnd Bergmann2013-04-09
| |\| | | | | | | | | | | | | | | | | | | | | | This is a dependency for the mxs/cleanup branch. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | arm: Move chained_irq_(enter|exit) to a generic fileCatalin Marinas2013-03-26
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions have been introduced by commit 10a8c383 (irq: introduce entry and exit functions for chained handlers) in asm/mach/irq.h. This patch moves them to linux/irqchip/chained_irq.h so that generic irqchip drivers do not rely on architecture specific header files. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <rob.herring@calxeda.com>
* | | pinctrl: move subsystem mutex to pinctrl_dev structPatrice Chotard2013-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mutex avoids deadlock in case of use of multiple pin controllers. Before this modification, by using a global mutex, deadlock appeared when, for example, a call to pinctrl_pins_show() locked the pinctrl_mutex, called the ops->pin_dbg_show of a particular pin controller. If this pin controller needs I2C access to retrieve configuration information and I2C driver is using pinctrl to drive its pins, a call to pinctrl_select_state() try to lock again pinctrl_mutex which leads to a deadlock. Notice that the mutex grab from the two direction functions was moved into pinctrl_gpio_direction(). For several cases, we can't replace pinctrl_mutex by pctldev->mutex, because at this stage, pctldev is not accessible : - pinctrl_get()/pinctrl_put() - pinctrl_register_maps() So add respectively pinctrl_list_mutex and pinctrl_maps_mutex in order to protect pinctrl_list and pinctrl_maps list instead. Reintroduce pinctrldev_list_mutex in find_pinctrl_by_of_node(), pinctrl_find_and_add_gpio_range() pinctrl_request_gpio(), pinctrl_free_gpio(), pinctrl_gpio_direction(), pinctrl_devices_show(), pinctrl_register() and pinctrl_unregister() to protect pinctrldev_list. Changes v2->v3: - Fix a missing EXPORT_SYMBOL_GPL() for pinctrl_select_state(). Changes v1->v2: - pinctrl_select_state_locked() is removed, all lock mechanism is located inside pinctrl_select_state(). When parsing the state->setting list, take the per-pin-controller driver lock. (Patrice). - Introduce pinctrldev_list_mutex to protect pinctrldev_list in all functions which parse or modify pictrldev_list. (Patrice). - move find_pinctrl_by_of_node() from pinctrl/devicetree.c to pinctrl/core.c in order to protect pinctrldev_list. (Patrice). - Sink mutex:es into some functions and remove some _locked variants down to where the lists are actually accessed to make things simpler. (Linus) - Drop *all* mutexes completely from pinctrl_lookup_state() and pinctrl_select_state() - no relevant mutex was taken and it was unclear what this was protecting against. (Linus) Reported by : Seraphin Bonnaffe <seraphin.bonnaffe@stericsson.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl/pinconfig: fix misplaced gotoLaurent Meunier2013-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | This update contains a basic fix that went unseen through test and review. Signed-off-by: Laurent Meunier <laurent.meunier@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: s3c64xx: Fix build error caused by undefined chained_irq_enterTomasz Figa2013-04-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit de88cbb7 moved definitions of chained_irq_enter and chained_irq_exit to a generic header, which must be now included instead of the legacy arch-specific one. This patch fixes build error caused by including the legacy header leading to undefined chained_irq_enter and chained_irq_exit symbols. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl/pinconfig: add debug interfaceLaurent Meunier2013-04-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This update adds a debugfs interface to modify a pin configuration for a given state in the pinctrl map. This allows to modify the configuration for a non-active state, typically sleep state. This configuration is not applied right away, but only when the state will be entered. This solution is mandated for us by HW validation: in order to test and verify several pin configurations during sleep without recompiling the software. Change log in this patch set; Take into account latest feedback from Stephen Warren: - stale comments update - improved code efficiency and readibility - limit size of global variable pinconf_dbg_conf - remove req_type as it can easily be added later when add/delete requests support is implemented Signed-off-by: Laurent Meunier <laurent.meunier@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: abx500: fix issue when no pdataPatrice CHOTARD2013-04-18
| | | | | | | | | | | | | | | | | | | | | | | | Fix an issue when probing pinctrl-abx500 with no platform data. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: sunxi: Rename wemac functions to emacMaxime Ripard2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pin functions associated to the ethernet controller were introduced with the label "wemac", which was the name of the ethernet driver in the allwinner source tree, while the real name of the IP is actually "emac", as advertised in several documents including the datasheet. Since this is part of the device tree bindings, and that these part of the bindings have not yet be released in a kernel version, it seems like the good timing to change it and assure consistency. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: exynos5440: add gpio interrupt supportThomas Abraham2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos5440 supports gpio interrupts on gpios 16 to 23. The eight interrupt lines originating from the pin-controller are connected to the gic. Add irq-chip support for these interrupts. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: exynos5440: fix probe failure due to missing pin-list in config nodesThomas Abraham2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The property 'samsung,exynos5440-pins' is optional in configuration nodes which are included in the Exynos5440 pin-controller device node. Fix the incorrect failure in driver probe if 'samsung,exynos5440-pins' property is not found in the configuration nodes. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: ab8505: Staticize some symbolsSachin Kamat2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Silences the following warnings: drivers/pinctrl/pinctrl-ab8505.c:274:28: warning: symbol 'ab8505_alternate_functions' was not declared. Should it be static? drivers/pinctrl/pinctrl-ab8505.c:351:32: warning: symbol 'ab8505_gpio_irq_cluster' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: ab8540: Staticize some symbolsSachin Kamat2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Silences the following warnings: drivers/pinctrl/pinctrl-ab8540.c:302:28: warning: symbol 'ab8540_alternate_functions' was not declared. Should it be static? drivers/pinctrl/pinctrl-ab8540.c:379:32: warning: symbol 'ab8540_gpio_irq_cluster' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: ab9540: Staticize some symbolsSachin Kamat2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following warnings: drivers/pinctrl/pinctrl-ab9540.c:382:28: warning: symbol 'ab9540alternate_functions' was not declared. Should it be static? drivers/pinctrl/pinctrl-ab9540.c:457:32: warning: symbol 'ab9540_gpio_irq_cluster' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: ab8500: Staticize some symbolsSachin Kamat2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These symbols are used only in this file. Silences the following warnings: drivers/pinctrl/pinctrl-ab8500.c:392:28: warning: symbol 'ab8500_alternate_functions' was not declared. Should it be static? drivers/pinctrl/pinctrl-ab8500.c:458:32: warning: symbol 'ab8500_gpio_irq_cluster' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: abx500: Staticize some symbolsSachin Kamat2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These symbols are used only in this file. Without this patch we get the following warnings: drivers/pinctrl/pinctrl-abx500.c:520:5: warning: symbol 'abx500_gpio_request' was not declared. Should it be static? drivers/pinctrl/pinctrl-abx500.c:527:6: warning: symbol 'abx500_gpio_free' was not declared. Should it be static? drivers/pinctrl/pinctrl-abx500.c:614:5: warning: symbol 'abx500_gpio_request_enable' was not declared. Should it be static? drivers/pinctrl/pinctrl-abx500.c:714:5: warning: symbol 'abx500_pin_config_get' was not declared. Should it be static? drivers/pinctrl/pinctrl-abx500.c:721:5: warning: symbol 'abx500_pin_config_set' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: Add pinctrl-s3c64xx driverTomasz Figa2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinctrl-s3c64xx driver which implements pin control interface for Samsung S3C64xx SoCs. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: samsung: Handle banks with two configuration registersTomasz Figa2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for banks that have more than one function configuration registers, e.g. some of the banks of S3C64xx SoCs. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: samsung: Remove hardcoded register offsetsTomasz Figa2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces statically hardcoded register offsets of Exynos SoCs with an array of register offsets in samsung_pin_bank_type struct. Thanks to this change, support for SoCs with other set and order of registers can be added (e.g. S3C24xx and S3C64xx). Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: samsung: Split pin bank description into two structuresTomasz Figa2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch splits pin bank description into two structures, one describing bank type (currently only bitfield widths), which can be shared across multiple banks and second containing bank-specific parameters including a pointer to a bank type struct. It is a prerequisite for further patch removing the statically hardcoded register offsets, making it impossible to support SoCs with different set and order of pin control registers. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: samsung: Include pinctrl-exynos driver data conditionallyTomasz Figa2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since pinctrl-samsung is a common part of the pin control support for several Samsung SoCs, it can be compiled without Exynos support enabled. This patch surrounds Exynos-specific driver data with ifdefs to include them only when support for Exynos is enabled. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> [Fixed up EXYNOS4->EXYNOS] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | pinctrl: samsung: Protect bank registers with a spinlockTomasz Figa2013-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain pin control registers can be accessed from different contexts, i.e. pinctrl, gpio and irq functions. This makes the locking provided by pin control core insufficient. This patch adds necessary locking using a per bank spinlock as it was done in the old Samsung GPIO driver. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | Merge tag 'v3.9-rc5' into develLinus Walleij2013-04-03
|\ \ \ | | |/ | |/| | | | | | | | | | | | | Linux 3.9-rc5 Conflicts: drivers/pinctrl/pinconf.c
| * | Merge tag 'pinctrl-fixes-for-v3.9' of ↵Linus Torvalds2013-03-24
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pinctrl fixes from Linus Walleij: "Here are a few pinctrl fixes for the v3.9 rc series: - Usecount bounds checking so we do not go below zero on mux usecounts. - Loop range checking in GPIO ranges in the DT range parser. - Proper print in debugfs for pinconf state. - Fix compilation bug in generic pinconf code. - Minor bugfixes to abx500 and mvebu drivers." * tag 'pinctrl-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinmux: forbid mux_usecount to be set at UINT_MAX pinctrl: mvebu: fix checking for SoC specific controls pinctrl: generic: Fix compilation error pinctrl: Print the correct information in debugfs pinconf-state file pinctrl: abx500: Fix checking if pin use AlternateFunction register gpio: fix wrong checking condition for gpio range
| | * | pinmux: forbid mux_usecount to be set at UINT_MAXRichard Genoud2013-03-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If pin_free is called on a pin already freed, mux_usecount is set to UINT_MAX which is really a bad idea. This will issue a warning, so that we can correct the code responsible for the double free. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | pinctrl: mvebu: fix checking for SoC specific controlsSimon Guinot2013-03-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a minor bug (probably due to a typo) while checking the SoC specific controls in mvebu_pinctrl_probe(). Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | pinctrl: generic: Fix compilation errorSachin Kamat2013-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function definition of pinconf_generic_dump_config is defined under CONFIG_DEBUG_FS macro. Define the declaration too under this macro. Without this patch we get the following build error: drivers/built-in.o: In function `pcs_pinconf_config_dbg_show': drivers/pinctrl/pinctrl-single.c:726: undefined reference to `pinconf_generic_dump_config' Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | pinctrl: Print the correct information in debugfs pinconf-state fileLaurent Pinchart2013-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A bad copy&paste resulted in the debugfs pinconf-state file printing the pin name instead of the state name. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | pinctrl: abx500: Fix checking if pin use AlternateFunction registerAxel Lin2013-03-13
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | It's pointless to check "af.alt_bit1 == UNUSED" twice. This looks like a copy-paste bug, I think what we want is to check if *both* af.alt_bit1 and af.alt_bit2 are UNUSED. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * / ARM: at91: add gpio suspend/resume support when using pinctrlLudovic Desroches2013-03-14
| |/ | | | | | | | | | | | | | | | | | | gpio suspend/resume and wakeup sources where not managed when using pinctrl so it was impossible to wake up the system with a gpio. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* | pinctrl/abx500: fix ab9540 alternate functionPatrice Chotard2013-04-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fix allows to correctly select default and alternate pin mode. By default for all ABx500 family chip, pin default mode is selected by clearing corresponding bit in GPIOSELx register except for pins which support alternate function, in this case, corresponding bit must be set. But, due to an unlogical hardware implementation, for one particular pin (GPIO11) reverse setting must be done. For that, update the alternate function array by declaring that this pin supports alternate function. Same issue has been fixed in pinctrl-ab8505.c Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl/pinconf: partial revert of pin config debugfsLinus Walleij2013-04-03
| | | | | | | | | | | | | | | | | | | | | | | | | | I accidentally left this patch: commit 6f9e41f4e673bf9ae6a5c0831b1524a91ea1c440 "pinctrl/pinconfig: add debug interface" in the tree though the patch was not yet finished. Revert it partially (we need the infrastructural changes). Cc: Laurent Meunier <laurent.meunier@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl/nomadik: add device tree bindings for db8540Gabriel Fernandez2013-04-03
| | | | | | | | | | | | | | | | This adds a simple device tree binding for db8540 boards. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com> Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: simplify the re-enable old state code in pinctrl_select_stateRichard Genoud2013-04-03
| | | | | | | | | | | | | | | | | | Instead of just enabling the settings that were disabled in the 1st loop, it's simpler to recall pinctrl_select_state with the old state. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: select_state: don't call pinctrl_free_setting on errorRichard Genoud2013-04-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As Stephen Warren pointed out, pinctrl_free_setting() was called instead of pinmux_disable_setting() on error. In this error code, we want to call pinmux_disable_setting() where pinmux_enable_setting() was called. And when pinconf_apply_setting() was called, we can't do much to undo the pin muxing (the closest thing I can think about for "unmuxing" a pin is muxing it as GPIO input). Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: coh901: Fix error checking in u300_gpio_to_irqAxel Lin2013-04-03
| | | | | | | | | | | | | | The pointer "port" is always not NULL if gpio->port_list is not empty. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: pinctrl_select_state: set the old_state back on errorRichard Genoud2013-04-03
| | | | | | | | | | | | | | | | | | In unapply_new_state, the old state is re-applied, but p->state is not set back as it should. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: remove superfluous optimization in pinctrl_select_state_lockedRichard Genoud2013-04-03
| | | | | | | | | | | | | | | | | | | | | | As Stephen Warren suggested, checking first if the setting->node entry is the first in the list or not is superfluous, as it is checked again in the list_for_each_entry bellow. So, remove it, the code will be simpler and lighter ! Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: use dev_info instead of pr_info in pinctrl_select_state_lockedRichard Genoud2013-04-03
| | | | | | | | | | | | | | | | And remove superfluous brackets. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: sunxi: add clock supportEmilio López2013-04-03
| | | | | | | | | | | | | | | | | | For the port controller to work, we need to enable the apb0_pio gate. This commit adds the ability to enable one clock specified on the device tree to the pinctrl driver. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: core: add dependence of GPIOLIBHaojian Zhuang2013-04-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In file included from drivers/pinctrl/core.c:30:0: include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep': include/asm-generic/gpio.h:270:2: error: implicit declaration of function '__gpio_get_value' [-Werror=implicit-function-declaration] include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep': include/asm-generic/gpio.h:276:2: error: implicit declaration of function '__gpio_set_value' [-Werror=implicit-function-declaration] drivers/pinctrl/core.c: In function 'pinctrl_ready_for_gpio_range': drivers/pinctrl/core.c:297:9: error: implicit declaration of function 'gpio_to_chip' [-Werror=implicit-function-declaration] drivers/pinctrl/core.c:297:27: warning: initialization makes pointer from integer without a cast [enabled by default] drivers/pinctrl/core.c:304:45: error: dereferencing pointer to incomplete type drivers/pinctrl/core.c:305:26: error: dereferencing pointer to incomplete type drivers/pinctrl/core.c:305:39: error: dereferencing pointer to incomplete type cc1: some warnings being treated as errors make[2]: *** [drivers/pinctrl/core.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make[1]: *** Waiting for unfinished jobs.... It's caused by CONFIG_GPIOLIB isn't enabled for some platform. So add the dependence on pinctrl_ready_for_gpio_range(). Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl/abx500: fix ab8505 alternate functionPatrice Chotard2013-04-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fix allows to correctly select default and alternate pin mode. By default for all ABx500 family chip, pin default mode is selected by clearing corresponding bit in GPIOSELx register except for pins which support alternate function, in this case, corresponding bit must be set. But, due to an unlogical hardware implementation, for one particular pin (GPIO11) reverse setting must be done. For that, update the alternate function array by declaring that this pin supports alternate function. Reported-by: Ramesh Chandrasekaran <ramesh.chandrasekaran@stericsson.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: mvebu: prevent walking off the end of group arrayDavid Woodhouse2013-03-27
| | | | | | | | | | | | | | | | | | | | | | | | While investigating (ab)use of krealloc, David found this bug. It's unlikely to occur, but now we detect the condition and error out appropriately. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-31 12:12:39 -0500