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* PCI: fix pbus_size_mem() resource alignment for CardBus controllersLinus Torvalds2008-09-04
| | | | | | | | | | | | | | | | | | | | | | | Commit 884525655d07fdee9245716b998ecdc45cdd8007 ("PCI: clean up resource alignment management") changed the resource handling to mark how a resource was aligned on a per-resource basis. Thus, instead of looking at the resource number to determine whether it was a bridge resource or a regular resource (they have different alignment rules), we should just ask the resource for its alignment directly. The reason this broke only cardbus resources was that for the other types of resources, the old way of deciding alignment actually still happened to work. But CardBus bridge resources had been changed by commit 934b7024f0ed29003c95cef447d92737ab86dc4f ("Fix cardbus resource allocation") to look more like regular resources than PCI bridge resources from an alignment handling standpoint. Reported-and-tested-by: Andrew Morton <akpm@linux-foundation.org> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: fix reference leak in pci_get_dev_by_id()Greg KH2008-08-21
| | | | | | | | | | | | | | | | | Alex Chiang and Matthew Wilcox pointed out that pci_get_dev_by_id() does not properly decrement the reference on the from pointer if it is present, like the documentation for the function states it will. It fixes a pretty bad leak in the hotplug core (we were leaking an entire struct pci_dev for each function of each offlined card, the first time around; subsequent onlines/offlines were ok). Cc: Matthew Wilcox <matthew@wil.cx> Cc: stable <stable@kernel.org> Tested-by: Alex Chiang <achiang@hp.com> Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: shpchp: Rename duplicate slot name N as N-1, N-2, N-M...Alex Chiang2008-08-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ef0ff95f136f0f2d035667af5d18b824609de320 (shpchp: fix slot name) introduces the shpchp_slot_with_bus module parameter, which was intended to help work around broken firmware that assigns the same name to multiple slots. Commit b3bd307c628af2f0a581c42d5d7e4bcdbbf64b6a (shpchp: add message about shpchp_slot_with_bus option) tells the user to use the above parameter in the event of a name collision. This approach is sub-optimal because it requires too much work from the user. Instead, let's rename the slot on behalf of the user. If firmware assigns the name N to multiple slots, then: The first registered slot is assigned N The second registered slot is assigned N-1 The third registered slot is assigned N-2 The Mth registered slot becomes N-M In the event we overflow the slot->name parameter, we report an error to the user. This is a temporary fix until the entire PCI core can be reworked such that individual drivers no longer have to manage their own slot names. Tested-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: pciehp: Rename duplicate slot name N as N-1, N-2, N-M...Alex Chiang2008-08-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3800345f723fd130d50434d4717b99d4a9f383c8 (pciehp: fix slot name) introduces the pciehp_slot_with_bus module parameter, which was intended to help work around broken firmware that assigns the same name to multiple slots. Commit 9e4f2e8d4ddb04ad16a3828cd9a369a5a5287009 (pciehp: add message about pciehp_slot_with_bus option) tells the user to use the above parameter in the event of a name collision. This approach is sub-optimal because it requires too much work from the user. Instead, let's rename the slot on behalf of the user. If firmware assigns the name N to multiple slots, then: The first registered slot is assigned N The second registered slot is assigned N-1 The third registered slot is assigned N-2 The Mth registered slot becomes N-M In the event we overflow the slot->name parameter, we report an error to the user. This is a temporary fix until the entire PCI core can be reworked such that individual drivers no longer have to manage their own slot names. Tested-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* Merge branch 'x86-merge' into for-linusJesse Barnes2008-08-18
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| * Merge branch 'pci-for-jesse' of ↵Jesse Barnes2008-08-18
| |\ | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip into x86-merge Conflicts: drivers/pci/probe.c
| | * Merge branch 'linus' into pci-for-jesseIngo Molnar2008-07-18
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| | * | pci: debug extra pci bus resourcesYinghai Lu2008-06-23
| | | | | | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | pci: debug extra pci resources rangeYinghai Lu2008-06-23
| | | | | | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | PCI: add acpi_find_root_bridge_handleJiri Slaby2008-08-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidate finding of a root bridge and getting its handle to the one inline function. It's cut & pasted on multiple places. Use this new inline in those. Cc: kristen.c.accardi@intel.com Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | | PCI: acpi_pcihp: run _OSC on a root bridgeJiri Slaby2008-08-18
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _OSC should be ran on a root bridge instead of the device itself. Do this before touching OSHP since PCI fw specs states that _OSC should be preferred over OSHP (however if the device has OSHP but not _OSC -- not a root bridge -- it's not). Cc: kristen.c.accardi@intel.com Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: Limit VPD length for Broadcom 5708SDean Hildebrand2008-08-07
| | | | | | | | | | | | | | | | | | | | | BCM5706S wont work correctly unless VPD length truncated to 128 Signed-off-by: Dean Hildebrand <dhildeb@us.ibm.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI PM: Export pci_pme_active to driversRafael J. Wysocki2008-08-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | Export pci_pme_active() to drivers, so that they can clear the PME_status bit and disable PME# for their devices without involving ACPI. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: check the return value of device_create_bin_file() in pci_create_bus()Simon Horman2008-08-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check the return value of device_create_bin_file in pci_create_bus and unwind if necessary. Don't propagate error to caller, as failure to create these files shouldn't prevent PCI from being initialised. Instead, just log a warning. Cc: Sven Wegener <sven.wegener@stealer.net> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: fully restore MSI state at resume timeJesse Barnes2008-08-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the recent change to avoid masking MSIs using the MSI enable bit, devices without an MSI mask bit will have their MSI capability always enabled when MSI is in use, so we need to restore it regardless of the mask bit state. Fixes kernel bz 11178. Acked-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Alan Jenkins <alan-jenkins@tuffmail.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: add Broadcom 5708S to VPD length quirkEric Dumazet2008-08-07
| | | | | | | | | | | | | | | | | | | | | BCM5708S wont work correctly unless VPD length truncated to 128 Signed-off-by: Eric Dumazet <dada1@cosmosbay.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: add D3 power state avoidance quirkAlan Cox2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Libata has some hacks to deal with certain controllers going silly in D3 state. The right way to handle this is to keep a PCI device flag for such devices. That can then be generalised for no ATA devices with power problems. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: add an option to allow ASPM enabled forciblyShaohua Li2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | A new option, pcie_aspm=force, will force ASPM to be enabled, even on system with PCIe 1.0 devices. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: disable ASPM on pre-1.1 PCIe devicesShaohua Li2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Disable ASPM on pre-1.1 PCIe devices, as many of them don't implement it correctly. Tested-by: Jack Howarth <howarth@bromo.msbb.uc.edu> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: disable ASPM per ACPI FADT settingShaohua Li2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ACPI FADT table includes an ASPM control bit. If the bit is set, do not enable ASPM since it may indicate that the platform doesn't actually support the feature. Tested-by: Jack Howarth <howarth@bromo.msbb.uc.edu> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI MSI: Don't disable MSIs if the mask bit isn't supportedMatthew Wilcox2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | David Vrabel has a device which generates an interrupt storm on the INTx pin if we disable MSI interrupts altogether. Masking interrupts is only a performance optimisation, so we can ignore the request to mask the interrupt. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: handle 64-bit resources better on 32-bit machinesMatthew Wilcox2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the kernel is configured to support 64-bit resources on a 32-bit machine, we can support 64-bit BARs properly. Just change the condition to check sizeof(resource_size_t) instead of BITS_PER_LONG. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: rewrite PCI BAR reading codeMatthew Wilcox2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Factor out the code to read one BAR from the loop in pci_read_bases into a new function, __pci_read_base. The new code is slightly more readable, better commented and removes the ifdef. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: document pci_target_stateJesse Barnes2008-07-28
| | | | | | | | | | | | | | | | | | The empty kdoc was causing warnings, so provide some actual documentation. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI hotplug: fix typo in pcie hotplug outputJesse Barnes2008-07-28
| | | | | | | | | | | | | | | | | | Comamnd->Command Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2008-07-24
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: fixup sparse endianness warnings in proc.c PCI PM: make more PCI PM core functionality available to drivers PCI/DMAR: don't assume presence of RMRRs PCI hotplug: fix error path in pci_slot's register_slot
| * | | PCI: fixup sparse endianness warnings in proc.cHarvey Harrison2008-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/pci/proc.c:91:3: warning: cast from restricted __le16 drivers/pci/proc.c:100:3: warning: cast from restricted __le32 drivers/pci/proc.c:109:3: warning: cast from restricted __le16 drivers/pci/proc.c:161:40: warning: cast to restricted __le16 drivers/pci/proc.c:170:41: warning: cast to restricted __le32 drivers/pci/proc.c:179:40: warning: cast to restricted __le16 Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI PM: make more PCI PM core functionality available to driversRafael J. Wysocki2008-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make more PCI PM core functionality available to drivers * Export pci_pme_capable() so that it can be called directly by drivers (for example, tg3 needs that). * Move the state choosing part of pci_prepare_to_sleep() to a separate function, pci_target_state(), that can be called directly by drivers (for example, tg3 needs that). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI/DMAR: don't assume presence of RMRRsYong Wang2008-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RMRRs do not necessarily have to be present on all VT-d capable platforms. The printk is just informational and does not need to be followed by an error return. Signed-off-by: Yong Y Wang <yong.y.wang@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: mark gross <mgross@linux.intel.com> Cc: Keshavamurthy, Anil S <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | | driver core: remove KOBJ_NAME_LEN defineKay Sievers2008-07-22
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | Kobjects do not have a limit in name size since a while, so stop pretending that they do. Signed-off-by: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | | pci kernel-doc fatal errorRandy Dunlap2008-07-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix kernel-doc comments so that they don't produce errors. Also cut some extraneous copy-paste text. Error(linhead//drivers/pci/pci.c:1133): duplicate section name 'Description' Error(linhead//drivers/pci/pci.c:1189): duplicate section name 'Description' Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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*---. | | Merge branches 'x86/urgent', 'x86/amd-iommu', 'x86/apic', 'x86/cleanups', ↵Ingo Molnar2008-07-21
|\ \ \| | | |_|_|/ |/| | | | | | | 'x86/core', 'x86/cpu', 'x86/fixmap', 'x86/gart', 'x86/kprobes', 'x86/memtest', 'x86/modules', 'x86/nmi', 'x86/pat', 'x86/reboot', 'x86/setup', 'x86/step', 'x86/unify-pci', 'x86/uv', 'x86/xen' and 'xen-64bit' into x86/for-linus
| | * | x86: make only GART code include gart.hFUJITA Tomonori2008-07-11
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | gart.h has only GART-specific stuff. Only GART code needs it. Other IOMMU stuff should include iommu.h instead of gart.h. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | Merge branch 'linux-next' of ↵Linus Torvalds2008-07-16
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (72 commits) Revert "x86/PCI: ACPI based PCI gap calculation" PCI: remove unnecessary volatile in PCIe hotplug struct controller x86/PCI: ACPI based PCI gap calculation PCI: include linux/pm_wakeup.h for device_set_wakeup_capable PCI PM: Fix pci_prepare_to_sleep x86/PCI: Fix PCI config space for domains > 0 Fix acpi_pm_device_sleep_wake() by providing a stub for CONFIG_PM_SLEEP=n PCI: Simplify PCI device PM code PCI PM: Introduce pci_prepare_to_sleep and pci_back_from_sleep PCI ACPI: Rework PCI handling of wake-up ACPI: Introduce new device wakeup flag 'prepared' ACPI: Introduce acpi_device_sleep_wake function PCI: rework pci_set_power_state function to call platform first PCI: Introduce platform_pci_power_manageable function ACPI: Introduce acpi_bus_power_manageable function PCI: make pci_name use dev_name PCI: handle pci_name() being const PCI: add stub for pci_set_consistent_dma_mask() PCI: remove unused arch pcibios_update_resource() functions PCI: fix pci_setup_device()'s sprinting into a const buffer ... Fixed up conflicts in various files (arch/x86/kernel/setup_64.c, arch/x86/pci/irq.c, arch/x86/pci/pci.h, drivers/acpi/sleep/main.c, drivers/pci/pci.c, drivers/pci/pci.h, include/acpi/acpi_bus.h) from x86 and ACPI updates manually.
| * | | PCI: remove unnecessary volatile in PCIe hotplug struct controllerMing Lei2008-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Proper memory barriers have been added to order accesses to ->cmd_busy, so volatile declaration for cmd_busy can be removed. Signed-off-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: include linux/pm_wakeup.h for device_set_wakeup_capableStephen Rothwell2008-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/pci/pci.c needs pm_wakeup.h since it uses device_set_wakup_capable(). The latter also needs to be stubbed out for !CONFIG_PM. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI PM: Fix pci_prepare_to_sleepRafael J. Wysocki2008-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recently introduced pci_prepare_to_sleep() needs the following fix, because there are systems which are not power manageable by ACPI (ie. ACPI doesn't provide methods to put the device into low power states and back), but require ACPI hooks to be executed for wake-up to work. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: Simplify PCI device PM codeRafael J. Wysocki2008-07-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the offset of PCI device's PM capability in its configuration space, the mask of states that the device supports PME# from and the D1 and D2 support bits are cached in the corresponding struct pci_dev, the PCI device PM code can be simplified quite a bit. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI PM: Introduce pci_prepare_to_sleep and pci_back_from_sleepRafael J. Wysocki2008-07-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce functions pci_prepare_to_sleep() and pci_back_from_sleep(), to be used by the PCI drivers that want to place their devices into the lowest power state appropiate for them (PCI_D3hot, if the device is not supposed to wake up the system, or the deepest state from which the wake-up is possible, otherwise) while the system is being prepared to go into a sleeping state and to put them back into D0 during the subsequent transition to the working state. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI ACPI: Rework PCI handling of wake-upRafael J. Wysocki2008-07-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Introduce function acpi_pm_device_sleep_wake() for enabling and disabling the system wake-up capability of devices that are power manageable by ACPI. * Introduce function acpi_bus_can_wakeup() allowing other (dependent) subsystems to check if ACPI is able to enable the system wake-up capability of given device. * Introduce callback .sleep_wake() in struct pci_platform_pm_ops and for the ACPI PCI 'driver' make it use acpi_pm_device_sleep_wake(). * Introduce callback .can_wakeup() in struct pci_platform_pm_ops and for the ACPI 'driver' make it use acpi_bus_can_wakeup(). * Move the PME# handlig code out of pci_enable_wake() and split it into two functions, pci_pme_capable() and pci_pme_active(), allowing the caller to check if given device is capable of generating PME# from given power state and to enable/disable the device's PME# functionality, respectively. * Modify pci_enable_wake() to use the new ACPI callbacks and the new PME#-related functions. * Drop the generic .platform_enable_wakeup() callback that is not used any more. * Introduce device_set_wakeup_capable() that will set the power.can_wakeup flag of given device. * Rework PCI device PM initialization so that, if given device is capable of generating wake-up events, either natively through the PME# mechanism, or with the help of the platform, its power.can_wakeup flag is set and its power.should_wakeup flag is unset as appropriate. * Make ACPI set the power.can_wakeup flag for devices found to be wake-up capable by it. * Make the ACPI wake-up code enable/disable GPEs for devices that have the wakeup.flags.prepared flag set (which means that their wake-up power has been enabled). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: rework pci_set_power_state function to call platform firstRafael J. Wysocki2008-07-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework pci_set_power_state() so that the platform callback is invoked before the native mechanism, if necessary. Also, make the function check if the device is power manageable by the platform before invoking the platform callback. This may matter if the device dependent on additional power resources controlled by the platform is being put into D0, in which case those power resources must be turned on before we attempt to handle the device itself. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: Introduce platform_pci_power_manageable functionRafael J. Wysocki2008-07-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce function pointer platform_pci_power_manageable to be used by the platform-related code to point to a function allowing us to check if given device is power manageable by the platform. Introduce acpi_pci_power_manageable() playing that role for ACPI. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: handle pci_name() being constGreg Kroah-Hartman2008-07-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This changes pci_setup_device to handle pci_name() now returning a constant string. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: fix pci_setup_device()'s sprinting into a const bufferDavid Howells2008-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make pci_setup_device() write the bus ID directly into the allotted storage, rather than using pci_name() as the address as that now returns a const pointer. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | pciehp: use get_service_dataKenji Kaneshige2008-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current pciehp driver saves its private data pointer into pci_dev structure using pci_set_drvdata()/pci_get_drvdata(). But because pciehp is not a pci device driver but a PCI Express service driver, it should save its private data pointer into pcie_device structure using set_service_data()/get_service_data(). Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | pciehp: remove needless command completed interrupt settingKenji Kaneshige2008-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, pciehp driver enables command completed interrupt as follows. (1) Don't enable at initialization. (2) Enable command completed interrupt whenever pciehp issues a command, if the command doesn't attempt to disable the interrupt. (3) Disable command completed interrupt at driver unloading. Once we enable command completed interrupt, we don't need to re-enable it for every command. So we can simplify above steps as follows: (1) Enable command completed interrupt at initialization. (2) No special sequence for command completed interrupt. (3) Disable command completed interrupt at driver unloading. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | pciehp: fix interrupt initializationKenji Kaneshige2008-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current pciehp driver's intialization sequence is as follows: (1) initialize controller data structure (2) install interrupt handler (3) enable software notification (4) initialize controller specific slot data structure (5) initialize generic slot data structure and register it to pci hotplug core The interrupt handler of pciehp assumes that controller specific slot data structure is already initialized. However, it is installed at (2) before initializing controller specific slot data structure at (4). Because of this, pciehp driver cannot handle the following cases properly. - If devices that shares IRQ with pciehp raise interrupts between (2) and (4). - If hotplug events (e.g. MRL open) happen between (3) and (4). We already have a workaround for this problem ("pciehp: fix NULL dereference in interrupt handler: dbd79aed1aea2bece0bf43cc2ff3b2f9baf48a08). But we still need fundamental fix. This patch fix the problem by changing the initilization sequence as follows: (1) initialize controller data structure (2) initialize controller specific slot data structure (3) install interrupt handler (4) enable software notification (5) initialize generic slot data structure and register it to pci hotplug core Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Acked-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: correct resource number in debug outputJesse Barnes2008-06-25
| | | | | | | | | | | | | | | | | | | | If pci_request_region fails, make the warning include the resource number, not the resource number + 1.
| * | | PCIE: port driver: use dev_printk when possibleBjorn Helgaas2008-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert printks to use dev_printk(). Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCIE: aer: use dev_printk when possibleBjorn Helgaas2008-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert printks to use dev_printk(). Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-21 06:49:37 -0500