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* [PATCH] x86_64: msi_apic.c build fixChristian Kujau2006-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CC drivers/pci/msi-apic.o In file included from include/asm/msi.h:11, from drivers/pci/msi.h:71, from drivers/pci/msi-apic.c:8: include/asm/smp.h:103: error: syntax error before '->' token akpm: nasty. It appears to be static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) conflicting with include/asm-x86_64/mach_apic.h's #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) And I don't know which patch in rc4-mm1 triggered this. Fixing this in the .c file seems wrong. Including asm/smp.h instead of linux/smp.h seems wrong too. Need that .config. Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI: nVidia quirk to make AER PCI-E extended capability visibleBrice Goglin2006-06-21
| | | | | | | | | | | | | | The nVidia CK804 PCI-E chipset supports the AER extended capability but sometimes fails to link it (with some BIOS or after a warm reboot). It makes the AER cap invisible to pci_find_ext_capability(). The patch adds a quirk to set the missing bit that controls the linking of the capability. By the way, it removes the corresponding code in the myri10ge driver. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Loic Prylli <loic@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Bus Parity Status sysfs interfaceDoug Thompson2006-06-21
| | | | | | | | | | | | | | | From: Doug Thompson <norsk5@yahoo.com> This patch adds the 'broken_parity_status' sysfs attribute file to a PCI device. Reading this attribute a userland program can determine if PCI device provides false positives (value of 1) in its generation of PCI Parity status, or not (value of 0). As PCI devices are found to be 'bad' in this regard, userland programs can also set the appropriate value (root access only) of a faulty device. This per device information will be used in the EDAC PCI Parity scanner code in a future patch once this interface becomes available. Signed-off-by: Doug Thompson <norsk5@yahoo.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: MSI-K8T-Neo2-Fir: run only where neededChris Wedgwood2006-06-21
| | | | | | | | | Be more selective when running the MSI-K8T-Neo2Fir soundcard PCI quirk so as not to run this on hardware where it's probably not needed. Signed-off-by: Chris Wedgwood <cw@f00f.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: fix race with pci_walk_bus and pci_destroy_devZhang Yanmin2006-06-21
| | | | | | | | | | | | | pci_walk_bus has a race with pci_destroy_dev. When cb is called in pci_walk_bus, pci_destroy_dev might unlink the dev pointed by next. Later on in the next loop, pointer next becomes NULL and cause kernel panic. Below patch against 2.6.17-rc4 fixes it by changing pci_bus_lock (spin_lock) to pci_bus_sem (rw_semaphore). Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: remove unneeded msi codeGrant Grundler2006-06-21
| | | | | | | | | | | | The code is really not needed. Roland Dreier/Greg KH removed the release_mem_region() calls that were the only consumers of phys_addr: http://www.ussg.iu.edu/hypermail/linux/kernel/0503.0/1540.html patch below deletes the "dead" code. Signed-off-by: Grant Grundler <iod00d@hp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: don't move ioapics below PCI bridgeKimball Murray2006-06-21
| | | | | | | | | | | | | | | | | A recent Stratus x86_64 platform uses a system ioapic that is a PCI device located below a PCI bridge. Other platforms like this may exist. This patch fixes a problem wherein the kernel's PCI setup code moves the ioapic to an address other than that assigned by the BIOS. It simply adds another exclusion (which already includes classless devices and host bridges) to the function pbus_assign_resources_sorted so that it will not move the ioapic. If the ioapic is moved, the fixmap mapping to it is broken, so the OS should leave it alone. From: Kimball Murray <kimball.murray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: cleanup unused variable about msi driverbibo,mao2006-06-21
| | | | | | | | | In IA64 platform, msi driver does not use irq_vector variable, and in x86 platform LAST_DEVICE_VECTOR should one before FIRST_SYSTEM_VECTOR, this patch modify this. Signed-off-by: bibo, mao <bibo.mao@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: disable msi mode in pci_disable_deviceShaohua Li2006-06-21
| | | | | | | | | | | | | | | Brice said the pci_save_msi_state breaks his driver in his special usage (not in suspend/resume), as pci_save_msi_state will disable msi mode. In his usage, pci_save_state will be called at runtime, and later (after the device operates for some time and has an error) pci_restore_state will be called. In another hand, suspend/resume needs disable msi mode, as device should stop working completely. This patch try to workaround this issue. Drivers are expected call pci_disable_device in suspend time after pci_save_state. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Allow MSI to work on kexec kernelRajesh Shah2006-06-21
| | | | | | | | | | | | | | | We recently ran into a problem where the e1000 device failed to work properly on the kexec kernel. MSI was enabled for the device in the main kernel when it crashed. The e1000 driver tried to enable MSI on the kexec kernel, but the code bailed early when it found that MSI was already enabled in the hardware, even though the software state was not properly set up in the kexec'd kernel. This patch fixes the problem by moving the early return to after making sure that the software state is properly initialized. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: AMD 8131 MSI quirk called too late, bus_flags not inherited ?Brice Goglin2006-06-21
| | | | | | | | | | | | | | The PCI_BUS_FLAGS_NO_MSI bus flags does not appear do be inherited correctly from the amd8131 MSI quirk to its parent busses. It makes devices behind a bridge behind amd8131 try to enable MSI while the amd8131 does not support it. We fix this by looking at flags of all parent busses in pci_enable_msi() and pci_enable_msix(). By the way, also add the missing dev->no_msi check in pci_enable_msix() Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI Bus Parity Status-broken hardware attribute, EDAC foundationDoug Thompson2006-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the EDAC (error detection and correction) modules that are in the kernel contain some features that need to be moved. After some good feedback on the PCI Parity detection code and interface (http://www.ussg.iu.edu/hypermail/linux/kernel/0603.1/0897.html) this patch ADDs an new attribute to the pci_dev structure: Namely the 'broken_parity_status' bit. When set this indicates that the respective hardware generates false positives of Parity errors. The EDAC "blacklist" solution was inferior and will be removed in a future patch. Also in this patch is a PCI quirk.c entry for an Infiniband PCI-X card which generates false positive parity errors. I am requesting comments on this AND on the possibility of a exposing this 'broken_parity_status' bit to userland via the PCI device sysfs directory for devices. This access would allow for enabling of this feature on new devices and for old devices that have their drivers updated. (SLES 9 SP3 did this on an ATI motherboard video device). There is a need to update such a PCI attribute between kernel releases. This patch just adds a storage place for the attribute and a quirk entry for a known bad PCI device. PCI Parity reaper/harvestor operations are in EDAC itself and will be refactored to use this PCI attribute instead of its own mechanisms (which are currently disabled) in the future. Signed-off-by: Doug Thompson <norsk5@xmission.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI ACPI: Rename the functions to avoid multiple instances.Muthu Kumar2006-06-21
| | | | | | | | | | There were two instances of pci_acpi_init(), one in drivers/pci/pci-acpi.c and another in arch/i386/pci/acpi.c. Rename the one in pci-acpi.c and make it consistent with other names in the same file. Signed-off-by: Muthukumar R <muthur@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: don't enable device if already enabledKristen Accardi2006-06-21
| | | | | | | | If a device is already enabled, don't bother reenabling it. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Acked-By: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Add a "enable" sysfs attribute to the pci devices to allow ↵Arjan van de Ven2006-06-21
| | | | | | | | | | | | | | | | | | userspace (Xorg) to enable devices without doing foul direct access This patch adds an "enable" sysfs attribute to each PCI device. When read it shows the "enabled-ness" of the device, but you can write a "0" into it to disable a device, and a "1" to enable it. This later is needed for X and other cases where userspace wants to enable the BARs on a device (typical example: to run the video bios on a secundary head). Right now X does all this "by hand" via bitbanging, that's just evil. This allows X to no longer do that but to just let the kernel do this. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> CC: Peter Jones <pjones@redhat.com> Acked-by: Dave Airlie <airlied@linux.ie> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Add pci_assign_resource_fixed -- allow fixed address assignmentsKumar Gala2006-06-21
| | | | | | | | | | | | | | | | | | PCI: Add pci_assign_resource_fixed -- allow fixed address assignments On some embedded systems the PCI address for hotplug devices are not only known a priori but are required to be at a given PCI address for other master in the system to be able to access. An example of such a system would be an FPGA which is setup from user space after the system has booted. The FPGA may be access by DSPs in the system and those DSPs expect the FPGA at a fixed PCI address. Added pci_assign_resource_fixed() as a way to allow assignment of the PCI devices's BARs at fixed PCI addresses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: fix to pci ignore pre-set 64-bit bars on 32-bit platformsBjorn Helgaas2006-06-21
| | | | | | | | | | | | | | | | | | When we detect a 64-bit pre-set address in a BAR on a 32-bit platform, we disable it and treat it as if it had been unset, thus allowing the general address assignment code to assign a new address to it when the device is enabled. This can happen either if the firmware assigns 64-bit addresses; additionally, some cards have been found "in the wild" which do not come out of reset with all the BAR registers set to zero. Unfortunately, the patch that implemented this tested the low part of the address instead of the high part of the address. This patch fixes that. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Ignore pre-set 64-bit BARs on 32-bit platformsH. Peter Anvin2006-06-21
| | | | | | | | | | | | | | | | | | | [pci] Ignore pre-set 64-bit BARs on 32-bit platforms Currently, Linux always rejects a device which has a pre-set 64-bit address on a 32-bit platform. On systems which do not do PCI initialization in firmware, this causes some devices which don't correctly power up with all BARs zero to fail. This patch makes the kernel automatically zero out such an address (thus treating it as if it had not been set at all, meaning it will assign an address if necessary). I have done this only for devices, not bridges. It seems potentially hazardous to do for bridges. Signed-off-by: H. Peter Anvin <hpa@c2micro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: altix: msi supportMark Maule2006-06-21
| | | | | | | | MSI callouts for altix. Involves a fair amount of code reorg in sn irq.c code as well as adding some extensions to the altix PCI provider abstaction. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: per-platform IA64_{FIRST,LAST}_DEVICE_VECTOR definitionsMark Maule2006-06-21
| | | | | | | | | | | | Abstract IA64_FIRST_DEVICE_VECTOR/IA64_LAST_DEVICE_VECTOR since SN platforms use a subset of the IA64 range. Implement this by making the above macros global variables which the platform can override in it setup code. Also add a reserve_irq_vector() routine used by SN to mark a vector's as in-use when that weren't allocated through assign_irq_vector(). Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: msi abstractions and support for altixMark Maule2006-06-21
| | | | | | | | | | Abstract portions of the MSI core for platforms that do not use standard APIC interrupt controllers. This is implemented through a new arch-specific msi setup routine, and a set of msi ops which can be set on a per platform basis. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6Linus Torvalds2006-06-21
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (30 commits) [PATCH] PCI Hotplug: Fix recovery path from errors during pcie_init() [PATCH] PCI Hotplug: fake NULL pointer dereferences in IBM Hot Plug Controller Driver [PATCH] shpchp: Cleanup improper info messages [PATCH] shpchp: Remove Unused hpc_evelnt_lock [PATCH] shpchp: Cleanup interrupt polling timer [PATCH] shpchp: Cleanup SHPC commands [PATCH] shpchp: Cleanup interrupt handler [PATCH] shpchp: Remove unnecessary hpc_ctlr_handle check [PATCH] pciehp: Implement get_address callback [PATCH] pciehp: Add missing pci_dev_put [PATCH] pciehp: Replace pci_find_slot() with pci_get_slot() [PATCH] SGI Hotplug: Incorrect power status [PATCH] shpchp: Create shpchpd at controller probe time [PATCH] shpchp: Mask Global SERR and Intr at controller release time [PATCH] SHPC: Fix SHPC Contoller SERR-INT Register bits access [PATCH] SHPC: Fix SHPC Logical Slot Register bits access [PATCH] SHPC: Cleanup SHPC Logical Slot Register bits access [PATCH] SHPC: Cleanup SHPC Logical Slot Register access [PATCH] SHPC: Cleanup SHPC register access [PATCH] pciehp: Fix programming hotplug parameters ...
| * [PATCH] PCI Hotplug: Fix recovery path from errors during pcie_init()Jan Beulich2006-06-19
| | | | | | | | | | | | | | Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] PCI Hotplug: fake NULL pointer dereferences in IBM Hot Plug ↵Eric Sesterhenn2006-06-19
| | | | | | | | | | | | | | | | | | | | Controller Driver Remove checks for value, since the hotplug core always provides a valid value. Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] shpchp: Cleanup improper info messagesKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | | | | | | | Current SHPCHP driver shows device number of slots in info messages, but it is useless and should be replaced with slot name. This patch replaces the device number shown in the info messages with the slot name. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] shpchp: Remove Unused hpc_evelnt_lockKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | This patch removes unused hpc_event_lock. This patch has no functional change. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] shpchp: Cleanup interrupt polling timerKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | This patch cleans up the interrupt polling timer code in shpchp_hpc.c. This has no functional changes. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] shpchp: Cleanup SHPC commandsKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | This patch cleans up the code related to issuing SHPC commands. This patch has no functional changes. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] shpchp: Cleanup interrupt handlerKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | This patch cleans up the interrupt handler of shpchp driver. This patch has no functional changes. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] shpchp: Remove unnecessary hpc_ctlr_handle checkKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | This patch removes unnecessary error check for hpc_ctlr_handle. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] pciehp: Implement get_address callbackKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements .get_address callback of hotplug_slot_ops for PCIEHP driver. With this patch, we can see bus address of hotplug slots as follows: # cat /sys/bus/pci/slots/0010_0000/address 0000:0a:00 Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] pciehp: Add missing pci_dev_putKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | The PCIEHP driver leaks reference counter of pci_dev structures. This patch adds missing pci_dev_put() calls to PCIEHP driver. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] pciehp: Replace pci_find_slot() with pci_get_slot()Kenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | | | This patch replaces pci_find_slot() with pci_get_slot() in PCIEHP driver. This patch enables PCI Express Hotplug on the system which has multiple PCI domains. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] SGI Hotplug: Incorrect power statusMike Habeck2006-06-19
| | | | | | | | | | | | | | | | | | | | | | | | This is a repost of a patch submitted by Prarit Bhargava on 01-19-06 that never got integrated. The get_power_status function is currently reporting a bitwise mapping of the slot if the slot is powered on. It should return 1 if powered on and 0 if powered off. Signed-off-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] shpchp: Create shpchpd at controller probe timeKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | The workqueue thread of shpchp driver should be created only when SHPC based hotplug slots are detected on the system. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] shpchp: Mask Global SERR and Intr at controller release timeKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | Global SERR and Interrupt should be masked at shpchp driver unload time. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] SHPC: Fix SHPC Contoller SERR-INT Register bits accessKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current SHPCHP driver doesn't take care of RsvdP/RsvdZ[*] bits in controller SERR-INT register. This might cause unpredicable results. This patch fixes this bug. [*] RsvdP and RsvdZ are defined in SHPC spec as follows: RsvdP - Reserved and Preserved. Register bits of this type are reserved for future use as R/W bits. The value read is undefined. Writes are ignored. Software must follow These rules when accessing RsvdP bits: - Software must ignore RsvdP bits when testing values read from these registers. - Software must not depend on RsvdP bit's ability to retain information when written - Software must always write back the value read in the RsvdP bits when writing one of these registers. RsvdZ - Reserved and Zero. Register bits of this type are reserved for future use as R/WC bits. The value read is undefined. Writes are ignored. Software must follow these rules when accessing RsvdZ bits: - Software must ignore RsvdZ bits when testing values read from these registers. - Software must not depends on a RsvdZ bit's ability to retain information when written. - Software must always write 0 to RsvdZ bits when writing one of these register. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] SHPC: Fix SHPC Logical Slot Register bits accessKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current SHPCHP driver doesn't take care of RsvdP/RsvdZ[*] bits in logical slot registers. This might cause unpredicable results. This patch fixes this bug. [*] RsvdP and RsvdZ are defined in SHPC spec as follows: RsvdP - Reserved and Preserved. Register bits of this type are reserved for future use as R/W bits. The value read is undefined. Writes are ignored. Software must follow These rules when accessing RsvdP bits: - Software must ignore RsvdP bits when testing values read from these registers. - Software must not depend on RsvdP bit's ability to retain information when written - Software must always write back the value read in the RsvdP bits when writing one of these registers. RsvdZ - Reserved and Zero. Register bits of this type are reserved for future use as R/WC bits. The value read is undefined. Writes are ignored. Software must follow these rules when accessing RsvdZ bits: - Software must ignore RsvdZ bits when testing values read from these registers. - Software must not depends on a RsvdZ bit's ability to retain information when written. - Software must always write 0 to RsvdZ bits when writing one of these register. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] SHPC: Cleanup SHPC Logical Slot Register bits accessKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | This patch cleans up the code to access bits in slot logical registers. This patch has no functional change. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] SHPC: Cleanup SHPC Logical Slot Register accessKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | This patch cleans up the code to access slot logical registers. This patch has no functional changes. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] SHPC: Cleanup SHPC register accessKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | This patch cleans up the code to access SHPC working register sets. This patch has no functional changes. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] pciehp: Fix programming hotplug parametersKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | | | | | Current PCHEHP driver doesn't have any code to program hotplug parameters from firmware. So hotplug parameters are never programed at hot-add time. This patch add support for programming hotplug parameters to PCIEHP driver. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] acpi_pcihp: Add support for _HPXKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | This patch adds support for _HPX (Hot Plug Parameter Extensions) defined in ACPI3.0a spec. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] acpi_pcihp: Remove improper error message about OSHPKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | | | | | | | This patch converts the improper error message about OSHP evaluation to debug message which is displayed only when pci_hotplug.ko is loaded with debugging mode enabled. To do this, this patch adds a new module parameter "debug_acpi" to pci_hotplug.ko for enabling/disabling debug messages in acpi_pcihp.c. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] acpi_pcihp: Fix programming _HPP valuesKenji Kaneshige2006-06-19
| | | | | | | | | | | | | | | | | | | | | | This patch fixes the problem that hotplug parameters are not programed when PCI cards are hot-added by ACPIPHP, SHPCHP and PCIEHP driver. The pci_dev structure being hot-added is not bound to ACPI handle, so we need to trace PCI bus tree to find ACPI handle. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Cc: Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] pciehp: dont call pci_enable_devKristen Accardi2006-06-19
| | | | | | | | | | | | | | | | Don't call pci_enable_device from pciehp because the pcie port service driver already does this. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] PCI Hotplug: don't use acpi_os_freeKristen Accardi2006-06-19
| | | | | | | | | | | | | | | | acpi_os_free should not be used by drivers outside of acpi/*/*.c. Replace with kfree(). Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] acpiphp: turn off slot power at error caseMUNEDA Takahiro2006-06-19
| | | | | | | | | | | | | | | | | | | | | | | | When acpiphp_enable_slot() is failed, acpiphp does not change the slot->flags. Therefore, when user tries to read power status, acpiphp_get_power_status() returns the enable status whether the slot is not really enabled. This patch fixes this BUG. Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] acpiphp: host and p2p hotplugMUNEDA Takahiro2006-06-19
| | | | | | | | | | | | | | | | | | | | | | I encountered the problem that when there are some hotplug slots are under the host bridge, the hotplug slots under the p2p bridge are not treated as hotpluggable. This patch fixes this BUG. Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] acpiphp: hotplug slot hotplugMUNEDA Takahiro2006-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | o hotplug slots add When the hot-added PCI device is p2p bridge, acpiphp calls find_p2p_bridge() to add hotplug slots. o hotplug slots remove When the hot-removing PCI device is p2p bridge, acpiphp calls cleanup_p2p_bridge() to remove hotplug slots. o notify handler exchange When the p2p bridge is added, acpiphp changes the notify hanlder. If no bridge device is inserted into the hotpluggable PCI slot, acpiphp installs the notify handler for function. After the p2p bridge hot-add, acpiphp has to install the notify handler for bridge. Because, the role of the handlers are not same. The hot-remove case is ditto. Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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