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path: root/drivers/pci/quirks.c
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* PCI: Remove 3 incorrect MSI quirks.David Miller2007-11-05
| | | | | | | | | | | | | | | | | | | | | Now that we have dealt with the real issue, in that some ATI SATA and USB controllers needed the INTX_DISABLE quirk, we can remove these AMD chipset global MSI disabling quirks. This reverts three changesets: 4be8f906435a6af241821ab5b94b2b12cb7d57d8 (PCI: disable MSI on RS690) aea6a433f50cd89b9cbd10850fd0b32f961f9883 (PCI: disable MSI on RD580) f122392f679ebed39db08074f935d770504623eb (PCI: disable MSI on RX790) This is based upon testing and feedback from Shane Huang <Shane.Huang@amd.com>. Cc: Shane Huang <Shane.Huang@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Add MSI INTX_DISABLE quirks for ATI SB700/800 SATA and IXP SB400 USBDavid Miller2007-11-05
| | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Add quirk for devices which disable MSI when INTX_DISABLE is set.David Miller2007-11-05
| | | | | | | | | | | | | | | | | | A reasonably common problem with some devices is that they will disable MSI generation when the INTX_DISABLE bit is set in the PCI_COMMAND register. Quirk this explicitly, guarding the pci_intx() calls in msi.c with this quirk indication. The first entries for this quirk are for 5714 and 5780 Tigon3 chips, and thus we can remove the workaround code from the tg3.c driver. Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Michael Chan <mchan@broadcom.com> Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Add MSI quirk for ServerWorks HT1000 PCIX bridge.David Miller2007-11-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the fix for the following problem: https://bugzilla.redhat.com/show_bug.cgi?id=227657 The bnx2 device 5706 complains about MSI not working behind a ServerWorks HT1000 PCIX bridge. An earlier commit to fix the problem: e3008dedff4bdc96a5f67224cd3d8d12237082a0: "PCI: disable MSI by default on systems with Serverworks HT1000 chips" was not entirely correct, and has been reverted. MSI does not work on the PCIX bus because the BIOS did not set the HT_MSI_FLAGS_ENABLE bit in the HyperTransport MSI capability on the bridge. We use the existing quirk_msi_ht_cap() to detect the problem and disable MSI in all buses behind it. Signed-off-by: Michael Chan <mchan@broadcom.com> Cc: Anantha Subramanyam <ananth@broadcom.com> Cc: Naren Sankar <nsankar@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Revert "PCI: disable MSI by default on systems with Serverworks HT1000 ↵David Miller2007-11-05
| | | | | | | | | | | | | | chips" This reverts commit e3008dedff4bdc96a5f67224cd3d8d12237082a0. The real bug was an INTX issue in the tg3 ethernet chip, and cured by commit c129d962a66c76964954a98b38586ada82cf9381 Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* jmicron: update quirk for JMB361/3/5/6Tejun Heo2007-10-23
| | | | | | | | | | | | | | | | | | | | | | Set bits 0, 4, 5 and 7 of PCI configuration register 0x40 in the quirk. This has the following effects and is recommended by the vendor. * Force enable of IDE channels (used to be left alone as BIOS configured) * Change initial phase behavior of PIO cycle such that the host pulls down the bus instead of tristating it. Vendor recommends this setting. The above settings are better for the current generation of controllers and needed for the upcoming next generation. Tested on JMB363. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Ethan Hsiao <ethanhsiao@jmicron.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* PCI: re-enable onboard sound on "MSI K8T Neo2-FIR"Johannes Goecke2007-10-12
| | | | | | | | | | | | | | | | | | | On the "MSI K8T Neo2-FIR" board the BIOS disables the onboard soundcard, if a second PCI soundcard is present. This patch sets the korrect register bit to enable the onboard sound. Removed old code in /drivers/pci/quirks.c that only checks for the PCI-ID and fires on any Board with VIA 8237. New code in /arch/i386/pci/fixup.c checks the DMI-tables and only runs on the specific board. Signed-off-by: Johannes Goecke <goecke@upb.de> Acked-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: quirk_vt82c586_acpi: Omit reading PCI revision IDAuke Kok2007-10-12
| | | | | | Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: quirk amd_8131_mmrbc: Omit reading pci revision IDAuke Kok2007-10-12
| | | | | | | Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Cc: Peter Oruba <peter.oruba@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Fix bogus PCI quirk for e100Benjamin Herrenschmidt2007-09-28
| | | | | | | | | | | | | | | | Linas reported me that some machines were crashing at boot in quirk_e100_interrupt. It appears that this quirk is doing an ioremap directly on a PCI BAR value, which isn't legal and will cause all sorts of bad things to happen on architectures where PCI BARs don't directly match processor bus addresses. This fixes it by using the proper PCI resources instead which is possible since the quirk has been moved by a previous commit to happen late enough for that. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: unhide SMBus on Compaq Deskpro EP 401963-001 motherboardgw.kernel@tnode.com2007-09-11
| | | | | | | | | PCI quirk to unhide SMBus on Compaq Deskpro EP 401963-001 (PCA# 010174) motherboard. Signed-off-by: Greg White <gw.kernel@tnode.com> Acked-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Run k8t_sound_hostbridge quirk only when neededJean Delvare2007-08-22
| | | | | | | | | | | | | | The k8t_sound_hostbridge PCI quick fires on my motherboard (Jetway K8M8MS) while it shouldn't: the on-board sound chip is not disabled and is working just fine. Looking at the code, I see that we are running the quirk for two distinct register values (0x88 and 0xc8) and then clear bit 6 (0x40). However value 0x88 already has bit 6 cleared so this is a no-op. This is what happens on my board. Thus I believe that the quirk should only be run for register value 0xc8. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: disable MSI on RX790Tejun Heo2007-08-22
| | | | | | | | | | RX790 can't do MSI like its predecessors. Disable MSI on RX790. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: disable MSI on RD580Tejun Heo2007-08-22
| | | | | | | | | RD580 can't do MSI like its predecessors. Disable MSI on RD580. Signed-off-by: Tejun Heo <teheo@suse.de> CC: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: disable MSI on RS690Tejun Heo2007-08-22
| | | | | | | | | | RS690 can't do MSI like its predecessors. Disable MSI on RS690. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Henry Su <henry.su@amd.com> Cc: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: quirk_e100_interrupt() called too earlyMarian Balakowicz2007-08-22
| | | | | | | | | | | | | | | | | quirk_e100_interrupts() is called after PCI controller is initialized and before PCI bus enumeration is performed. On some powerpc platforms which modify PCI controller configuration and set different MEM and IO windows than those set by firmware quirk_e100_interrupt() is causing kernel panic as it tries to read from device BAR0 offets which at this time points to a invalid PCI window (set by firmware). This patch delays the quirk_100_interrupt() to pci_fixup_final phase, which happens after bus enumeration and before PCI enable and device driver initialization. Signed-off-by: Marian Balakowicz <m8@semihalf.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: pci-x-pci-express-read-control-interfaces cleanupsAndrew Morton2007-07-11
| | | | | | | | | | | | - remove unneeded local - 80-col fix Cc: Peter Oruba <peter.oruba@amd.com> Cc: Roland Dreier <rolandd@cisco.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Change all drivers to use pci_device->revisionAuke Kok2007-07-11
| | | | | | | | | | | | | | | | | | | | Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Dave Jones <davej@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: add PCI-X/PCI-Express read control interfacesPeter Oruba2007-07-11
| | | | | | | | | | | | | | | This patch introduces an interface to read and write PCI-X / PCI-Express maximum read byte count values from PCI config space. There is a second function that returns the maximum _designed_ read byte count, which marks the maximum value for a device, since some drivers try to set MMRBC to the highest allowed value and rely on such a function. Based on patch set by Stephen Hemminger <shemminger@linux-foundation.org> Cc: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Peter Oruba <peter.oruba@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: quirk disable MSI on via vt3351Jay Cliburn2007-05-31
| | | | | | | | | | | | | | The Via VT3351 APIC does not play well with MSI and unleashes a flood of APIC errors when MSI is used to deliver interrupts. The problem was recently exposed when the atl1 network device driver, which enables MSI by default, stimulated APIC errors on an Asus M2V mainboard, which employs the Via VT3351. See http://bugzilla.kernel.org/show_bug.cgi?id=8472 for additional details on this bug. Signed-off-by: Jay Cliburn <jacliburn@bellsouth.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: disable MSI by default on systems with Serverworks HT1000 chipsAndy Gospodarek2007-05-31
| | | | | | | | | | | | | | | | | | I've been seeing lots of messages like these: eth0: No interrupt was generated using MSI, switching to INTx mode. Please report this failure to the PCI maintainer and include system chipset information. On several systems that use the following Severworks HT1000 (also sometimes labeled as a Broadcom chipset as well) bridge chips. It doesn't appear MSI works well (if at all) on these systems. Signed-off-by: Andy Gospodarek <andy@greyhouse.net> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* pci-quirks: fix MSI disabling on RS400-200 and RS480Tejun Heo2007-05-31
| | | | | | | | | | | | | | Commit c0affe9db42bf85f4a606b3262c35ec59a5d3788 doesn't work because the host controller is being quirked not a PCI bridge. This patch reverts the commit, rename quirk_svw_msi() to quirk_disable_all_msi() and use it instead. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Matias Alejandro Torres <torresmat@gmail.com> Cc: Greg K-H <greg@kroah.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Add the combined mode for ATI SB700Henry Su2007-05-11
| | | | | | | | | | | | | | | Besides those modes in ATI SB600 SATA controller, ATI SB700 supports one more mode:the combined mode. The combined mode is a Legacy IDE mode used for compatibility with some old OS without AHCI driver, but now it is not necessary for Linux since the kernel has supported AHCI. Signed-off-by: Luugi Marsan <luugi.marsan@amd.com> Cc: Jeff Garzik <jeff@garzik.org> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* pci-quirks: disable MSI on RS400-200 and RS480Tejun Heo2007-05-02
| | | | | | | | | | | | | | MSI doesn't work on RS400-200 and RS480 requiring pci=nomsi kernel boot parameter for ahci to work. This patch disables MSI on those chips. http://thread.gmane.org/gmane.linux.ide/17820 http://thread.gmane.org/gmane.linux.ide/17516 https://bugzilla.novell.com/show_bug.cgi?id=263893 Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* libata/IDE: remove combined mode quirkJeff Garzik2007-04-28
| | | | | | | | | | | | | | | | | | | | | Both old-IDE and libata should be able handle all controllers and devices found using normal resource reservation methods. This eliminates the awful, low-performing split-driver configuration where old-IDE drove the PATA portion of a PCI device, in PIO-only mode, and libata drove the SATA portion of the /same/ PCI device, in DMA mode. Typically vendors would ship SATA hard drive / PATA optical configuration, which would lend itself to slow (PIO-only) CD-ROM performance. For Intel users running in combined mode, it is now wholly dependent on your driver choice (potentially link order, if you compile both drivers in) whether old-IDE or libata will drive your hardware. In either case, you will get full performance from both SATA and PATA ports now, without having to pass a kernel command line parameter. Signed-off-by: Jeff Garzik <jeff@garzik.org>
* PCI: Stop unhiding the SMBus on Toshiba laptopsJean Delvare2007-03-26
| | | | | | | | | | | | | It was found that the Toshiba laptops with hidden Intel SMBus have SMM code handling the thermal management which accesses the SMBus. Thus it is not safe to unhide it and let Linux access it. We have to leave the SMBus hidden. SMM is a pain, really. This fixes bugs #6315 and #6395, for good this time. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] msi: sanely support hardware level msi disablingEric W. Biederman2007-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases when we are not using msi we need a way to ensure that the hardware does not have an msi capability enabled. Currently the code has been calling disable_msi_mode to try and achieve that. However disable_msi_mode has several other side effects and is only available when msi support is compiled in so it isn't really appropriate. Instead this patch implements pci_msi_off which disables all msi and msix capabilities unconditionally with no additional side effects. pci_disable_device was redundantly clearing the bus master enable flag and clearing the msi enable bit. A device that is not allowed to perform bus mastering operations cannot generate intx or msi interrupt messages as those are essentially a special case of dma, and require bus mastering. So the call in pci_disable_device to disable msi capabilities was redundant. quirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ahci/pata_jmicron: match class not function numberTejun Heo2007-03-01
| | | | | | | | | | | | | | Make jmiron_ata quirk update pdev->class after programming the device and update ahci and pata_jmicron such that they match class code instead of checking function number manually. For ahci, it matches for vendor and class. For pata_jmicron, it matches vendor, device and class as IDE class isn't as well defined as AHCI class. This makes jmicron device matching more conventional and script friendly. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* jmicron ATA: reimplement jmicron ATA quirkTejun Heo2007-03-01
| | | | | | | | | | | | | | | | Reimplement jmicron ATA quirk. * renamed to quirk_jmicron_ata() * quirk is invoked only for the affected controllers * programming is stricter. e.g. conf5 bit24 is cleared if unnecessary. * code factored for readability * JMB360 and JMB368 are programmed into proper mode Verified on JMB360, 363 and 368. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* Add pci class code for SATA & AHCI, and replace some magic numbers.Conke Hu2007-02-09
| | | | | Signed-off-by: Conke Hu <conke.hu@amd.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6Linus Torvalds2007-02-07
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6: (23 commits) ide-acpi support warning fix ACPI support for IDE devices IDE Driver for Delkin/Lexar/etc.. cardbus CF adapter ide: it8213 IDE driver update (version 2) ide: add it8213 IDE driver tc86c001: add missing __init tag for tc86c001_ide_init() tc86c001: mark init_chipset_tc86c001() with __devinit tag tc86c001: init_hwif_tc86c001() can be static ide: add Toshiba TC86C001 IDE driver (take 2) pdc202xx_new: remove check_in_drive_lists abomination pdc202xx_new: remove useless code slc90e66: carry over fixes from piix driver piix: tuneproc() fixes/cleanups piix: fix 82371MX enablebits hpt366: HPT36x PCI clock detection fix hpt366: init code rewrite hpt366: clean up DMA timeout handling for HPT370 hpt366: merge HPT37x speedproc handlers hpt366: cache channel's MCR address hpt366: switch to using pci_get_slot ...
| * ide: add Toshiba TC86C001 IDE driver (take 2)Sergei Shtylyov2007-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the driver for the Toshiba TC86C001 GOKU-S PCI IDE controller, completely reworked from the original brain-damaged Toshiba's 2.4 version. This single channel UltraDMA/66 controller is very simple in programming, yet Toshiba managed to plant many interesting bugs in it. The particularly nasty "limitation 5" (as they call the errata) caused me to abuse the IDE core in a possibly most interesting way so far. However, this is still better than the #ifdef mess in drivers/ide/ide-io.c that the original version included (well, it had much more mess)... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Acked-by: Alan Cox <alan@redhat.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* | MSI: Replace pci_msi_quirk with calls to pci_no_msi()Michael Ellerman2007-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I don't see any reason why we need pci_msi_quirk, quirk code can just call pci_no_msi() instead. Remove the check of pci_msi_quirk in msi_init(). This is safe as all calls to msi_init() are protected by calls to pci_msi_supported(), which checks pci_msi_enable, which is disabled by pci_no_msi(). The pci_disable_msi routines didn't check pci_msi_quirk, only pci_msi_enable, but as far as I can see that was a bug not a feature. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | PCI: remove quirk_sis_96x_compatible()Adrian Bunk2007-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | Since 2.6.0-test10, all quirk_sis_96x_compatible() had any effect on was a printk(). This patch therefore removes it. Signed-off-by: Adrian Bunk <bunk@stusta.de> Acked-by: Mark M. Hoffman <mhoffman@lightlink.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | PCI: Speed up the Intel SMBus unhiding quirkJean Delvare2007-02-07
| | | | | | | | | | | | | | | | | | | | | | Speed up the Intel SMBus PCI quirk by avoiding tests which can only fail. This also makes the compiled code significantly smaller when using gcc 3.2/3.4. gcc 4.x appears to optimize the code by itself so this change doesn't make a difference there. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | PCI Quirk: 1k I/O space IOBL_ADR fix on P64H2Daniel Yeisley2007-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | There's an existing quirk for the kernel to use 1k IO space granularity on the Intel P64H2. It turns out however that pci_setup_bridge() in drivers/pci/setup-bus.c reads in the IO base and limit address register masks it off to the nearest 4k, and writes it back. This causes the kernel to be on 1k boundaries and the hardware to be 4k aligned. The patch below fixes the problem. Signed-off-by: Dan Yeisley <dan.yeisley@unisys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | PCI: quirks.c: cleanupAdrian Bunk2007-02-07
|/ | | | | | | | | | | | This patch contains the following cleanups: - move all EXPORT_SYMBOL's directly below the code they are exporting - move all DECLARE_PCI_FIXUP_*'s directly below the functions they are calling Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* ahci/pata_jmicron: fix JMicron quirkTejun Heo2007-02-02
| | | | | | | | | | | | | | | | | | | For all JMicrons except for 361 and 368, AHCI mode enable bits in the Control(1) should be set. This used to be done in both ahci and pata_jmicron but while moving programming to PCI quirk, it was removed from ahci part while still left in pata_jmicron. The implemented JMicron PCI quirk was incorrect in that it didn't program AHCI mode enable bits. If pata_jmicron is loaded first and programs those bits, the ahci ports work; otherwise, ahci device detection fails miserably. This patch makes JMicron PCI quirk clear SATA IDE mode bits and set AHCI mode bits and remove the respective part from pata_jmicron. Tested on JMB361, 363 and 368. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] via quirk updateJean Delvare2007-02-01
| | | | | | | | | | Add special handling for the VT82C686. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Nick Piggin <nickpiggin@yahoo.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [PATCH] Fix VIA quirksJean Delvare2007-01-30
| | | | | | | | | | | | | | | | | | Fix VIA quirks that were recently broken by Alan Cox in the upstream kernel (commit 1597cacbe39802d86656d1f2e6329895bd2ef531). My understanding is that pci_find_present() doesn't work yet at the time the quirks are run. So I used a two-step quirk as is done for some other quirks already. First we detect the VIA south bridges and set the right low and high device limits, then we are ready to actually run the quirks on the affected devices. Signed-off-by: Jean Delvare <jdelvare@suse.de> Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk> Acked-by: Nick Piggin <nickpiggin@yahoo.com.au> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: Unhide the SMBus on the Asus P4P800-XJean Delvare2007-01-22
| | | | | | | | | | | | | Unhide the SMBus on the Asus P4P800-X (and probably some other models of the family.) This gives access to the memory module SPD EEPROMs. Thanks to Winbond for supporting the lm-sensors project with the donation of this motherboard. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] x86-64: pci quirks MODPOST warning fixVivek Goyal2007-01-10
| | | | | | | | | | | | | | o MODPOST generates warnings for i386 if kernel is compiled with CONFIG_RELOCATABLE=y WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'asus_hides_smbus_lpc_ich6' (at offset 0xc0217d58) and 'quirk_cardbus_legacy' WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'asus_hides_smbus_lpc' (at offset 0xc0217fd9) and 'pci_match_id' o Two quirk functions which are non __init, are accessing data which is of type __init. Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i2c/pci: fix sis96x smbus quirk once and for allMark M. Hoffman2007-01-09
| | | | | | | | | | | | | | | | | | | | The sis96x SMBus PCI device depends on two different quirks to run in a specific order. Apart from being fragile, this was found to actually break on (at least) recent FC4, FC5, and FC6 kernels. This patch fixes the quirks so that they work without relying on the compiler and/or linker to put them in any specific order. http://lists.lm-sensors.org/pipermail/lm-sensors/2006-April/015962.html https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=189719 I tested this patch. Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com> Cc: Andrew Morton <akpm@osdl.org> Cc: Adrian Bunk <bunk@stusta.de> Cc: Greg K-H <greg@kroah.com> Cc: Jean Delvare <khali@linux-fr.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* PCI: ATI sb600 sata quirkConke Hu2006-12-20
| | | | | | | | Acked-by: Jeff Garzik <jeff@garzik.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Be a bit defensive in quirk_nvidia_ck804() so we don't risk ↵Jesper Juhl2006-12-20
| | | | | | | | | | | | | | | dereferencing a NULL pdev. pci_get_slot() may return NULL if nothing was found. quirk_nvidia_ck804() does not check the value returned from pci_get_slot(), so it may end up causing a NULL pointer deref. Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com> Acked-by: Alan Cox <alan@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Fix multiple problems with VIA hardwareAlan Cox2006-12-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is designed to fix: - Disk eating corruptor on KT7 after resume from RAM - VIA IRQ handling - VIA fixups for bus lockups after resume from RAM The core of this is to add a table of resume fixups run at resume time. We need to do this for a variety of boards and features, but particularly we need to do this to get various critical VIA fixups done on resume. The second part of the problem is to handle VIA IRQ number rules which are a bit odd and need special handling for PIC interrupts. Various patches broke various boxes and while this one may not be perfect (hopefully it is) it ensures the workaround is applied to the right devices only. From: Jean Delvare <khali@linux-fr.org> Now that PCI quirks are replayed on software resume, we can safely re-enable the Asus SMBus unhiding quirk even when software suspend support is enabled. [akpm@osdl.org: fix const warning] Signed-off-by: Alan Cox <alan@redhat.com> Cc: Jean Delvare <khali@linux-fr.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Use pci_find_ht_capability() in drivers/pci/quirks.cMichael Ellerman2006-12-20
| | | | | | | | | | | | | Use pci_find_ht_capability() in drivers/pci/quirks.c. I'm pretty sure the logic is unchanged here, but someone please eye-ball it for me. I've changed the message to be a little shorter, it's now: PCI: Found (enabled|disabled) HT MSI mapping on xxxx:xx:xx.x Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI quirks: remove redundant checkDavid Rientjes2006-12-20
| | | | | | | | | | Removes redundant check for dev->subordinate; if it is NULL, the function returns before the patch-affected code region. Signed-off-by: David Rientjes <rientjes@cs.washington.edu> Acked-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: quirks: fix the festering mess that claims to handle IDE quirksAlan Cox2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of permutations of crap we do is amazing and almost all of it has the wrong effect in 2.6. At the heart of this is the PCI SFF magic which says that compatibility mode PCI IDE controllers use ISA IRQ routing and hard coded addresses not the BAR values. The old quirks variously clears them, sets them, adjusts them and then IDE ignores the result. In order to drive all this garbage out and to do it portably we need to handle the SFF rules directly and properly. Because we know the device BAR 0-3 are not used in compatibility mode we load them with the values that are implied (and indeed which many controllers actually thoughtfully put there in this mode anyway). This removes special cases in the IDE layer and libata which now knows that bar 0/1/2/3 always contain the correct address. It means our resource allocation map is accurate from boot, not "mostly accurate" after ide is loaded, and it shoots lots of code. There is also lots more code and magic constant knowledge to shoot once this is in and settled. Been in my test tree for a while both with drivers/ide and with libata. Wants some -mm shakedown in case I've missed something dumb or there are corner cases lurking. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] revert "PCI: quirk for IBM Dock II cardbus controllers"Andrew Morton2006-11-14
| | | | | | | | | | | | | | Fix http://bugzilla.kernel.org/show_bug.cgi?id=7264 We need to target this quirk a little more tightly, using the T20 DMI string. Cc: Pavel Kysilka <goldenfish@bsys.cz> Acked-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Cc: Daniel Ritz <daniel.ritz@gmx.ch> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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