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path: root/drivers/pci/probe.c
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* Merge branch 'cpus4096-for-linus' of ↵Linus Torvalds2009-01-10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'cpus4096-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: [IA64] fix typo in cpumask_of_pcibus() x86: fix x86_32 builds for summit and es7000 arch's cpumask: use work_on_cpu in acpi-cpufreq.c for read_measured_perf_ctrs cpumask: use work_on_cpu in acpi-cpufreq.c for drv_read and drv_write cpumask: use cpumask_var_t in acpi-cpufreq.c cpumask: use work_on_cpu in acpi/cstate.c cpumask: convert struct cpufreq_policy to cpumask_var_t cpumask: replace CPUMASK_ALLOC etc with cpumask_var_t x86: cleanup remaining cpumask_t ops in smpboot code cpumask: update pci_bus_show_cpuaffinity to use new cpumask API cpumask: update local_cpus_show to use new cpumask API ia64: cpumask fix for is_affinity_mask_valid()
| * cpumask: update pci_bus_show_cpuaffinity to use new cpumask APIMike Travis2009-01-04
| | | | | | | | | | | | | | | | | | | | Impact: use new cpumask API to reduce stack usage Replace the local cpumask_t variable with a pointer to the const cpumask that needs to be printed. Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | PCI: set device wakeup capable flag if platform support is presentJesse Barnes2009-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | When PCI devices are initialized, we check whether they support PCI PM caps and set the device can_wakeup flag if so. However, some devices may have platform provided wakeup events rather than PCI PME signals, so we need to set can_wakeup in that case too. Doing so should allow wakeups from many more devices, especially on cost constrained systems. Reported-by: Alan Stern <stern@rowland.harvard.edu> Tested-by: Joseph Chan <JosephChan@via.com.tw> Acked-by: "Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: allow pci_alloc_child_bus() to handle a NULL bridgeYu Zhao2009-01-07
| | | | | | | | | | | | | | | | | | Allow pci_alloc_child_bus() to allocate buses without bridge devices. Some SR-IOV devices can occupy more than one bus number, but there is no explicit bridges because that have internal routing mechanism. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: export __pci_read_base()Yu Zhao2009-01-07
| | | | | | | | | | | | | | Export __pci_read_base() so it can be used by whole PCI subsystem. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: define PCI resource names in an 'enum'Yu Zhao2009-01-07
| | | | | | | | | | | | | | | | | | | | This patch moves all definitions of the PCI resource names to an 'enum', and also replaces some hard-coded resource variables with symbol names. This change eases introduction of device specific resources. Reviewed-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: handle PCI state saving with interrupts disabledRafael J. Wysocki2009-01-07
| | | | | | | | | | | | | | | | | | | | Since interrupts will soon be disabled at PCI resume time, we need to pre-allocate memory to save/restore PCI config space (or use GFP_ATOMIC, but this is safer). Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: "Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: struct device - replace bus_id with dev_name(), dev_set_name()Kay Sievers2009-01-07
|/ | | | | | | | | | | | | | | | | | | | | | This patch is part of a larger patch series which will remove the "char bus_id[20]" name string from struct device. The device name is managed in the kobject anyway, and without any size limitation, and just needlessly copied into "struct device". To set and read the device name dev_name(dev) and dev_set_name(dev) must be used. If your code uses static kobjects, which it shouldn't do, "const char *init_name" can be used to statically provide the name the registered device should have. At registration time, the init_name field is cleared, to enforce the use of dev_name(dev) to access the device name at a later time. We need to get rid of all occurrences of bus_id in the entire tree to be able to enable the new interface. Please apply this patch, and possibly convert any remaining remaining occurrences of bus_id. Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-Off-By: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* cpumask: change cpumask_scnprintf, cpumask_parse_user, cpulist_parse, and ↵Rusty Russell2008-12-13
| | | | | | | | | | | | | | | | | | | | | | | cpulist_scnprintf to take pointers. Impact: change calling convention of existing cpumask APIs Most cpumask functions started with cpus_: these have been replaced by cpumask_ ones which take struct cpumask pointers as expected. These four functions don't have good replacement names; fortunately they're rarely used, so we just change them over. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Mike Travis <travis@sgi.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: paulus@samba.org Cc: mingo@redhat.com Cc: tony.luck@intel.com Cc: ralf@linux-mips.org Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: cl@linux-foundation.org Cc: srostedt@redhat.com
* PCI: remove unused resource assignment in pci_read_bridge_bases()Zhao, Yu2008-10-23
| | | | | | | | | | | | | | This cleanup removes the resource assignment in pci_read_bridge_bases() since it has taken care by pci_alloc_child_bus() when allocating the bus: /* Set up default resource pointers and names.. */ for (i = 0; i < PCI_BRIDGE_RES_NUM; i++) { child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i]; child->resource[i]->name = child->name; } Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Workaround invalid P2P bridge bus numbersBenjamin Herrenschmidt2008-10-22
| | | | | | | | | | | | | | | | | | | Some firmware fail to properly configure P2P bridges, leaving them with invalid bus numbers. In some cases, this happens on some embedded 4xx boards as the result of the kernel allocating different bus space than the firmware does to host bridges while not setting pcibios_assign_all_busses() for various reasons. In other cases, it can just be bogus firmware. This adds some sanity checking to the PCI probing code. If a bridge is found whose primary bus number doesn't match the bus it's sitting on, or whose secondary bus number not strictly above it's primary bus number, then the bridge bus numbers are deconfigured in the first pass of pci_scan_bridge() to be re-assigned in the second pass. Tested-by: "Ayman El-Khashab" <AymanE@tanisys.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Add ability to mmap legacy_io on some platformsBenjamin Herrenschmidt2008-10-20
| | | | | | | | | | | | | | This adds the ability to mmap legacy IO space to the legacy_io files in sysfs on platforms that support it. This will allow to clean up X to use this instead of /dev/mem for legacy IO accesses such as those performed by Int10. While at it I moved pci_create/remove_legacy_files() to pci-sysfs.c where I think they belong, thus making more things statis in there and cleaned up some spurrious prototypes in the ia64 pci.h file Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: probing debug message uniformizationVincent Legoll2008-10-20
| | | | | | | | | | | | | | | | | | | | | | | | | This patch uniformizes PCI probing debug boot messages with dev_printk() intead of manual printk() It changes adress range output from [%llx, %llx] to [%#llx-%#llx], like in pci_request_region(). For example, it goes from the mixed-style: PCI: 0000:00:1b.0 reg 10 64bit mmio: [f4280000, f4283fff] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold to uniform: pci 0000:00:1b.0: reg 10 64bit mmio: [0xf4280000-0xf4283fff] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold This patch has been runtime tested, boot log messages diffed, everything looks OK. Acked-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: support PCIe ARI capabilityYu Zhao2008-10-20
| | | | | | | | | | | | This patch adds support for PCI Express Alternative Routing-ID Interpretation (ARI) capability. The ARI capability extends the Function Number field of the PCI Express Endpoint by reusing the Device Number which is otherwise hardwired to 0. With ARI, an Endpoint can have up to 256 functions. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: centralize the capabilities code in probe.cZhao, Yu2008-10-20
| | | | | | | | | This patch centralizes the initialization and release functions of various PCI capabilities in probe.c, which makes the introduction of new capability support functions cleaner in the future. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: fix 64-vbit prefetchable memory resource BARsPeter Chubb2008-10-20
| | | | | | | | | | | | | | | | Since patch 6ac665c63dcac8fcec534a1d224ecbb8b867ad59 my infiniband controller hasn't worked. This is because it has 64-bit prefetchable memory, which was mistakenly being taken to be 32-bit memory. The resource flags in this case are PCI_BASE_ADDRESS_MEM_TYPE_64 | PCI_BASE_ADDRESS_MEM_PREFETCH. This patch checks only for the PCI_BASE_ADDRESS_MEM_TYPE_64 bit; thus whether the region is prefetchable or not is ignored. This fixes my Infiniband. Reviewed-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Peter Chubb <peterc@gelato.unsw.edu.au> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: replace cfg space size (256/4096) by macros.Zhao, Yu2008-10-20
| | | | | | | | | | This is a cleanup that changes all PCI configuration space size representations to the macros (PCI_CFG_SPACE_SIZE and PCI_CFG_SPACE_EXP_SIZE). And the macros are also moved from drivers/pci/probe.c to drivers/pci/pci.h. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: connect struct pci_dev to struct pci_slotAlex Chiang2008-10-20
| | | | | | | | | | | | | | | | | | | | | | | | The introduction of struct pci_slot (f46753c5e354b857b20ab8e0fe7b25) added a struct pci_slot pointer to struct pci_dev, but we forgot to associate the two. Connect the two structs together; the interesting portions of the object lifetimes are: - when a new pci_slot is created, connect it to the appropriate pci_dev's. A single pci_slot may be associated with multiple pci_dev's, e.g. any multi-function PCI device. - when a pci_slot is released, look for all the pci_dev's it was associated with, and set their pci_slot pointers to NULL - when a pci_dev is created, look for slots to associate with. Note -- when a pci_dev is released, we don't need to do any bookkeeping, since pci_slot's do not have pointers to pci_dev's. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: follow lspci device/vendor styleBjorn Helgaas2008-10-20
| | | | | | | | Use "[%04x:%04x]" for PCI vendor/device IDs to follow the format used by lspci(8). Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* pci: Use new %pR to print resource rangesBenjamin Herrenschmidt2008-10-20
| | | | | | | | | This converts things in drivers/pci to use %pR to printout the content of a struct resource instead of hand-casted %llx or other variants. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Driver core: add bus_sort_breadthfirst() functionGreg Kroah-Hartman2008-10-16
| | | | | | | | | | | | The PCI core wants to reorder the devices in the bus list. So move this functionality out of the pci core and into the driver core so that anyone else can also do this if needed. This also lets us change how struct device is attached to drivers in the future without messing with the PCI core. Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: re-add debug prints for unmodified BARsYinghai Lu2008-09-12
| | | | | | | | Print out for device BAR values before the kernel tries to update them. Also make related output use KERN_DEBUG. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Fix printk warnings in probe.cJohann Felix Soden2008-09-09
| | | | | | | | | | | | | | | | The cleaned up resource code in probe.c introduced some warnings: drivers/pci/probe.c: In function 'pci_read_bridge_bases': drivers/pci/probe.c:386: warning: format '%llx' expects type 'long long unsigned int', but argument 3 has type 'resource_size_t' drivers/pci/probe.c:386: warning: format '%llx' expects type 'long long unsigned int', but argument 4 has type 'resource_size_t' drivers/pci/probe.c:398: warning: format '%llx' expects type 'long long unsigned int', but argument 3 has type 'resource_size_t' drivers/pci/probe.c:398: warning: format '%llx' expects type 'long long unsigned int', but argument 4 has type 'resource_size_t' drivers/pci/probe.c:434: warning: format '%llx' expects type 'long long unsigned int', but argument 4 has type 'resource_size_t' drivers/pci/probe.c:434: warning: format '%llx' expects type 'long long unsigned int', but argument 5 has type 'resource_size_t' So fix them up. Signed-off-by: Johann Felix Soden <johfel@users.sourceforge.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* Merge branch 'pci-for-jesse' of ↵Jesse Barnes2008-08-18
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip into x86-merge Conflicts: drivers/pci/probe.c
| * Merge branch 'linus' into pci-for-jesseIngo Molnar2008-07-18
| |\
| * | pci: debug extra pci resources rangeYinghai Lu2008-06-23
| | | | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | PCI: check the return value of device_create_bin_file() in pci_create_bus()Simon Horman2008-08-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check the return value of device_create_bin_file in pci_create_bus and unwind if necessary. Don't propagate error to caller, as failure to create these files shouldn't prevent PCI from being initialised. Instead, just log a warning. Cc: Sven Wegener <sven.wegener@stealer.net> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: disable ASPM on pre-1.1 PCIe devicesShaohua Li2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Disable ASPM on pre-1.1 PCIe devices, as many of them don't implement it correctly. Tested-by: Jack Howarth <howarth@bromo.msbb.uc.edu> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: handle 64-bit resources better on 32-bit machinesMatthew Wilcox2008-07-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the kernel is configured to support 64-bit resources on a 32-bit machine, we can support 64-bit BARs properly. Just change the condition to check sizeof(resource_size_t) instead of BITS_PER_LONG. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | PCI: rewrite PCI BAR reading codeMatthew Wilcox2008-07-28
| |/ |/| | | | | | | | | | | | | | | Factor out the code to read one BAR from the loop in pci_read_bases into a new function, __pci_read_base. The new code is slightly more readable, better commented and removes the ifdef. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI ACPI: Rework PCI handling of wake-upRafael J. Wysocki2008-07-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Introduce function acpi_pm_device_sleep_wake() for enabling and disabling the system wake-up capability of devices that are power manageable by ACPI. * Introduce function acpi_bus_can_wakeup() allowing other (dependent) subsystems to check if ACPI is able to enable the system wake-up capability of given device. * Introduce callback .sleep_wake() in struct pci_platform_pm_ops and for the ACPI PCI 'driver' make it use acpi_pm_device_sleep_wake(). * Introduce callback .can_wakeup() in struct pci_platform_pm_ops and for the ACPI 'driver' make it use acpi_bus_can_wakeup(). * Move the PME# handlig code out of pci_enable_wake() and split it into two functions, pci_pme_capable() and pci_pme_active(), allowing the caller to check if given device is capable of generating PME# from given power state and to enable/disable the device's PME# functionality, respectively. * Modify pci_enable_wake() to use the new ACPI callbacks and the new PME#-related functions. * Drop the generic .platform_enable_wakeup() callback that is not used any more. * Introduce device_set_wakeup_capable() that will set the power.can_wakeup flag of given device. * Rework PCI device PM initialization so that, if given device is capable of generating wake-up events, either natively through the PME# mechanism, or with the help of the platform, its power.can_wakeup flag is set and its power.should_wakeup flag is unset as appropriate. * Make ACPI set the power.can_wakeup flag for devices found to be wake-up capable by it. * Make the ACPI wake-up code enable/disable GPEs for devices that have the wakeup.flags.prepared flag set (which means that their wake-up power has been enabled). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: handle pci_name() being constGreg Kroah-Hartman2008-07-03
| | | | | | | | | | | | | | | | This changes pci_setup_device to handle pci_name() now returning a constant string. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: fix pci_setup_device()'s sprinting into a const bufferDavid Howells2008-06-27
| | | | | | | | | | | | | | | | | | Make pci_setup_device() write the bus ID directly into the allotted storage, rather than using pci_name() as the address as that now returns a const pointer. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: use dev_printk when possibleBjorn Helgaas2008-06-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert printks to use dev_printk(). I converted pr_debug() to dev_dbg(). Both use KERN_DEBUG and are enabled only when DEBUG is defined. I converted printk(KERN_DEBUG) to dev_printk(KERN_DEBUG), not to dev_dbg(), because dev_dbg() is only enabled when DEBUG is defined. I converted DBG(KERN_INFO) (only in setup-bus.c) to dev_info(). The DBG() name makes it sound like debug, but it's been enabled forever, so dev_info() preserves the previous behavior. I tried to make the resource assignment formats more consistent, e.g., "BAR %d: got res [%#llx-%#llx] bus [%#llx-%#llx] flags %#lx\n" instead of sometimes using "start-end" and sometimes using "size@start". I'm not attached to one or the other; I'd just like them consistent. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: introduce pci_slotAlex Chiang2008-06-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, /sys/bus/pci/slots/ only exposes hotplug attributes when a hotplug driver is loaded, but PCI slots have attributes such as address, speed, width, etc. that are not related to hotplug at all. Introduce pci_slot as the primary data structure and kobject model. Hotplug attributes described in hotplug_slot become a secondary structure associated with the pci_slot. This patch only creates the infrastructure that allows the separation of PCI slot attributes and hotplug attributes. In this patch, the PCI hotplug core remains the only user of this infrastructure, and thus, /sys/bus/pci/slots/ will still only become populated when a hotplug driver is loaded. A later patch in this series will add a second user of this new infrastructure and demonstrate splitting the task of exposing pci_slot attributes from hotplug_slot attributes. - Make pci_slot the primary sysfs entity. hotplug_slot becomes a subsidiary structure. o pci_create_slot() creates and registers a slot with the PCI core o pci_slot_add_hotplug() gives it hotplug capability - Change the prototype of pci_hp_register() to take the bus and slot number (on parent bus) as parameters. - Remove all the ->get_address methods since this functionality is now handled by pci_slot directly. [achiang@hp.com: rpaphp-correctly-pci_hp_register-for-empty-pci-slots] Tested-by: Badari Pulavarty <pbadari@us.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: make headers_check happy] [akpm@linux-foundation.org: nuther build fix] [akpm@linux-foundation.org: fix typo in #include] Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Matthew Wilcox <matthew@wil.cx> Cc: Greg KH <greg@kroah.com> Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Cc: Len Brown <lenb@kernel.org> Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | PCI: Disable PME during PCI scanZhao Yakui2008-06-10
|/ | | | | | | | | | | | | | | | | | | If a device supports #PME and can generate PME events from D0, we may see superfluous events before a driver is loaded (drivers should only enable PME as needed), preventing suspend from working if the corresponding GPE was enabled. Likewise, if the ACPI device has the _PRW object, the _PSW/_DSW object will be called in order to disable the wakeup functionality. But when it is allowed to wake up the sleeping state, OSPM will enable it again. So we should disable PME in the course of scanning PCI devices and enable it again only when PME events are actually required to be generated from the requested PCI state (for example, D3_hot or D3_cold). It is also safe to disable PME again when the PME is disabled for the PCI devices. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Li Shaohua <shaohua.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/pci: remove flag in pci_cfg_space_size_extYinghai Lu2008-04-29
| | | | | | | so let pci_cfg_space_size call it directly without flag. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86: multi pci root bus with different io resource range, on 64-bitYinghai Lu2008-04-26
| | | | | | | | | | | | scan AMD opteron io/mmio routing to make sure every pci root bus get correct resource range. Thus later pci scan could assign correct resource to device with unassigned resource. this can fix a system without _CRS for multi pci root bus. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* driver core: try parent numa_node at first before using defaultYinghai Lu2008-04-26
| | | | | | | | | | in the device_add, we try to use use parent numa_node. need to make sure pci root bus's bridge device numa_node is set. then we could use device->numa_node direclty for all device. and don't need to call pcibus_to_node(). Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86_64: set cfg_size for AMD Family 10h in case MMCONFIGYinghai Lu2008-04-26
| | | | | | | | | | | reuse pci_cfg_space_size but skip check pci express and pci-x CAP ID. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Cc: Andrew Morton <akpm@linux-foundation.org> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6Linus Torvalds2008-04-21
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6: (42 commits) PCI: Change PCI subsystem MAINTAINER PCI: pci-iommu-iotlb-flushing-speedup PCI: pci_setup_bridge() mustn't be __devinit PCI: pci_bus_size_cardbus() mustn't be __devinit PCI: pci_scan_device() mustn't be __devinit PCI: pci_alloc_child_bus() mustn't be __devinit PCI: replace remaining __FUNCTION__ occurrences PCI: Hotplug: fakephp: Return success, not ENODEV, when bus rescan is triggered PCI: Hotplug: Fix leaks in IBM Hot Plug Controller Driver - ibmphp_init_devno() PCI: clean up resource alignment management PCI: aerdrv_acpi.c: remove unneeded NULL check PCI: Update VIA CX700 quirk PCI: Expose PCI VPD through sysfs PCI: iommu: iotlb flushing PCI: simplify quirk debug output PCI: iova RB tree setup tweak PCI: parisc: use generic pci_enable_resources() PCI: ppc: use generic pci_enable_resources() PCI: powerpc: use generic pci_enable_resources() PCI: ia64: use generic pci_enable_resources() ...
| * PCI: pci_scan_device() mustn't be __devinitAdrian Bunk2008-04-21
| | | | | | | | | | | | | | | | | | WARNING: drivers/pci/built-in.o(.text+0x150f): Section mismatch in reference from the function pci_scan_single_device() to the function .devinit.text:pci_scan_device() Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: pci_alloc_child_bus() mustn't be __devinitAdrian Bunk2008-04-21
| | | | | | | | | | | | | | | | | | WARNING: drivers/pci/built-in.o(.text+0xc4c): Section mismatch in reference from the function pci_add_new_bus() to the function .devinit.text:pci_alloc_child_bus() Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: clean up resource alignment managementIvan Kokshaysky2008-04-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Done per Linus' request and suggestions. Linus has explained that better than I'll be able to explain: On Thu, Mar 27, 2008 at 10:12:10AM -0700, Linus Torvalds wrote: > Actually, before we go any further, there might be a less intrusive > alternative: add just a couple of flags to the resource flags field (we > still have something like 8 unused bits on 32-bit), and use those to > implement a generic "resource_alignment()" routine. > > Two flags would do it: > > - IORESOURCE_SIZEALIGN: size indicates alignment (regular PCI device > resources) > > - IORESOURCE_STARTALIGN: start field is alignment (PCI bus resources > during probing) > > and then the case of both flags zero (or both bits set) would actually be > "invalid", and we would also clear the IORESOURCE_STARTALIGN flag when we > actually allocate the resource (so that we don't use the "start" field as > alignment incorrectly when it no longer indicates alignment). > > That wouldn't be totally generic, but it would have the nice property of > automatically at least add sanity checking for that whole "res->start has > the odd meaning of 'alignment' during probing" and remove the need for a > new field, and it would allow us to have a generic "resource_alignment()" > routine that just gets a resource pointer. Besides, I removed IORESOURCE_BUS_HAS_VGA flag which was unused for ages. Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Gary Hade <garyhade@us.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: Expose PCI VPD through sysfsBen Hutchings2008-04-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vital Product Data (VPD) may be exposed by PCI devices in several ways. It is generally unsafe to read this information through the existing interfaces to user-land because of stateful interfaces. This adds: - abstract operations for VPD access (struct pci_vpd_ops) - VPD state information in struct pci_dev (struct pci_vpd) - an implementation of the VPD access method specified in PCI 2.2 (in access.c) - a 'vpd' binary file in sysfs directories for PCI devices with VPD operations defined It adds a probe for PCI 2.2 VPD in pci_scan_device() and release of VPD state in pci_release_dev(). Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: add PCI Express ASPM supportShaohua Li2008-04-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI Express ASPM defines a protocol for PCI Express components in the D0 state to reduce Link power by placing their Links into a low power state and instructing the other end of the Link to do likewise. This capability allows hardware-autonomous, dynamic Link power reduction beyond what is achievable by software-only controlled power management. However, The device should be configured by software appropriately. Enabling ASPM will save power, but will introduce device latency. This patch adds ASPM support in Linux. It introduces a global policy for ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control it. The interface can be used as a boot option too. Currently we have below setting: -default, BIOS default setting -powersave, highest power saving mode, enable all available ASPM state and clock power management -performance, highest performance, disable ASPM and clock power management By default, the 'default' policy is used currently. In my test, power difference between powersave mode and performance mode is about 1.3w in a system with 3 PCIE links. Note: some devices might not work well with aspm, either because chipset issue or device issue. The patch provide API (pci_disable_link_state), driver can disable ASPM for specific device. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: Include PCI domain in PCI bus names on x86/x86_64Gary Hade2008-04-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI bus names included in /proc/iomem and /proc/ioports are of the form 'PCI Bus #XX' where XX is the bus number. This patch changes the naming to 'PCI Bus XXXX:YY' where XXXX is the domain number and YY is the bus number. For example, PCI bus 14 in domain 0 will show as 'PCI Bus 0000:14' instead of 'PCI Bus #14'. This change makes the naming consistent with other architectures such as ia64 where multiple PCI domain support has been around longer. Signed-off-by: Gary Hade <garyhade@us.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: remove global list of PCI devicesGreg Kroah-Hartman2008-04-21
| | | | | | | | | | | | | | | | | | This patch finally removes the global list of PCI devices. We are relying entirely on the list held in the driver core now, and do not need a separate "shadow" list as no one uses it. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: add is_added flag to struct pci_devGreg Kroah-Hartman2008-04-21
| | | | | | | | | | | | | | | | | | | | This lets us check if the device is really added to the driver core or not, which is what we need when walking some of the bus lists. The flag is there in anticipation of getting rid of the other PCI device list, which is what we used to check in this situation. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: make no_pci_devices() use the pci_bus_type listGreg Kroah-Hartman2008-04-21
| | | | | | | | | | | | | | | | no_pci_devices() should use the driver core list of PCI devices, not our "separate" one. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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