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path: root/drivers/pci/pci.c
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* PM: Introduce PM_EVENT_HIBERNATE callback stateRafael J. Wysocki2008-02-23
| | | | | | | | | | | | | | | | | | | | | | | | | During the last step of hibernation in the "platform" mode (with the help of ACPI) we use the suspend code, including the devices' ->suspend() methods, to prepare the system for entering the ACPI S4 system sleep state. But at least for some devices the operations performed by the ->suspend() callback in that case must be different from its operations during regular suspend. For this reason, introduce the new PM event type PM_EVENT_HIBERNATE and pass it to the device drivers' ->suspend() methods during the last phase of hibernation, so that they can distinguish this case and handle it as appropriate. Modify the drivers that handle PM_EVENT_SUSPEND in a special way and need to handle PM_EVENT_HIBERNATE in the same way. These changes are necessary to fix a hibernation regression related to the i915 driver (ref. http://lkml.org/lkml/2008/2/22/488). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Pavel Machek <pavel@ucw.cz> Tested-by: Jeff Chua <jeff.chua.linux@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* iommu sg merging: PCI: add dma segment boundary supportFUJITA Tomonori2008-02-05
| | | | | | | | | | | | | | | This adds PCI's accessor for segment_boundary_mask in device_dma_parameters. The default segment_boundary is set to 0xffffffff, same to the block layer's default value (and the scsi mid layer uses the same value). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: Greg KH <greg@kroah.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* iommu sg merging: PCI: add device_dma_parameters supportFUJITA Tomonori2008-02-05
| | | | | | | | | | | | | | | This adds struct device_dma_parameters in struct pci_dev and properly sets up a pointer in struct device. The default max_segment_size is set to 64K, same to the block layer's default value. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Mostly-acked-by: Jeff Garzik <jeff@garzik.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Acked-by: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Revert "PCI: PCIE ASPM support"Greg Kroah-Hartman2008-02-02
| | | | | | | | | | | This reverts commit 6c723d5bd89f03fc3ef627d50f89ade054d2ee3b. It caused build errors on non-x86 platforms, config file confusion, and even some boot errors on some x86-64 boxes. All around, not quite ready for prime-time :( Cc: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6Linus Torvalds2008-02-01
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6: (64 commits) PCI: make pci_bus a struct device PCI: fix codingstyle issues in include/linux/pci.h PCI: fix codingstyle issues in drivers/pci/pci.h PCI: PCIE ASPM support PCI: Fix fakephp deadlock PCI: modify SB700 SATA MSI quirk PCI: Run ACPI _OSC method on root bridges only PCI ACPI: AER driver should only register PCIe devices with _OSC PCI ACPI: Added a function to register _OSC with only PCIe devices. PCI: constify function pointer tables PCI: Convert drivers/pci/proc.c to use unlocked_ioctl pciehp: block new requests from the device before power off pciehp: workaround against Bad DLLP during power off pciehp: wait for 1000ms before LED operation after power off PCI: Remove pci_enable_device_bars() from documentation PCI: Remove pci_enable_device_bars() PCI: Remove users of pci_enable_device_bars() PCI: Add pci_enable_device_{io,mem} intefaces PCI: avoid save the same type of cap multiple times PCI: correctly initialize a structure for pcie_save_pcix_state() ...
| * PCI: PCIE ASPM supportShaohua Li2008-02-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI Express ASPM defines a protocol for PCI Express components in the D0 state to reduce Link power by placing their Links into a low power state and instructing the other end of the Link to do likewise. This capability allows hardware-autonomous, dynamic Link power reduction beyond what is achievable by software-only controlled power management. However, The device should be configured by software appropriately. Enabling ASPM will save power, but will introduce device latency. This patch adds ASPM support in Linux. It introduces a global policy for ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control it. The interface can be used as a boot option too. Currently we have below setting: -default, BIOS default setting -powersave, highest power saving mode, enable all available ASPM state and clock power management -performance, highest performance, disable ASPM and clock power management By default, the 'default' policy is used currently. In my test, power difference between powersave mode and performance mode is about 1.3w in a system with 3 PCIE links. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: Remove pci_enable_device_bars()Benjamin Herrenschmidt2008-02-01
| | | | | | | | | | | | | | | | | | Now that all in-tree users are gone, this removes pci_enable_device_bars() completely. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: Add pci_enable_device_{io,mem} intefacesBenjamin Herrenschmidt2008-02-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci_enable_device_bars() interface isn't well suited to PCI because you can't actually enable/disable BARs individually on a device. So for example, if a device has 2 memory BARs 0 and 1, and one of them (let's say 1) has not been successfully allocated by the firmware or the kernel, then enabling memory decoding shouldn't be permitted for the entire device since it will decode whatever random address is still in that BAR 1. So a device must be either fully enabled for IO, for Memory, or for both. Not on a per-BAR basis. This provides two new functions, pci_enable_device_io() and pci_enable_device_mem() to replace pci_enable_device_bars(). The implementation internally builds a BAR mask in order to be able to use existing arch infrastructure. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: avoid save the same type of cap multiple timesShaohua Li2008-02-01
| | | | | | | | | | | | | | | | Avoid adding the same type of cap multiple times, otherwise we will see dead loop. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: correctly initialize a structure for pcie_save_pcix_state()Shaohua Li2008-02-01
| | | | | | | | | | | | | | | | | | save_state->cap_nr should be correctly set, otherwise we can't find the saved cap at resume. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: fix typo in pci_save_pcix_stateShaohua Li2008-02-01
| | | | | | | | | | | | | | | | | | | | | | | | pci_save/store_state has multiple bugs, which will cause cap can't be saved/restored correctly. Below 3 patches fix them. fix the typo in pci_save_pcix_state Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * pcie: utilize pcie transaction pending bitShaohua Li2008-02-01
| | | | | | | | | | | | | | | | | | PCIE has a mechanism to wait for Non-Posted request to complete. I think pci_disable_device is a good place to do this. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * PCI: make pci_restore_bars() staticAdrian Bunk2008-02-01
| | | | | | | | | | | | | | | | This patch makes the needlessly global pci_restore_bars() static. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | pci: allow multiple calls to pcim_enable_device()Tejun Heo2008-02-01
|/ | | | | | | | | | | | | There's no reason not to allow multiple calls to pcim_enable_device(). Calls after the first one can simply be noop. All PCI resources will be released when the initial pcim_enable_device() resource is released. This allows more flexibility to managed PCI users. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* more trivial signedness fixes in driversAl Viro2007-10-14
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: Add 'nodomains' boot option, and pci_domains_supported globalJeff Garzik2007-10-12
| | | | | | | | | | | | | | * Introduce pci_domains_supported global, hardcoded to zero if !CONFIG_PCI_DOMAINS. * Introduce 'nodomains' boot option, which clears pci_domains_supported on platforms that enable it by default (x86, x86-64, and others when they are converted to use this). Signed-off-by: Jeff Garzik <jgarzik@redhat.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* pci: implement "pci=noaer"Randy Dunlap2007-10-12
| | | | | | | | | | | | For cases in which CONFIG_PCIEAER=y (such as distro kernels), allow users to disable PCIE Advanced Error Reporting by using "pci=noaer" on the kernel command line. This can be used to work around hardware or (kernel) software problems. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: is_power_of_2 in drivers/pci/pci.cvignesh babu2007-10-12
| | | | | | | | Replacing n & (n - 1) for power of 2 check by is_power_of_2(n) Signed-off-by: vignesh babu <vignesh.babu@wipro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* pci: rename __pci_reenable_device() to pci_reenable_device()Tejun Heo2007-08-01
| | | | | | | Rename __pci_reenable_device() to pci_reenable_device(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* kernel-doc fixes for PCI and drivers/base/Randy Dunlap2007-07-30
| | | | | | | | | | | Fix undocumented function parameters in PCI and drivers/base. Warning(linux-2.6.23-rc1//drivers/pci/pci.c:1526): No description found for parameter 'rq' Warning(linux-2.6.23-rc1//drivers/base/firmware_class.c:245): No description found for parameter 'bin_attr' Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge branch 'release' of ↵Linus Torvalds2007-07-25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6: ACPI: Kconfig: remove CONFIG_ACPI_SLEEP from source ACPI: quiet ACPI Exceptions due to no _PTC or _TSS ACPI: Remove references to ACPI_STATE_S2 from acpi_pm_enter ACPI: Kconfig: always enable CONFIG_ACPI_SLEEP on X86 ACPI: Kconfig: fold /proc/acpi/sleep under CONFIG_ACPI_PROCFS ACPI: Kconfig: CONFIG_ACPI_PROCFS now defaults to N ACPI: autoload modules - Create __mod_acpi_device_table symbol for all ACPI drivers ACPI: autoload modules - Create ACPI alias interface ACPI: autoload modules - ACPICA modifications ACPI: asus-laptop: Fix failure exits ACPI: fix oops due to typo in new throttling code ACPI: ignore _PSx method for hotplugable PCI devices ACPI: Use ACPI methods to select PCI device suspend state ACPI, PNP: hook ACPI D-state to PNP suspend/resume ACPI: Add acpi_pm_device_sleep_state helper routine ACPI: Implement the set_target() callback from pm_ops
| * ACPI: Use ACPI methods to select PCI device suspend stateShaohua Li2007-07-22
| | | | | | | | | | | | | | | | applied after Rafel's 'PM: Update global suspend and hibernation operations framework' patch set Signed-off-by: Shaohua Li<shaohua.li@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* | PCI: export __pci_reenable_device()Tejun Heo2007-07-24
|/ | | | | | | | | | Some odd ACPI implementations choke if certain controller is disabled when ACPI suspend is invoked but we still need to make sure the PCI device is enabled during resume. Simply using pci_enable_device() unbalances device enable count. Export __pci_reenable_device(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* PCI: pci_set_power_state(): check for PM capabilities earlierAndrew Lunn2007-07-11
| | | | | | | | | | Check for PCI_CAP_ID_PM before checking the device state. Apparently fixes some log spam via the 3c59x driver. Signed-off-by: Andrew Lunn <andrew.lunn@ascom.ch> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: add pci_try_set_mwiRandy Dunlap2007-07-11
| | | | | | | | | | | | | | | As suggested by Andrew, add pci_try_set_mwi(), which does not require return-value checking. - add pci_try_set_mwi() without __must_check - make it return 0 on success, errno if the "try" failed or error - review callers Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: pci-x-pci-express-read-control-interfaces cleanupsAndrew Morton2007-07-11
| | | | | | | | | | | | - remove unneeded local - 80-col fix Cc: Peter Oruba <peter.oruba@amd.com> Cc: Roland Dreier <rolandd@cisco.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: add PCI-X/PCI-Express read control interfacesPeter Oruba2007-07-11
| | | | | | | | | | | | | | | This patch introduces an interface to read and write PCI-X / PCI-Express maximum read byte count values from PCI config space. There is a second function that returns the maximum _designed_ read byte count, which marks the maximum value for a device, since some drivers try to set MMRBC to the highest allowed value and rely on such a function. Based on patch set by Stephen Hemminger <shemminger@linux-foundation.org> Cc: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Peter Oruba <peter.oruba@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* pci: do not mark exported functions as __devinitSam Ravnborg2007-05-02
| | | | | | | | | | | | | | | | | | | | | | | Functions marked __devinit will be removed after kernel init. But being exported they are potentially called by a module much later. So the safer choice seems to be to keep the function even in the non CONFIG_HOTPLUG case. This silence the follwoing section mismatch warnings: WARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_add_device from __ksymtab_gpl between '__ksymtab_pci_bus_add_device' (at offset 0x20) and '__ksymtab_pci_walk_bus' WARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_create_bus from __ksymtab_gpl between '__ksymtab_pci_create_bus' (at offset 0x40) and '__ksymtab_pci_stop_bus_device' WARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_max_busnr from __ksymtab_gpl between '__ksymtab_pci_bus_max_busnr' (at offset 0xc0) and '__ksymtab_pci_assign_resource_fixed' WARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_claim_resource from __ksymtab_gpl between '__ksymtab_pci_claim_resource' (at offset 0xe0) and '__ksymtab_pcie_port_bus_type' WARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_add_devices from __ksymtab between '__ksymtab_pci_bus_add_devices' (at offset 0x70) and '__ksymtab_pci_bus_alloc_resource' WARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_scan_bus_parented from __ksymtab between '__ksymtab_pci_scan_bus_parented' (at offset 0x90) and '__ksymtab_pci_root_buses' WARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_assign_resources from __ksymtab between '__ksymtab_pci_bus_assign_resources' (at offset 0x4d0) and '__ksymtab_pci_bus_size_bridges' WARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_size_bridges from __ksymtab between '__ksymtab_pci_bus_size_bridges' (at offset 0x4e0) and '__ksymtab_pci_setup_cardbus' Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: kernel-doc fixRandy Dunlap2007-05-02
| | | | | | | | Warning(linux-2621-rc3g7/drivers/pci/pci.c:1283): No description found for parameter 'dev' Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* pci: New PCI-E reset APIBrian King2007-05-02
| | | | | | | | | | | | | | | | Adds a new API which can be used to issue various types of PCI-E reset, including PCI-E warm reset and PCI-E hot reset. This is needed for an ipr PCI-E adapter which does not properly implement BIST. Running BIST on this adapter results in PCI-E errors. The only reliable reset mechanism that exists on this hardware is PCI Fundamental reset (warm reset). Since driving this type of reset is architecture unique, this provides the necessary hooks for architectures to add this support. Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Acked-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* define platform wakeup hook, use in pci_enable_wake()David Brownell2007-04-27
| | | | | | | | | | | | | | | | | | | | This defines a platform hook to enable/disable a device as a wakeup event source. It's initially for use with ACPI, but more generally it could be used whenever enable_irq_wake()/disable_irq_wake() don't suffice. The hook is called -- if available -- inside pci_enable_wake(); and the semantics of that call are enhanced so that support for PCI PME# is no longer needed. It can now work for devices with "legacy PCI PM", when platform support allows it. (That support would use some board-specific signal for for the same purpose as PME#.) [akpm@linux-foundation.org: Make it compile with CONFIG_PM=n] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Cc: Len Brown <lenb@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] pci: Repair pci_save/restore_state so we can restore one save many ↵Eric W. Biederman2007-03-12
| | | | | | | | | | | | | | | | | | | | | times. Because we do not reserve space for the pci-x and pci-e state in struct pci dev we need to dynamically allocate it. However because we need to support restore being called multiple times after a single save it is never safe to free the buffers we have allocated to hold the state. So this patch modifies the save routines to first check to see if we have already allocated a state buffer before allocating a new one. Then the restore routines are modified to not free the state after restoring it. Simple and it fixes some subtle error path handling bugs, that are hard to test for. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Acked-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [PATCH] msi: Safer state caching.Eric W. Biederman2007-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two ways pci_save_state and pci_restore_state are used. As helper functions during suspend/resume, and as helper functions around a hardware reset event. When used as helper functions around a hardware reset event there is no reason to believe the calls will be paired, nor is there a good reason to believe that if we restore the msi state from before the reset that it will match the current msi state. Since arch code may change the msi message without going through the driver, drivers currently do not have enough information to even know when to call pci_save_state to ensure they will have msi state in sync with the other kernel irq reception data structures. It turns out the solution is straight forward, cache the state in the existing msi data structures (not the magic pci saved things) and have the msi code update the cached state each time we write to the hardware. This means we never need to read the hardware to figure out what the hardware state should be. By modifying the caching in this manner we get to remove our save_state routines and only need to provide restore_state routines. The only fields that were at all tricky to regenerate were the msi and msi-x control registers and the way we regenerate them currently is a bit dependent upon assumptions on how we use the allow msi registers to be configured and used making the code a little bit brittle. If we ever change what cases we allow or how we configure the msi bits we can address the fragility then. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Acked-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: allow multiple calls to pcim_pin_device()Tejun Heo2007-03-09
| | | | | | | | | | | | | Sanity check in pcim_pin_device() was too restrictive in that it didn't allow multiple calls to the function, which is against the devres philosohpy of fire-and-forget. Track pinned status separately and allow pinning multiple times. Signed-off-by: Tejun Heo <htejun@gmail.com> Acked-by: Ian McDonald <ian.mcdonald@jandi.co.nz> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] msi: sanely support hardware level msi disablingEric W. Biederman2007-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases when we are not using msi we need a way to ensure that the hardware does not have an msi capability enabled. Currently the code has been calling disable_msi_mode to try and achieve that. However disable_msi_mode has several other side effects and is only available when msi support is compiled in so it isn't really appropriate. Instead this patch implements pci_msi_off which disables all msi and msix capabilities unconditionally with no additional side effects. pci_disable_device was redundantly clearing the bus master enable flag and clearing the msi enable bit. A device that is not allowed to perform bus mastering operations cannot generate intx or msi interrupt messages as those are essentially a special case of dma, and require bus mastering. So the call in pci_disable_device to disable msi capabilities was redundant. quirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: Make CARDBUS_MEM_SIZE and CARDBUS_IO_SIZE boot optionsAtsushi Nemoto2007-02-16
| | | | | | | | | | | | | | | | CARDBUS_MEM_SIZE was increased to 64MB on 2.6.20-rc2, but larger size might result in allocation failure for the reserving itself on some platforms (for example typical 32bit MIPS). Make it (and CARDBUS_IO_SIZE too) customizable by "pci=" option for such platforms. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Cc: Daniel Ritz <daniel.ritz@gmx.ch> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI/sysfs/kobject kernel-doc fixesRandy Dunlap2007-02-16
| | | | | | | | Fix kernel-doc warnings in PCI, sysfs, and kobject files. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* devres: device resource managementTejun Heo2007-02-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement device resource management, in short, devres. A device driver can allocate arbirary size of devres data which is associated with a release function. On driver detach, release function is invoked on the devres data, then, devres data is freed. devreses are typed by associated release functions. Some devreses are better represented by single instance of the type while others need multiple instances sharing the same release function. Both usages are supported. devreses can be grouped using devres group such that a device driver can easily release acquired resources halfway through initialization or selectively release resources (e.g. resources for port 1 out of 4 ports). This patch adds devres core including documentation and the following managed interfaces. * alloc/free : devm_kzalloc(), devm_kzfree() * IO region : devm_request_region(), devm_release_region() * IRQ : devm_request_irq(), devm_free_irq() * DMA : dmam_alloc_coherent(), dmam_free_coherent(), dmam_declare_coherent_memory(), dmam_pool_create(), dmam_pool_destroy() * PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed() * iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(), devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(), pcim_iomap(), pcim_iounmap() Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* MSI: Combine pci_(save|restore)_msi/msix_stateMichael Ellerman2007-02-07
| | | | | | | | | | | | | | | | The PCI save/restore code doesn't need to care about MSI vs MSI-X, all it really wants is to say "save/restore all MSI(-X) info for this device". This is borne out in the code, we call the MSI and MSI-X save routines side by side, and similarly with the restore routines. So combine the MSI/MSI-X routines into pci_save_msi_state() and pci_restore_msi_state(). It is up to those routines to decide what state needs to be saved. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: power management: remove noise on non-manageable hwPavel Machek2007-02-07
| | | | | | | | | Return early from pci_set_power_state() if hardware does not support power management. This way, we do not generate noise in the logs. Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: make isa_bridge Alpha-onlyAdrian Bunk2007-02-07
| | | | | | | | | Since isa_bridge is neither assigned any value !NULL nor used on !Alpha, there's no reason for providing it. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: quirks.c: cleanupAdrian Bunk2007-02-07
| | | | | | | | | | | | This patch contains the following cleanups: - move all EXPORT_SYMBOL's directly below the code they are exporting - move all DECLARE_PCI_FIXUP_*'s directly below the functions they are calling Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI : Add selected_regions funcsHidetoshi Seto2007-02-07
| | | | | | | | | | | | | | | | | | | This patch adds the following changes into generic PCI code especially for PCI legacy I/O port free drivers. - Added new pci_request_selected_regions() and pci_release_selected_regions() for PCI legacy I/O port free drivers in order to request/release only the selected regions. - Added helper routine pci_select_bars() which makes proper mask of BARs from the specified resource type. This would be very helpful for users of pci_enable_device_bars(). Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Inaky Perez-Gonzalez <inaky@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI : add extremely specialized __pci_reenable_device for default resumeHidetoshi Seto2007-02-07
| | | | | | | | | | | | | | | Original patch was posted as "PCI : Move pci_fixup_device and is_enabled". This 3 of 3 patches does: - add __pci_reenable_device (recover former change of 1st patch) Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Inaky Perez-Gonzalez <inaky@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI : Move pci_fixup_device and is_enabled (originally intended change)Hidetoshi Seto2007-02-07
| | | | | | | | | | | | | | | | | Original patch was posted as "PCI : Move pci_fixup_device and is_enabled". This 2 of 3 patches does: - Move pci_fixup_device and enable_cnt (originally intended change) - relocate pci_fixup_device (recover latter change of 1st patch) Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Inaky Perez-Gonzalez <inaky@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI : remove too specialized __pci_enable_device for default resumeHidetoshi Seto2007-02-07
| | | | | | | | | | | | | | | | | | Original patch was posted as "PCI : Move pci_fixup_device and is_enabled". This 1 of 3 patches does: - reverts small part of Inaky's patch (remove __pci_enable_device) This change will be recovered by 3rd patch. - temporarily remove pci_fixup_device. This change will be recovered by 2nd patch. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Inaky Perez-Gonzalez <inaky@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] increment pos before looking for the next cap in __pci_find_next_ht_capBrice Goglin2007-01-11
| | | | | | | | | | | | | | | | | | | | | | While testing 2.6.20-rc3 on a machine with some CK804 chipsets, we noticed that quirk_nvidia_ck804_msi_ht_cap() was not detecting HT MSI capabilities anymore. It is actually caused by the MSI mapping on the root chipset being the 2nd HT capability in the chain. pci_find_ht_capability() does not seem to find anything but the first HT cap correctly, because it forgets to increment the position before looking for the next cap. The following patch seems to fix it. At least, this proves that having a ttl is good idea since the machine would have been stucked in an infinite loop if we didn't have a ttl :) We have to pass pos + PCI_CAP_LIST_NEXT to __pci_find_next_cap_ttl to get the next HT cap instead of the same one again. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Andrew J. Gallatin <gallatin@myri.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* PCI: Add pci_find_ht_capability() for finding Hypertransport capabilitiesMichael Ellerman2006-12-20
| | | | | | | | | | | | | | | | | | There are already several places in the kernel that want to search a PCI device for a given Hypertransport capability. Although this is possible using pci_find_capability() etc., it makes sense to encapsulate that logic in a helper - pci_find_ht_capability(). To cater for searching exhaustively for a capability, we also provide pci_find_next_ht_capability(). We also need to cater for the fact that the HT capability fields may be either 3 or 5 bits wide. pci_find_ht_capability() deals with this for you, but callers using the #defines directly must handle that themselves. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Create __pci_bus_find_cap_start() from __pci_bus_find_cap()Michael Ellerman2006-12-20
| | | | | | | | | | | | | The current implementation of __pci_bus_find_cap() does two things, first it determines the start of the capability chain for the device, and then it trys to find the requested capability. Split these out, so that we can use the two parts independantly in a subsequent patch. Externally visible behaviour should be unchanged. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: switch pci_{enable,disable}_device() to be nestableInaky Perez-Gonzalez2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes the pci_{enable,disable}_device() functions to work in a nested basis, so that eg, three calls to enable_device() require three calls to disable_device(). The reason for this is to simplify PCI drivers for multi-interface/capability devices. These are devices that cram more than one interface in a single function. A relevant example of that is the Wireless [USB] Host Controller Interface (similar to EHCI) [see http://www.intel.com/technology/comms/wusb/whci.htm]. In these kind of devices, multiple interfaces are accessed through a single bar and IRQ line. For that, the drivers map only the smallest area of the bar to access their register banks and use shared IRQ handlers. However, because the order at which those drivers load cannot be known ahead of time, the sequence in which the calls to pci_enable_device() and pci_disable_device() cannot be predicted. Thus: 1. driverA starts pci_enable_device() 2. driverB starts pci_enable_device() 3. driverA shutdown pci_disable_device() 4. driverB shutdown pci_disable_device() between steps 3 and 4, driver B would loose access to it's device, even if it didn't intend to. By using this modification, the device won't be disabled until all the callers to enable() have called disable(). This is implemented by replacing 'struct pci_dev->is_enabled' from a bitfield to an atomic use count. Each caller to enable increments it, each caller to disable decrements it. When the count increments from 0 to 1, __pci_enable_device() is called to actually enable the device. When it drops to zero, pci_disable_device() actually does the disabling. We keep the backend __pci_enable_device() for pci_default_resume() to use and also change the sysfs method implementation, so that userspace enabling/disabling the device doesn't disable it one time too much. Signed-off-by: Inaky Perez-Gonzalez <inaky@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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