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| * ixgbe: Only enable anti-spoof on VF poolsAlexander Duyck2012-07-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current logic is enabling anti-spoof on all pools and then clearing anti-spoof on just the first PF pool. The correct approach is to only set anti-spoof on the VF pools and to leave all of the PF pools unchecked. This allows for items such as FCoE to use adjacent pools within the PF for transmit and receive queues without the traffic being blocked by this security feature. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * ixgbe: Correctly set SAN MAC RAR pool to default pool of PFAlexander Duyck2012-07-19
| | | | | | | | | | | | | | | | | | | | | | | | | | This change corrects an issue in which an FCoE enabled adapter was always setting the FCoE SAN MAC MPSAR register to 0x1. This results in the first VF being assigned the SAN MAC address in the case of SR-IOV and as such is incorrect. To resolve this I am adding a new function that will update the SAN MAC pool address after reset. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * ixgbe: Make FCoE allocation and configuration closer to how rings workAlexander Duyck2012-07-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the behavior of the FCoE configuration so that it is much closer to how the main body of the ixgbe driver works for ring allocation. The first piece is the ixgbe_fcoe_ddp_enable/disable calls. These allocate the percpu values and if successful set the fcoe_ddp_xid value indicating that we can support DDP. The next piece is the ixgbe_setup/free_ddp_resources calls. These are called on open/close and will allocate and free the DMA pools. Finally ixgbe_configure_fcoe is now just register configuration. It can go through and enable the registers for the FCoE redirection offload, and FIP configuration without any interference from the DDP pool allocation. The net result of all this is two fold. First it adds a certain amount of exception handling. So for example if ixgbe_setup_fcoe_resources fails we will actually generate an error in open and refuse to bring up the interface. Secondly it provides a much more graceful failure case than the previous model which would skip setting up the registers for FCoE on failure to allocate DDP resources leaving no Rx functionality enabled instead of just disabling DDP. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * ixgbe: Merge all FCoE percpu values into a single structureAlexander Duyck2012-07-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change merges the 2 statistics values for noddp and noddp_ext_buff and the dma_pool into a single structure that can be allocated per CPU. The advantages to this are several fold. First we only need to do one alloc_percpu call now instead of 3, so that means less overhead for handling memory allocation failures. Secondly in the case of ixgbe_fcoe_ddp_setup we only need to call get_cpu once which makes things a bit cleaner since we can drop a put_cpu() from the exception path. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * ixgbe: Cleanup configuration of FCoE registersAlexander Duyck2012-07-19
| | | | | | | | | | | | | | | | | | | | | | This change makes it so we always use the FCoE redirection table. We just set all 8 entries to the same value in the case of only having one queue for FCoE. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * ixgbe: Drop references to deprecated pci_ DMA api and instead use dma_ APIAlexander Duyck2012-07-19
| | | | | | | | | | | | | | | | | | | | | | The networking side of the code had already been updated to use dma_ calls instead of the old pci_ calls. However it looks like the FCoE code was never updated. This change goes through and moves everything from the pci APIs to the dma APIs. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * ixgbe: Fix memory leak when SR-IOV VFs are direct assignedAlexander Duyck2012-07-19
| | | | | | | | | | | | | | | | | | | | | | | | | | The VF driver had a memory leak that would occur if VFs were assigned to a guest. The amount of leak would vary with the number of VFs but could max out at about 14K per PF. To reproduce the leak all you would need to do is enable all the VFs on the first PF. Then start a loop of loading and unloading the driver with max_vfs=63 for the first port. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * ixgbe: Use VMDq offset to indicate the default poolAlexander Duyck2012-07-19
| | | | | | | | | | | | | | | | | | | | | | | | | | This change makes it so that we can use the VMDq ring feature offset value to determine the default pool instead of using num_vfs. The reason for this change is to avoid issues should we fail to allocate vfinfo but have pre-existing VFs. What should happen in this case is that num_vfs will go to 0, but the VMDq offset will contain the location of the first PF pool. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Sibai Li <Sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: use PCI_VENDOR_ID_INTELJon Mason2012-07-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use PCI_VENDOR_ID_INTEL from pci_ids.h instead of creating its own vendor ID #define. Signed-off-by: Jon Mason <jdmason@kudzu.us> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Cc: Jesse Brandeburg <jesse.brandeburg@intel.com> Cc: Bruce Allan <bruce.w.allan@intel.com> Cc: Carolyn Wyborny <carolyn.wyborny@intel.com> Cc: Don Skidmore <donald.c.skidmore@intel.com> Cc: Greg Rose <gregory.v.rose@intel.com> Cc: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Cc: Alex Duyck <alexander.h.duyck@intel.com> Cc: John Ronciak <john.ronciak@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | ixgb: use PCI_VENDOR_ID_INTELJon Mason2012-07-20
|/ | | | | | | | | | | | | | | | | | Use PCI_VENDOR_ID_INTEL from pci_ids.h instead of creating its own vendor ID #define. Signed-off-by: Jon Mason <jdmason@kudzu.us> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Cc: Jesse Brandeburg <jesse.brandeburg@intel.com> Cc: Bruce Allan <bruce.w.allan@intel.com> Cc: Carolyn Wyborny <carolyn.wyborny@intel.com> Cc: Don Skidmore <donald.c.skidmore@intel.com> Cc: Greg Rose <gregory.v.rose@intel.com> Cc: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Cc: Alex Duyck <alexander.h.duyck@intel.com> Cc: John Ronciak <john.ronciak@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2012-07-19
|\ | | | | | | | | Conflicts: drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c
| * ixgbevf: Fix panic when loading driverAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses a kernel panic seen when setting up the interface. Specifically we see a NULL pointer dereference on the Tx descriptor cleanup path when enabling interrupts. This change corrects that so it cannot occur. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * Merge branch 'master' of ↵David S. Miller2012-07-17
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net Jeff Kirsher says: ==================== This series contains fixes to e1000e. ... Bruce Allan (1): e1000e: fix test for PHY being accessible on 82577/8/9 and I217 Tushar Dave (1): e1000e: Correct link check logic for 82571 serdes ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| | * e1000e: fix test for PHY being accessible on 82577/8/9 and I217Bruce Allan2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Occasionally, the PHY can be initially inaccessible when the first read of a PHY register, e.g. PHY_ID1, happens (signified by the returned value 0xFFFF) but subsequent accesses of the PHY work as expected. Add a retry counter similar to how it is done in the generic e1000_get_phy_id(). Also, when the PHY is completely inaccessible (i.e. when subsequent reads of the PHY_IDx registers returns all F's) and the MDIO access mode must be set to slow before attempting to read the PHY ID again, the functions that do these latter two actions expect the SW/FW/HW semaphore is not already set so the semaphore must be released before and re-acquired after calling them otherwise there is an unnecessarily inordinate amount of delay during device initialization. Reported-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| | * e1000e: Correct link check logic for 82571 serdesTushar Dave2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SYNCH bit and IV bit of RXCW register are sticky. Before examining these bits, RXCW should be read twice to filter out one-time false events and have correct values for these bits. Incorrect values of these bits in link check logic can cause weird link stability issues if auto-negotiation fails. CC: stable <stable@vger.kernel.org> [2.6.38+] Reported-by: Dean Nelson <dnelson@redhat.com> Signed-off-by: Tushar Dave <tushar.n.dave@intel.com> Reviewed-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * | ixgbevf: Prevent RX/TX statistics getting reset to zeroNarendra K2012-07-17
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 4197aa7bb81877ebb06e4f2cc1b5fea2da23a7bd implements 64 bit per ring statistics. But the driver resets the 'total_bytes' and 'total_packets' from RX and TX rings in the RX and TX interrupt handlers to zero. This results in statistics being lost and user space reporting RX and TX statistics as zero. This patch addresses the issue by preventing the resetting of RX and TX ring statistics to zero. Signed-off-by: Narendra K <narendra_k@dell.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: e100: ucode is optional in some casesBjørn Mork2012-07-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 9ac32e1b firmware: convert e100 driver to request_firmware() did a straight conversion of the in-driver ucode to external files. This introduced the possibility of the driver failing to enable an interface due to missing ucode. There was no evaluation of the importance of the ucode at the time. Based on comments in earlier versions of this driver, and in the source code for the FreeBSD fxp driver, we can assume that the ucode implements the "CPU Cycle Saver" feature on supported adapters. Although generally wanted, this is an optional feature. The ucode source is not available, preventing it from being included in free distributions. This creates unnecessary problems for the end users. Doing a network install based on a free distribution installer requires the user to download and insert the ucode into the installer. Making the ucode optional when possible improves the user experience and driver usability. The ucode for some adapters include a bugfix, making it essential. We continue to fail for these adapters unless the ucode is available. Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: David S. Miller <davem@davemloft.net>
* | ixgbe: Cleanup holes in flags after removing several of themAlexander Duyck2012-07-18
| | | | | | | | | | | | | | | | | | | | This change is just meant to defragment the flags as there are several hole that have been introduced since several features, or the flags for them, have been removed. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: Retire RSS enabled and capable flagsAlexander Duyck2012-07-18
| | | | | | | | | | | | | | | | | | | | | | All of our hardware supports RSS even if it is only for a single queue. So instead of toting around the RSS enable flag I am updating the code so that all devices are enabled and if we want to disable RSS it is indicated via the RSS mask. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: Add support for SR-IOV w/ DCB or RSSAlexander Duyck2012-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change essentially makes it so that we can enable almost all of the features all at once. This patch allows for the combination of SR-IOV, DCB, and FCoE in the case of the x540. It also beefs up the SR-IOV by adding support for RSS to the PF. The testing matrix gets to be very complex for this patch as there are a number of different features and subsets for queueing options. I tried to narrow these down a bit by restricting the PF to only supporting 4TC DCB when it is enabled in addition to SR-IOV. Cc: Greg Rose <gregory.v.rose@intel.com> Cc: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: Update configure virtualization to allow for multiple PF poolsAlexander Duyck2012-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This change allows all pools from the default pool forward to be enabled vi ixgbe_configure_virtualization. This is needed as we are planning to use queues belonging to adjacent pools for FCoE when SR-IOV and FCoE are both enabled. In addition this patch contains some minor formatting changes as there were a few spots that seemed to be in need of some cleanup. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Fix multiple issues in ixgbevf_get/set_ringparamAlexander Duyck2012-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In ixgbevf_get_ringparam we could run into a NULL pointer dereference if the rings were not allocated when we attempted the call. To prevent that we can just access the tx/rx_ring_count values instead of attempting to access the rings to get the count. This change corrects a memory leak and memory corruption in ixgbevf_set_ringparam. The memory leak was due to us not freeing the resources from the ring before overwriting them. This change corrects the memory leak by making certain to call ixgbe_free_tx/rx_resources on the rings prior to freeing them. The memory corruption was because we were replacing the rings but not updating the q_vectors. It addresses the memory corruption by leaving the rings in place and instead just copying the contents of the new rings into the existing rings. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Consolidate Tx context descriptor creation codeAlexander Duyck2012-07-18
| | | | | | | | | | | | | | | | | | | | | | There is a good bit of redundancy between the Tx checksum and segmentation offloads. In order to reduce some of this I am moving the code for creating a context descriptor into a separate function. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Add netdev to ring structureAlexander Duyck2012-07-18
| | | | | | | | | | | | | | | | | | | | | | This change adds the netdev to the ring structure. This allows for a quicker transition from ring to netdev without having to go from ring to adapter to netdev. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Do not rewind the Rx ring before bumping tailAlexander Duyck2012-07-18
| | | | | | | | | | | | | | | | | | | | | | The driver is going back one step from its' previous location before bumping tail. This is incorrect. We should just be writing the value of next_to_use into the tail register. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: fix VF untagging when 802.1 prio is setPascal Bouchareine2012-07-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have had an issue when using ixgbe+ixgbevf and 802.1 VLAN tagging. When attaching a VLAN to a VF, frames with a 802.1q priority appeared untagged on the VF hence not reaching the VLAN, where frames with priority 0 where tagged as expected and seen by the VLAN device. This seems due to the way ixgbevf is looking up the full tag (prio+cfi+vlan) against the adapter active_vlans, as a condition to mark the skb tagged. Signed-off-by: Pascal Bouchareine <pascal@gandi.net> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Update descriptor macros to accept pointers and drop _ADV suffixAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | This change updates the descriptor macros to accept pointers, updates the name to drop the _ADV suffix, and include the IXGBEVF name in the macro. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: Cleanup logic for MRQC and MTQC configurationAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is meant to make the code much more readable for MTQC and MRQC configuration. The big change is that I simplified much of the logic so that we are essentially handling just 4 cases and their variants. In the cases where RSS is disabled we are actually just programming the RETA table with all 1s resulting in a single queue RSS. In the case of SR-IOV I am treating that as a subset of VMDq. This all results int he following configuration for the hardware: DCB En Dis VMDq En VMDQ/DCB VMDq/RSS Dis DCB/RSS RSS Cc: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: Update the logic for ixgbe_cache_ring_dcb and DCB RSS configurationAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change cleans up some of the logic in an attempt to try and simplify things for how we are configuring DCB w/ RSS. In this patch I basically did 3 things. I updated the logic for getting the first register index. I applied the fact that all TCs get the same number of queues to simplify the looping logic in caching the DCB ring register. Finally I updated how we configure the RQTC register to match the fact that all TCs are assigned the same number of queues. Cc: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: Move configuration of set_real_num_rx/tx_queues into openAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | It makes much more sense for us to configure the real number of Tx and Rx queues in the ixgbe_open call than it does in ixgbe_set_num_queues. By setting the number in ixgbe_open we can avoid a number of unecessary updates and only have to make the calls once. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: Handle failures in the ixgbe_setup_rx/tx_resources callsAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | Previously we were exiting without cleaning up the memory internally on the ixgbe_setup_rx_resources and ixgbe_setup_tx_resources calls. Instead of forcing the caller to clean things up for us we should instead just unwind the rings and free the memory as we go. This way we can more gracefully clean up the rings in the event of an allocation failure. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbe: Ping the VFs on link status change to trigger link changeAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When the link status changes on the PF we need to notify the VFs. In order to do this we should ping all of the VFs in order to trigger a link status change on them as well. This fixes issues in which the PF would reset, but the VF didn't because the NAK flag was not set in the VF mailbox. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Use igb style interrupt masks instead of ixgbe styleAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | The interrupt registers accessed in ixgbevf are more similar to the igb style registers than they are to the ixgbe style registers. As such we would be better off setting up the code for the EICS, EIMS, EICS, EIAM, and EIAC like we do in igb instead of ixgbe. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Move Tx clean-up into NAPI contextAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently the VF driver is processing all of the transmits in interrupt context. This can be messy since the Rx is all handled in NAPI and this may result in interrupts being disabled. In order to resolve this move all of the Tx packet processing into NAPI and combine all of the interrupt and polling routines into just a pair of functions. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Update q_vector to contain ring pointers instead of bitmapsAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | For most cases the ixgbevf driver will only ever contain a single Tx and single Rx queue. In order to track that it makes more sense to use a pointer instead of using a bitmap which must be search in order to locate the ring on an adapter index. As such I am changing the code to use pointers and an iterator to access all rings on a given q_vector. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Cleanup accounting for space needed at start of xmit_frameAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | This change cleans up the accounting needed at the start of xmit_frame so that we can avoid doing too much work to determine how many descriptors we will need. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Drop use of eitr_low and eitr_high for hard coded valuesAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | This patch drops the use of eitr_low and eitr_high as values being stored in the adapter structure. Since the values have no external way to be changed they might as well just be hard coded values and save us the space on the adapter structure. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Make use of NETIF_F_RXCSUM instead of keeping our own flagAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | The IXGBE_FLAG_RX_CSUM_ENABLED flag is redundant since NETIF_F_RXCSUM is keeping the value we want to already have. As such we can drop the redundant flag and just make use of NETIF_F_RXCSUM. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Drop netdev_registered value since that is already stored in netdevAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | There is no need to keep a separate netdev_registered value since that is already stored in the netdev itself. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | ixgbevf: Drop all dead or unnecessary codeAlexander Duyck2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | There is a large amount of code present in this driver to support features that either do no exist or are not supported such ask packet split, DCA, or RSC. This patch strips out almost all of that code and in the case of conditionals based on unused flags I am flatting the code out to just the path that would have been selected. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | Merge branch 'master' of ↵David S. Miller2012-07-17
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next Jett Kirsher says: ==================== This series contains updates to e1000e and ixgbe. ... Alexander Duyck (5): ixgbe: Simplify logic for getting traffic class from user priority ixgbe: Cleanup unpacking code for DCB ixgbe: Populate the prio_tc_map in ixgbe_setup_tc ixgbe: Add function for obtaining FCoE TC based on FCoE user priority ixgbe: Merge FCoE set_num and cache_ring calls into RSS/DCB config ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * | ixgbe: Merge FCoE set_num and cache_ring calls into RSS/DCB configAlexander Duyck2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change merges the ixgbe_cache_ring_fcoe and ixgbe_set_fcoe_queues logic into the DCB and RSS initialization calls. Cc: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * | ixgbe: Add function for obtaining FCoE TC based on FCoE user priorityAlexander Duyck2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In upcoming patches it will become increasingly common to need to determine the FCoE traffic class in order to determine the correct queues for FCoE. In order to make this easier I am adding a function for obtaining the FCoE traffic class based on the user priority. Cc: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * | ixgbe: Populate the prio_tc_map in ixgbe_setup_tcAlexander Duyck2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were cases where the prio_tc_map was not populated when we were calling open. This will result in us incorrectly configuring the traffic classes when DCB is enabled. In order to correct this I have updated the code so that we now populate the values prior to allocating the q_vectors and calling ixgbe_open. Cc: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * | ixgbe: Cleanup unpacking code for DCBAlexander Duyck2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is meant to be a generic clean-up of the remaining functions for unpacking data from the DCB structures. The only real changes are: replaced the variable i with tc for functions that were looping through the traffic classes, and added a pointer for tc_class instead of path since that way we only need to pull the pointer once instead of once per loop. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * | ixgbe: Simplify logic for getting traffic class from user priorityAlexander Duyck2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is meant to help simplify the logic for getting traffic classes from user priorities. To do this I am adding a function named ixgbe_dcb_get_tc_from_up that will go through the traffic classes in reverse order in order to determine which traffic class contains a bit for a given user priority. Adding a declaration for this new function to the header so that we have a centralized means for sorting out traffic classes belonging to features such as FCoE. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * | e1000e: Program the correct register for ITR when using MSI-X.Matthew Vick2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When configuring interrupt throttling on 82574 in MSI-X mode, we need to be programming the EITR registers instead of the ITR register. -rc2: Renamed e1000_write_itr() to e1000e_write_itr(), fixed whitespace issues, and removed unnecessary !! operation. -rc3: Reduced the scope of the loop variable in e1000e_write_itr(). Signed-off-by: Matthew Vick <matthew.vick@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| * | e1000e: Cleanup code logic in e1000_check_for_serdes_link_82571()Tushar Dave2012-07-14
| | | | | | | | | | | | | | | | | | | | | | | | Cleanup code to make it more clean and readable. Signed-off-by: Tushar Dave <tushar.n.dave@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* | | ethernet: Use eth_random_addrJoe Perches2012-07-17
|/ / | | | | | | | | | | | | | | Convert the existing uses of random_ether_addr to the new eth_random_addr. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | ixgbe: Merge RSS and flow director ring register caching and configurationAlexander Duyck2012-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are really only 3 modes that can control the number of queues. Those are RSS, DCB, and VMDq/SR-IOV. Currently we have things much more broken up than they need to be for how we are configuring the rings. In order to try and straiten some of this out I am going to start merging similar functionality into single functions. To start with I am merging the Flow Director ring configuration into the RSS ring configuration since Flow Director cannot function with DCB or SR-IOV. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-09 08:28:12 -0400