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path: root/drivers/net/e1000e/defines.h
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* e1000e: disable jumbo frames on 82579 when MACsec enabled in EEPROMBruce Allan2011-03-11
| | | | | | | | | | If/when an OEM enables MACsec in the 82579 EEPROM, disable jumbo frames support in the driver due to an interoperability issue in hardware that prevents jumbo packets from being transmitted or received. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* e1000e: update Copyright for 2011Bruce Allan2011-01-14
| | | | | | Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* e1000e: support new PBA format from EEPROMBruce Allan2010-12-11
| | | | | | | | | | Provide support to e1000e for displaying the new format of the PBA found in the EEPROM. The unique PBA identifier is no longer restricted to hexadecimal numbers and must now be read and displayed as a string. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* e1000e: 82571 SerDes link handle null code word from partnerBruce Allan2010-11-16
| | | | | | | | | | | | SerDes Link detection on certain 82571 mezzanine cards can fail when the link is forced, the link partner does not recognize forced link and the link partner sends null code words. Detect the null code words and return to auto-negotiation state which causes the link partner to begin responding with valid code words. Within a reasonable interval the link will finally settle as forced by both partners. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* e1000e: use hardware writeback batchingJesse Brandeburg2010-09-30
| | | | | | | | | | | | | | | | | | | Most e1000e parts support batching writebacks. The problem with this is that when some of the TADV or TIDV timers are not set, Tx can sit forever. This is solved in this patch with write flushes using the Flush Partial Descriptors (FPD) bit in TIDV and RDTR. This improves bus utilization and removes partial writes on e1000e, particularly from 82571 parts in S5500 chipset based machines. Only ES2LAN and 82571/2 parts are included in this optimization, to reduce testing load. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Emil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: don't check for alternate MAC addr on parts that don't support itBruce Allan2010-08-19
| | | | | | | | | | | | | | | | | | | From: Bruce Allan <bruce.w.allan@intel.com> The alternate MAC address feature is only supported by 80003ES2LAN and 82571 LOMs as well as a couple 82571 mezzanine cards. Checking for an alternate MAC address on other parts can fail leading to the driver not able to load. This patch limits the check for an alternate MAC address to be done only for parts that support the feature. This issue has been around since support for the feature was introduced to the e1000e driver in 2.6.34. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Reported-by: Fabio Varesano <fax8@users.sourceforge.net> Cc: stable@kernel.org Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: update copyright informationBruce Allan2010-06-19
| | | | | | | Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: initial support for 82579 LOMsBruce Allan2010-06-19
| | | | | | | Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: fix checks for manageability enabled and management pass-throughBruce Allan2010-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | The mac->arc_subsystem was being incorrectly used to flag whether or not manageability was enabled when it should only be used to state whether the ARC (Host interface) subsystem is available on a particular MAC _and_ only valid when any manageability is enabled. The ARC subsystem is currently only available on 80003es2lan and 82573 parts supported by the driver. A new flag, has_fwsm, is introduced to be used when checking if manageability is enabled but only on parts that acutally have an FWSM register. While the above parts have an FWSM register, there are other parts that have FWSM but do not have support for the ARC subsystem, namely 82571/2 and ICHx/PCH. And then there are parts that have manageability, but do not have either FWSM register or support for the ARC subsystem - these are 82574 and 82583. For 80003es2lan, 82571/2/3 and ICH/PCH parts, this patch makes no functional changes, it only corrects the usage of the manageability flags. For 82574 and 82583, it fixes the incorrect accesses of the non-existent FWSM register and ARC subsystem as well as corrects the check for management pass-through. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: initialize manageability (IPMI) pass-through in 82574/82583Bruce Allan2010-05-13
| | | | | | | | | | 82574/82583 uses different registers/bits to setup manageability filters than all other parts supported by e1000e; set them accordingly for IPMI pass-through. Rename the function to better reflect what it does. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: reset MAC-PHY interconnect on 82577/82578 during Sx->S0Bruce Allan2010-05-06
| | | | | | | | | | | | During Sx->S0 transitions, the interconnect between the MAC and PHY on 82577/82578 can remain in SMBus mode instead of transitioning to the PCIe-like mode required during normal operation. Toggling the LANPHYPC Value bit essentially resets the interconnect forcing it to the correct mode. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: fix packet corruption and tx hang during NFSv2Jesse Brandeburg2010-03-05
| | | | | | | | | | | | | | when receiving a particular type of NFS v2 UDP traffic, the hardware could DMA some bad data and then hang, possibly corrupting memory. Disable the NFS parsing in this hardware, verified to fix the bug. Originally reported and reproduced by RedHat's Neil Horman CC: nhorman@tuxdriver.com Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: use alternate MAC address on ESB2 if availableBruce Allan2010-01-13
| | | | | | | | | | | Similar to 82571/2/3 parts that already do this, if ESB2/80003es2lan parts have an alternate MAC address provided in the EEPROM use it instead of the default MAC address. This patch makes the the actual code that does this generic so that it can be better used by both MAC families. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: minor correction to name of bit in CTRL_EXT registerBruce Allan2009-12-08
| | | | | | | | | Bit 7 in the CTRL_REG register is actually the Software Definable Pin 3, not the Software Definable Pin 7. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: update copyright informationBruce Allan2009-11-21
| | | | | | Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: rework disable K1 at 1000Mbps for 82577/82578Bruce Allan2009-10-30
| | | | | | | | | | | | | This patch reworks a previous workaround (commit 7d3cabbcc) for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. The original version of this workaround was found to be incomplete. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: config PHY via software after resetsBruce Allan2009-10-30
| | | | | | | | | | | | | | On PCH-based (82577/82578) and some ICH8-based parts (82566) there is an issue with the hardware automatically configuring the PHY with contents from the EEPROM after the PHY is reset, so do the configuration by the driver instead. This was already similarly done for some 82566 parts in e1000_phy_hw_reset_ich8lan() but needs to be done after other resets, so move the PHY configuration code to its own function and call after all PHY resets. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: delay after LCD reset and proper checks for PHY configuration doneBruce Allan2009-07-03
| | | | | | | | | | | | | | A previous workaround for 82578 to avoid link stall causes some PHY registers to get cleared inadvertently. Add a delay after all LCD resets to make sure PHY registers are in a stable state before continuing. Also, after resets check the EEC register for the state of PHY configuration performed by the MAC for ICH9 and earlier parts (as done before), but check the LAN_INIT_DONE bit in the STATUS register for ICH10 and newer parts (EEC doesn't exist in these newer parts). Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: PHY loopback broken on 82578Bruce Allan2009-07-03
| | | | | | | | | | PHY loopback on 82578 fails to work as a result of flushing the packets in the FIFO buffer in the link stall workaround. Don't perform the workaround if in PHY loopback mode. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: Fixes possible phy corrupton on 82571 designs.Dave Graham2009-06-09
| | | | | | | | | | | | | | | Phy corruption has been observed on 2-port 82571 adapters, and is root-caused to lack of synchronization between the 2 driver instances, which conflict when attempting to access the phy via the single MDIC register. A semaphore exists for this purpose, and is now used on these designs. Because PXE &/or EFI boot code (which we cannot expect to be built with this fix) may leave the inter-instance semaphore in an invalid initial state when the driver first loads, this fix also includes a one-time (per driver load) fix-up of the semaphore initial state. Signed-off-by: dave graham <david.graham@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: add support for 82577/82578 GbE LOM partsBruce Allan2009-06-03
| | | | | | | | | | | | | | This patch provides support for the next generation Intel desktop and mobile gigabit ethernet LOM adapters. These adapters are the follow-on parts to the LOMs tied to the prior ICH chipsets and are comprised of a MAC in the PCH chipset and an external PHY (82577 for mobile and 82578 for desktop versions). New features consist of PHY wakeup to save power by completely turning off the MAC while in Sx state, and 4K jumbo frames. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: correct flow control thresholdsBruce Allan2009-06-03
| | | | | | | | | | | | | The flow control thresholds, i.e. high and low watermarks of the Rx FIFO for when the hardware should transmit PAUSE frames (XON and XOFF, respectively), need to be tuned for more efficient use of the FIFO. The logic to set the thresholds for parts that support early-receive (ERT) was also wrong in that it should check whether jumbo frames are in use. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: Disable dynamic clock gating for 82571 per si errata.dave graham2009-02-10
| | | | | | | | | | | | | | | | 82571 and 82572 Errata #13 documents that the Si feature DMA Dynamic Clock Gating should be disabled, and identifies the workaround of disabling the feature by EEPROM setting. EEPROM versions that do not include the recommended workaround have been found in the field, and so some customers remain at risk. Because the feature DMA Dynamic clock Gating can be disabled by directly setting the appropriate bit in the E1000_CTRL_EXT register, this patch overrides the EEPROM setting, and force-disables the feature. Signed-off-by: dave graham <david.graham@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: check return code from NVM accesses and fix bank detectionBruce Allan2008-11-21
| | | | | | | | | | | | | | | | | | Check return code for all NVM accesses[1] and error out accordingly; log a debug message for failed accesses. For ICH8/9, the valid NVM bank detect function was not checking whether the SEC1VAL (sector 1 valid) bit in the EECD register was itself valid (bits 8 and 9 also have to be set). If invalid, it would have defaulted to the possibly invalid bank 0. Instead, try to use the valid bank detection method used by ICH10 which has been cleaned up a bit. [1] - reads and updates only; not writes because those are only writing to the Shadow RAM, the update following the write is the only thing actually writing the modified Shadow RAM contents to the NVM. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: enable ECC correction on 82571 siliconAlexander Duyck2008-11-16
| | | | | | | | | This change enables ECC correction for the packet buffer on all 82571 silicon. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: add support for new 82574L partBruce Allan2008-09-03
| | | | | | | | | This new part has the same feature set as previous parts with the addition of MSI-X support. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: add support for 82567LM-3 and 82567LF-3 (ICH10D) partsBruce Allan2008-09-03
| | | | | | | | Add support for new LOM devices on the latest generation ICHx platforms. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: test for unusable MSI supportBruce Allan2008-08-14
| | | | | | | | | | | Some systems do not like 82571/2 use of 16-bit MSI messages and some other systems claim to support MSI, but neither really works. Setup a test MSI handler to detect whether or not MSI is working properly, and if not, fallback to legacy INTx interrupts. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: Add support for BM PHYs on ICH9Bruce Allan2008-05-06
| | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the BM PHY, a new PHY model being used on ICH9-based implementations. This new PHY exposes issues in the ICH9 silicon when receiving jumbo frames large enough to use more than a certain part of the Rx FIFO, and this unfortunately breaks packet split jumbo receives. For this reason we re-introduce (for affected adapters only) the jumbo single-skb receive routine back so that people who do wish to use jumbo frames on these ich9 platforms can do so. Part of this problem has to do with CPU sleep states and to make sure that all the wake up timings are correctly we force them with the recently merged pm_qos infrastructure written by Mark Gross. (See http://lkml.org/lkml/2007/10/4/400). To make code read a bit easier we introduce a _IS_ICH flag so that we don't need to do mac type checks over the code. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: Fix HW Error on es2lan, ARP capture issue by BMCDavid Graham2008-04-25
| | | | | | | | | | | | | | Several components to this complex fix. The es2lan cards occasionally gave a "HW Error" especially when forcing speed. Some users also reported that the BMC stole ARP packets. The fixes include setting the proper SW_FW bits to tell the BMC that we're active and not do any un-initialization at all, so the setup routine is largely changed. Signed-off-by: David Graham <david.graham@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: cleanup several stats issuesBruce Allan2008-04-25
| | | | | | | | | | | | | | | | | | | | | Several stats registers are completely unused and we just waste pci bus time reading them. We also omit using the high 32 bits of the GORC/ GOTC counters. We can just read clear them and only read the low registers. Mii-tool can also break es2lan if it executes a MII PHY register ioctl while the device is in autonegotiation. Unfortunately it seems that several applications and installations still perform this ioctl call periodically and especially in this crucial startup time. We can fool the ioctl by providing fail safe information that mimics the "down" link state and only perform the dangerous PHY reads once after link comes up to fill in the real values. As long as link stays up the information will not change. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: reformat comment blocks, cosmetic changes onlyBruce Allan2008-03-28
| | | | | | | | | | | | | Adjusting the comment blocks here to be code-style compliant. no code changes. Changed some copyright dates to 2008. Indentation fixes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* e1000e: fix spelling errors in commentsAuke Kok2008-02-24
| | | | | | | Fix some spelling errors and inconsistencies in comment blocks. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* e1000e: add new wakeup cababilitiesMitch Williams2008-02-03
| | | | | | | | | Ethtool supports wake-on-ARP and wake-on-link, and so does the hardware supported by e1000e. This patch just introduces the two. Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: alternate MAC address supportBill Hayes2008-01-28
| | | | | | | | | Port alternate MAC address support from the sourceforge e1000 driver to the upstream e1000e driver. Signed-off-by: Bill Hayes <bill.hayes@hp.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [E1000E]: New pci-express e1000 driver (currently for ICH9 devices only)Auke Kok2007-10-10
This driver implements support for the ICH9 on-board LAN ethernet device. The device is similar to ICH8. The driver encompasses code to support 82571/2/3, es2lan and ICH8 devices as well, but those device IDs are disabled and will be "lifted" from the e1000 driver over one at a time once this driver receives some more live time. Changes to the last snapshot posted are exclusively in the internal hardware API organization. Many thanks to Jeff Garzik for jumping in and getting this organized with a keen eye on the future layout. [ Integrated napi_struct patch from Auke as well... -DaveM ] Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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