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| * mmc: sd: warn if card stays busy during initJohan Rudholm2014-07-09
| | | | | | | | | | | | | | | | | | The initialization of some SD-cards fails because the card never leaves the busy state. Aid trouble shooting by indicating this in the kernel log. Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: moxart: Remove unneeded version.h inclusionSachin Kamat2014-07-09
| | | | | | | | | | | | | | | | version.h inclusion is not needed as suggested by versioncheck. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: omap_hsmmc: Pin remux workaround to support SDIO interrupt on AM335xAndreas Fenkart2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The am335x can't detect pending cirq in PM runtime suspend. This patch reconfigures dat1 as a GPIO before going to suspend. SDIO interrupts are detected with the GPIO, the GPIO will only wake the module from suspend, SDIO irq detection will still happen through the IP block. Idea of remuxing the pins by Tony Lindgren. Code contributions from Tony Lindgren and Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: omap_hsmmc: switch default/idle pinctrl states in runtime hooksAndreas Fenkart2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are predefined states of the driver model. When not present, as if not set in the device tree, they become no-ops. Explicitly selecting the default state is not needed since the device core layer sets pin mux to "default" state before probe. This is not the simplest implementation, on AM335x at least, we could switch to idle at any point in the suspend hook, only the default state needs to be set before writing to the irq registers or an IRQ might get lost. Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: omap_hsmmc: abort runtime suspend if pending sdio irq detectedAndreas Fenkart2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | On multicores, an sdio irq handler could be running in parallel to runtime suspend. In the worst case it could be waiting for the spinlock held by the runtime suspend. When runtime suspend is complete and the functional clock (fclk) turned off, the irq handler will continue and cause a SIGBUS on the first register access. Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: omap_hsmmc: enable wakeup event for sdio OMAP4Balaji T K2014-07-09
| | | | | | | | | | | | | | | | | | To detect sdio irqs properly without spurious events, OMAP4 needs IWE in CON and CTPL, CLKEXTFREE in HCTL to be set Tested-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: omap_hsmmc: Extend debugfs by SDIO IRQ handling, runtime stateAndreas Fenkart2014-07-09
| | | | | | | | | | | | | | | | | | Add SDIO IRQ entries to debugfs entry. Note that PSTATE shows current state of data lines, incl. SDIO IRQ pending Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: omap_hsmmc: Enable SDIO interruptAndreas Fenkart2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There have been various patches floating around for enabling the SDIO IRQ for hsmmc, but none of them ever got merged. Probably the reason for not merging the SDIO interrupt patches has been the lack of wake-up path for SDIO on some omaps that has also needed remuxing the SDIO DAT1 line to a GPIO making the patches complex. This patch adds the minimal SDIO IRQ support to hsmmc for omaps that do have the wake-up path. For those omaps, the DAT1 line need to have the wake-up enable bit set, and the wake-up interrupt is the same as for the MMC controller. This patch has been tested on am3730 es1.2 with mwifiex connected to MMC3 with mwifiex waking to Ethernet traffic from off-idle mode. Note that for omaps that do not have the SDIO wake-up path, this patch will not work for idle modes and further patches for remuxing DAT1 to GPIO are needed. Based on earlier patches [1][2] by David Vrabel <david.vrabel@csr.com>, Steve Sakoman <steve@sakoman.com> For now, only support SDIO interrupt if we are booted with a separate wake-irq configued via device tree. This is because omaps need the wake-irq for idle states, and some omaps need special quirks. And we don't want to add new legacy mux platform init code callbacks any longer as we are moving to DT based booting anyways. To use it, you need to specify the wake-irq using the interrupts-extended property. [1] http://www.sakoman.com/cgi-bin/gitweb.cgi?p=linux.git;a=commitdiff_plain;h=010810d22f6f49ac03da4ba384969432e0320453 [2] http://comments.gmane.org/gmane.linux.kernel.mmc/20446 Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: quirks: Fixup debug messageAlexander Stein2014-07-09
| | | | | | | | | | | | | | | | | | | | There is no need for an output like this: > mmcblk mmc1:0001: calling add_quirk_mmc+0x0/0x20 Instead use this one: > mmcblk mmc1:0001: calling add_quirk_mmc Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sh-mmcif: final error path cleanupBen Dooks2014-07-09
| | | | | | | | | | | | | | | | | | Remove the error path items that are no longer needed. The mmc card-detect code cleans up after itself (and registers with devm) and the host error is the same as the clock disable. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sh-mmcif: no need to call pm_runtime_suspend on errorBen Dooks2014-07-09
| | | | | | | | | | | | | | | | | | | | The pm_runtime call should implicitly disable the device once the probe is over if there is no explicit reference gained. There is no need to call pm_runtime_suspend() before the pm_runtime_disable() call. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sh-mmcif: use devm_ for irq managementBen Dooks2014-07-09
| | | | | | | | | | | | | | | | | | Use devm_request_threaded_irq() for the host interrupt handlers so we do not have to worry about freeing them on exit or error. Tidies up the exit path code for the driver. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sh-mmcif: use devm_ for clock managementBen Dooks2014-07-09
| | | | | | | | | | | | | | | | Use the devm_clk_get() code to get the clock and allow it to be freed automatically on release. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sh-mmcif: use devm_ for ioremapBen Dooks2014-07-09
| | | | | | | | | | | | | | | | Start tidying the probe/release code by using devm_ioremap_resource() to map the IO registers. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sh-mmcif: update to print version and bus clock rate on probeBen Dooks2014-07-09
| | | | | | | | | | | | | | | | | | Change the initial print to show chip version and the bus rate it is working at instead of the driver version. This is more useful information as we already know which driver version from the kernel it is in. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci: Remove unused ret variablesMarkus Pargmann2014-07-09
| | | | | | | | | | | | | | | | Remove those unused ret variables to make it obvious that these function will not return any errors in the current implementation. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci: Use mmc core regulator infrastuctureTim Kryger2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch the common SDHCI code over to use mmc_host's regulator pointers and remove the ones in the sdhci_host structure. Additionally, use the common mmc_regulator_get_supply function to get the regulators and set the ocr_avail mask. This change sets the ocr_avail directly based upon the voltage ranges supported which ensures ocr_avail is set correctly while allowing the use of regulators that can't provide exactly 1.8v, 3.0v, or 3.3v. Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <mporter@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: core: Remove redundant runtime_idle callbackUlf Hansson2014-07-09
| | | | | | | | | | | | | | | | The runtime PM core handles a runtime_idle callback set to NULL as one returning 0. So, let's just set it to NULL instead. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: mmci: Add Qualcomm Id to amba id tableSrinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm SDCC controller is pl180, but amba id registers read 0x0's. The plan is to remove SDCC driver totally and use mmci as the main SD controller driver for Qualcomm SOCs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: Add Qcom specific rx_fifocnt logic.Srinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements a qcom specific get_rx_fifocnt function which is implemented based on status register flags. Based on qcom_fifo flag in variant data structure, the corresponding get_rx_fifocnt function is selected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: add explicit clk controlSrinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On Controllers like Qcom SD card controller where cclk is mclk and mclk should be directly controlled by the driver. This patch adds support to control mclk directly in the driver, and also adds explicit_mclk_control flag in variant structure giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Fixed checkpatch warning Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: add f_max to variant structureSrinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | Some of the controller have maximum supported frequency, This patch adds support in variant data structure to specify such restrictions. This gives more flexibility in calculating the f_max before passing it to mmc-core. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: Add support to data commands via variant structure.Srinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | On some SOCs like Qcom there are explicit bits in the command register to specify if its a data transfer command or not. So this patch adds support to such bits in variant data, giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: add edge support to data and command out in variant data.Srinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds edge support for data and command out to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: add 8bit bus support in variant dataSrinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds 8bit bus enable to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: add ddrmode mask to variant dataSrinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with incorrect ddrmode mask, resulting in failures on Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: Add Qcom datactrl register variantSrinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl register. Bit position datactrl[16:4] hold the true block size instead of power of 2. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: Add enough delay between writes to CMD register.Srinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Qcom SD Card controller POWER, CLKCTRL, DATACTRL and COMMAND registers should be updated in MCLK domain, and writes to these registers must be separated by three MCLK cycles. This resitriction is not applicable for other registers. Any subsequent writes to these register will be ignored until 3 MCLK have passed. One usec delay between two CMD register writes is not sufficient in the card identification phase where the CCLK is very low. This patch replaces a static 1 usec delay to use mmci_reg_delay function which can provide correct delay depending on the cclk frequency. Without this patch the card is not detected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: Add Qualcomm specific register defines.Srinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | | | This patch adds a Qualcomm SD Card controller specific register variations to header file. Qualcomm SDCC controller is pl180, with slight changes in the register layout from standard pl180 register set. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: use NSEC_PER_SEC macroSrinivas Kandagatla2014-07-09
| | | | | | | | | | | | | | | | | | This patch replaces a constant used in calculating timeout with a proper macro. This is make code more readable. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | Merge tag 'mfd-for-linus-3.17' of ↵Linus Torvalds2014-08-07
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD update from Lee Jones: "Changes to existing drivers: - checkpatch fixes throughout the subsystem - use Regmap to handle IRQs in max77686, extcon-max77693 and mc13xxx-core - use DMA in rtsx_pcr - restrict building on unsupported architectures on timberdale, cs5535 - SPI hardening in cros_ec_spi - more robust error handing in asic3, cros_ec, ab8500-debugfs, max77686 and pcf50633-core - reorder PM runtime and regulator handing during shutdown in arizona - enable wakeup in cros_ec_spi - unused variable/code clean-up in pm8921-core, cros_ec, htc-i2cpld, tps65912-spi, wm5110-tables and ab8500-debugfs - add regulator handing into suspend() in sec-core - remove pointless wrapper functions in extcon-max77693 and i2c-cros-ec-tunnel - use cross-architecture friendly data sizes in stmpe-i2c, arizona, max77686 and tps65910 - devicetree documentation updates throughout - provide power management support in max77686 - few OF clean-ups in max77686 - use manged resources in tps6105x New drivers/supported devices: - add support for s2mpu02 to sec-core - add support for Allwinner A32 to sun6i-prcm - add support for Maxim 77802 in max77686 - add support for DA9063 AD in da9063 - new driver for Intel PMICs (generic) and specifically Crystal Cove (Re-)moved drivers == - move out keyboard functionality cros_ec ==> input/keyboard/cros_ec_keyb" * tag 'mfd-for-linus-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (101 commits) MAINTAINERS: Update MFD repo location mfd: omap-usb-host: Fix improper mask use. mfd: arizona: Only free the CTRLIF_ERR IRQ if we requested it mfd: arizona: Add missing handling for ISRC3 under/overclocked mfd: wm5110: Add new interrupt register definitions mfd: arizona: Rename thermal shutdown interrupt mfd: wm5110: Add in the output done interrupts mfd: wm5110: Remove non-existant interrupts mfd: tps65912-spi: Remove unused variable mfd: htc-i2cpld: Remove unused code mfd: da9063: Add support for AD silicon variant mfd: arizona: Map MICVDD from extcon device to the Arizona core mfd: arizona: Add MICVDD to mapped regulators for wm8997 mfd: max77686: Ensure device type IDs are architecture agnostic mfd: max77686: Add Maxim 77802 PMIC support mfd: tps6105x: Use managed resources when allocating memory mfd: wm8997-tables: Suppress 'line over 80 chars' warnings mfd: kempld-core: Correct a variety of checkpatch warnings mfd: ipaq-micro: Fix coding style errors/warnings reported by checkpatch mfd: si476x-cmd: Remedy checkpatch style complains ...
| * | mmc: rtsx: add support for async requestMicky Ching2014-07-09
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for non-blocking request, pre_req() runs dma_map_sg() and post_req() runs dma_unmap_sg(). This patch can increase card read/write speed, especially for high speed card and slow speed CPU. Test on intel i3(800MHz - 2.3GHz) performance mode(2.3GHz), SD card clock 208MHz run dd if=/dev/mmcblk0 of=/dev/null bs=64k count=1024 before: 67108864 bytes (67 MB) copied, 0.85427 s, 78.6 MB/s after: 67108864 bytes (67 MB) copied, 0.74799 s, 89.7 MB/s Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | MIPS: Alchemy: au1xmmc: use clk frameworkManuel Lauss2014-07-30
| | | | | | | | | | | | | | | | | | | | Use the clock framework to get the peripheral clock rate to correctly set the MMC/SD bus clock divider. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7475/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: remove au_read/write/syncManuel Lauss2014-07-30
| | | | | | | | | | | | | | | | | | replace au_read/write/sync with __raw_read/write and wmb. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7465/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: introduce helpers to access SYS register block.Manuel Lauss2014-07-30
|/ | | | | | | | | | | | | | | This patch changes all absolute SYS_XY registers to offsets from the SYS block base, prefixes them with AU1000 to avoid silent failures due to changed addresses, and introduces helper functions to read/write them. No functional changes, comparing assembly of a few select functions shows no differences. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-nextLinus Torvalds2014-06-12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking updates from David Miller: 1) Seccomp BPF filters can now be JIT'd, from Alexei Starovoitov. 2) Multiqueue support in xen-netback and xen-netfront, from Andrew J Benniston. 3) Allow tweaking of aggregation settings in cdc_ncm driver, from Bjørn Mork. 4) BPF now has a "random" opcode, from Chema Gonzalez. 5) Add more BPF documentation and improve test framework, from Daniel Borkmann. 6) Support TCP fastopen over ipv6, from Daniel Lee. 7) Add software TSO helper functions and use them to support software TSO in mvneta and mv643xx_eth drivers. From Ezequiel Garcia. 8) Support software TSO in fec driver too, from Nimrod Andy. 9) Add Broadcom SYSTEMPORT driver, from Florian Fainelli. 10) Handle broadcasts more gracefully over macvlan when there are large numbers of interfaces configured, from Herbert Xu. 11) Allow more control over fwmark used for non-socket based responses, from Lorenzo Colitti. 12) Do TCP congestion window limiting based upon measurements, from Neal Cardwell. 13) Support busy polling in SCTP, from Neal Horman. 14) Allow RSS key to be configured via ethtool, from Venkata Duvvuru. 15) Bridge promisc mode handling improvements from Vlad Yasevich. 16) Don't use inetpeer entries to implement ID generation any more, it performs poorly, from Eric Dumazet. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1522 commits) rtnetlink: fix userspace API breakage for iproute2 < v3.9.0 tcp: fixing TLP's FIN recovery net: fec: Add software TSO support net: fec: Add Scatter/gather support net: fec: Increase buffer descriptor entry number net: fec: Factorize feature setting net: fec: Enable IP header hardware checksum net: fec: Factorize the .xmit transmit function bridge: fix compile error when compiling without IPv6 support bridge: fix smatch warning / potential null pointer dereference via-rhine: fix full-duplex with autoneg disable bnx2x: Enlarge the dorq threshold for VFs bnx2x: Check for UNDI in uncommon branch bnx2x: Fix 1G-baseT link bnx2x: Fix link for KR with swapped polarity lane sctp: Fix sk_ack_backlog wrap-around problem net/core: Add VF link state control policy net/fsl: xgmac_mdio is dependent on OF_MDIO net/fsl: Make xgmac_mdio read error message useful net_sched: drr: warn when qdisc is not work conserving ...
| * Merge branch 'master' of ↵John W. Linville2014-05-27
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem
| | * drivers/mmc/host/mmc_spi.c: Use get/put_unaligned_be32George Spelvin2014-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Very minor source and binary size reduction. Signed-off-by: George Spelvin <linux@horizon.com> Reviewed-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
| | * lib/crc7: Shift crc7() output left 1 bitGeorge Spelvin2014-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This eliminates a 1-bit left shift in every single caller, and makes the inner loop of the CRC computation more efficient. Renamed crc7 to crc7_be (big-endian) since the interface changed. Also purged #include <linux/crc7.h> from files that don't use it at all. Signed-off-by: George Spelvin <linux@horizon.com> Reviewed-by: Pavel Machek <pavel@ucw.cz> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* | | mmc: simplify SDHCI Kconfig dependenciesArnd Bergmann2014-06-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have a number of front-end drivers for SDHCI_PLTFM, some of them use 'select MMC_SDHCI_PLTFM', others use 'depends on'. This is inconsistent and confusing, and in one case has also led to a build error because of incomplete dependencies: warning: (MMC_SDHCI_PXAV3 && MMC_SDHCI_PXAV2 && MMC_SDHCI_BCM_KONA) selects MMC_SDHCI_PLTFM which has unmet direct dependencies (MMC && MMC_SDHCI) drivers/built-in.o: In function `sdhci_sirf_resume': :(.text+0xaaacb4): undefined reference to `sdhci_resume_host' drivers/built-in.o: In function `sdhci_sirf_suspend': :(.text+0xaaacf8): undefined reference to `sdhci_suspend_host' drivers/built-in.o: In function `sdhci_sirf_probe': :(.text+0xaaaf44): undefined reference to `sdhci_add_host' :(.text+0xaaaf50): undefined reference to `sdhci_remove_host' This changes Kconfig to use 'depends on MMC_SDHCI_PLTFM' for all these cases, to fix the build error and make the logic more logical. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | | mmc: omap: don't select TPS65010Arnd Bergmann2014-06-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC host driver should not select the pmic driver, since that may have other dependencies, notably i2c in this case. It's not clear what the exact requirement of the driver is, but to preserve the behavior, this patch changes the 'select' into 'depends on', meaning you now have to turn on TPS65010 explicitly and then MMC_OMAP. Found during randconfig build testing. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: linux-omap@vger.kernel.org Cc: Jarkko Nikula <jarkko.nikula@bitmer.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | | mmc: mvsdio: avoid compiler warningArnd Bergmann2014-06-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc correctly points out that hw_state can be used uninitially in the mvsd_setup_data() function. This rearranges the function to ensure it always contains a proper value. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Chris Ball <chris@printf.net> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: linux-mmc@vger.kernel.org Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | | mmc: atmel-mci: incude asm/cacheclush.hArnd Bergmann2014-06-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids a build error due to the use of flush_dcache_page. drivers/mmc/host/atmel-mci.c: In function 'atmci_read_data_pio': drivers/mmc/host/atmel-mci.c:1870:5: error: implicit declaration of function 'flush_dcache_page' [-Werror=implicit-function-declaration] flush_dcache_page(sg_page(sg)); ^ Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | | mmc: sdhci-msm: Fix fallout from sdhci refactoringStephen Boyd2014-06-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sdhci core was refactored recently and some of those refactorings required changes in every sdhci platform driver. Those updates happened around the same time as when the msm driver was merged so the refactorings missed the msm driver. Hook in the basic library functions so that we can boot apq8074 dragonboards again instead of crashing when we try to jump to NULL function pointers. Reported-by: Kevin Hilman <khilman@linaro.org> Cc: Georgi Djakov <gdjakov@mm-sol.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Kumar Gala <galak@codeaurora.org> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | | mmc: usdhi6rol0: fix compiler warningsGuennadi Liakhovetski2014-06-12
| | | | | | | | | | | | | | | | | | | | | Fix a number of wrong print formats. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | | Merge tag 'mmc-updates-for-3.16-rc1' of ↵Linus Torvalds2014-06-10
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC update from Chris Ball: "MMC highlights for 3.16: Core: - support HS400 mode of eMMC 5.0, via DT bindings mmc-hs400-1_{2,8}v - if card init at 3.3v doesn't work, try 1.8v and 1.2v too Drivers: - moxart: New driver for MOXA ART SoCs - rtsx_usb_sdmmc: New driver for Realtek USB card readers - sdhci: Large rework around IRQ/regulator handling, remove card_tasklet - sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support - sunxi: New driver for Allwinner sunxi SoCs - usdhi6rol0: New driver for Renesas SD/SDIO controller" * tag 'mmc-updates-for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (95 commits) mmc: sdhci-s3c: use mmc_of_parse and remove the card_tasklet mmc: add a driver for the Renesas usdhi6rol0 SD/SDIO host controller mmc: sdhci-of-esdhc: Fixup compile error mmc: tegra: fix reporting of base clock frequency mmc: tegra: disable UHS modes mmc: sdhci-dove: use mmc_of_parse() and remove card_tasklet CD handler MAINTAINERS: mmc: Add path to git tree mmc: dove: fix missing MACH_DOVE dependency mmc: sdhci: SD tuning is broken for some controllers mmc: sdhci-esdhc-imx: fix mmc ddr mode regression issue mmc: sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support mmc: omap_hsmmc: split omap-dma header file mmc: omap_hsmmc: fix cmd23 multiblock read/write mmc: omap_hsmmc: use devm_ioremap_resource mmc: omap_hsmmc: use devm_request_threaded_irq mmc: omap_hsmmc: use devm_request_irq mmc: omap_hsmmc: use devm_clk_get mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs mmc: wmt-sdmmc: Use GFP_KERNEL instead of hard-coded value mmc: omap: Use DIV_ROUND_UP instead of open coded ...
| * | | mmc: sdhci-s3c: use mmc_of_parse and remove the card_taskletJaehoon Chung2014-06-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the compile error. (Removed the card_tasklet at "mmc: sdhci: push card_tasklet into treaded irq handler") drivers/mmc/host/sdhci-s3c.c: In function ‘sdhci_s3c_notify_change’: drivers/mmc/host/sdhci-s3c.c:402:25: error: ‘struct sdhci_host’ has no member named ‘card_tasklet’ Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
| * | | mmc: add a driver for the Renesas usdhi6rol0 SD/SDIO host controllerGuennadi Liakhovetski2014-06-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the Renesas usdhi6rol0 SD/SDIO host controller in both PIO and DMA modes. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Chris Ball <chris@printf.net>
| * | | mmc: sdhci-of-esdhc: Fixup compile errorUlf Hansson2014-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit below introduced compile errors, let's fix them. mmc: sdhci-of-esdhc: remove platform_suspend/platform_resume callbacks Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
| * | | mmc: tegra: fix reporting of base clock frequencyAndrew Bresticker2014-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra SDHCI controllers, by default, report a base clock frequency of 208Mhz in SDHCI_CAPABILTIES which may or may not be equal to the actual base clock frequency. This is because the clock rate is configured by the clock controller, which is external to the SD/MMC controller. Since the SD/MMC controller has no knowledge of how this clock is configured, it will simply report the maximum frequency. While the reported value can be overridden by setting BASE_CLK_FREQ in VENDOR_CLOCK_CTRL on Tegra30 and later SoCs, just set CAP_CLOCK_BASE_BROKEN and supply sdhci_pltfm_clk_get_max_clock(), which simply does a clk_get_rate(), as the get_max_clock() callback. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
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