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| * | sdhci : recompute timeout_clk when neededMatthieu CASTET2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK is set, timeout_clk is sdclk. We need to update it when we change sdclk in sdhci_set_clock. This allow to have a more precisse timeout and max_busy_timeout. This can help for command that need a big busy wait (erase, ...). Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | sdhci : handle busy timeout irqMatthieu CASTET2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we wait for busy after sending a command, if there is a timeout, we got SDHCI_INT_DATA_TIMEOUT flags. Before this commit we got the message : "Got data interrupt 0x00100000 even though no data operation was in progress." and we need to wait 10s that sdhci_timeout_timer expires. Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: rtsx_usb_sdmmc: fix incorrect last byte in R2 responseRoger Tseng2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code erroneously fill the last byte of R2 response with an undefined value. In addition, the controller actually 'offloads' the last byte (CRC7, end bit) while receiving R2 response and thus it's impossible to get the actual value. This could cause mmc stack to obtain inconsistent CID from the same card after resume and misidentify it as a different card. Fix by assigning dummy CRC and end bit: {7'b0, 1} = 0x1 to the last byte of R2. Cc: <stable@vger.kernel.org> # v3.16+ Fixes: c7f6558d84af ("mmc: Add realtek USB sdmmc host driver") Signed-off-by: Roger Tseng <rogerable@realtek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: rtsx_pci_sdmmc: fix incorrect last byte in R2 responseRoger Tseng2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code erroneously fill the last byte of R2 response with an undefined value. In addition, the controller actually 'offloads' the last byte (CRC7, end bit) while receiving R2 response and thus it's impossible to get the actual value. This could cause mmc stack to obtain inconsistent CID from the same card after resume and misidentify it as a different card. Fix by assigning dummy CRC and end bit: {7'b0, 1} = 0x1 to the last byte of R2. Cc: <stable@vger.kernel.org> # v3.8+ Fixes: ff984e57d36e ("mmc: Add realtek pcie sdmmc host driver") Signed-off-by: Roger Tseng <rogerable@realtek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: au1xmmc: fix error return code in au1xmmc_probe()Wei Yongjun2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: dw_mmc: Make sure we don't get stuck when we get an errorDoug Anderson2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we happened to get a data error at just the wrong time the dw_mmc driver could get into a state where it would never complete its request. That would leave the caller just hanging there. We fix this two ways and both of the two fixes on their own appear to fix the problems we've seen: 1. Fix a race in the tasklet where the interrupt setting the data error happens _just after_ we check for it, then we get a EVENT_XFER_COMPLETE. We fix this by repeating a bit of code. 2. Fix it so that if we detect that we've got an error in the "data busy" state and we're not going to do anything else we end the request and unblock anyone waiting. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@gmail.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci: fix the wrong type of currChuanxiao.Dong2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | curr should use signed type since it will contain the returned value which is possible to be a negative value. Using u32 will make the returned value to be true even there is a negative result. Change to use int instead of u32 Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: jz4740: prepare next dma transfer in parallel with current transferApelete Seketeli2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make use of the MMC asynchronous request capability to prepare the next DMA transfer request in parallel with the current transfer. This is done by adding pre-request and post-request callbacks that are used by the MMC framework during an active data transfer. It should help reduce the impact of DMA preparation overhead on the SD card performance. Signed-off-by: Apelete Seketeli <apelete@seketeli.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: jz4740: add dma infrastructure for data transfersApelete Seketeli2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now the MMC driver for JZ4740 SoC was relying on PIO mode only for data transfers. This patch allows the use of DMA for data trasnfers in addition to PIO mode by relying on DMA Engine. DMA tranfers performance might be further improved by taking advantage of the asynchronous request capability of the MMC framework. Signed-off-by: Apelete Seketeli <apelete@seketeli.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: dw_mmc: add support for RK3288Addy Ke2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch focuses on clock setting for RK3288 mmc controller. In RK3288 mmc controller, CLKDIV register can only be set 0 or 1, and if DDR 8bit mode, CLKDIV register must be set 1. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci-pltfm: Do not use parent as the host's devicePawel Moll2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code selecting a device for the sdhci host has been continuously tweaked (4b711cb13843f5082e82970dd1e8031383134a65 "mmc: sdhci-pltfm: Add structure for host-specific data" and a4d2177f00a5252d825236c5124bc1e9918bdb41 "mmc: sdhci-pltfm: dt device does not pass parent to sdhci_alloc_host" while there does not seem to be any reason to use platform device's parent in the first place. The comment saying "Some PCI-based MFD need the parent here" seem to refer to Timberdale FPGA driver (the only MFD driver registering SDHCI cell, drivers/mfd/timberdale.c) but again, the only situation when parent device matter is runtime PM, which is not implemented for Timberdale. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: core: Remove fixed voltage regulator logicTim Kryger2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need for regulator consumers to include special logic for fixed voltage regulators as they support regulator_set_voltage() just like their non-fixed regulator counterparts. Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: mmci: Add qcom dml support to the driver.Srinivas Kandagatla2014-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Qualcomm APQ8064 SOCs, SD card controller has an additional glue called DML (Data Mover Local/Lite) to assist dma transfers. This hardware needs to be setup before any dma transfer is requested. DML itself is not a DMA engine, its just a gule between the SD card controller and dma controller. Most of this code has been ported from qualcomm's 3.4 kernel. This patch adds the code necessary to intialize the hardware and setup before doing any dma transfers. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci-s3c: fix runtime PM handling on sdhci_add_host() failureBartlomiej Zolnierkiewicz2014-09-08
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Runtime Power Management handling for the sdhci_add_host() failure case in sdhci_s3c_probe() should match the code in sdhci_s3c_remove() (which uses pm_runtime_disable() call which matches the earlier pm_runtime_enable() one). Fix it. This patch fixes "BUG: spinlock bad magic on CPU#0, swapper/0/1" and "Unbalanced pm_runtime_enable!" warnings. >From the kernel log: ... [ 1.659631] s3c-sdhci 12530000.sdhci: sdhci_add_host() failed [ 1.665096] BUG: spinlock bad magic on CPU#0, swapper/0/1 [ 1.670433] lock: 0xea01e484, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0 [ 1.677895] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.16.0-next-20140804-00008-ga59480f-dirty #707 [ 1.687037] [<c0013ae4>] (unwind_backtrace) from [<c0010d70>] (show_stack+0x10/0x14) [ 1.694740] [<c0010d70>] (show_stack) from [<c04050c8>] (dump_stack+0x68/0xb8) [ 1.701948] [<c04050c8>] (dump_stack) from [<c0052558>] (do_raw_spin_lock+0x15c/0x1a4) [ 1.709848] [<c0052558>] (do_raw_spin_lock) from [<c040a630>] (_raw_spin_lock_irqsave+0x20/0x28) [ 1.718619] [<c040a630>] (_raw_spin_lock_irqsave) from [<c030d7d0>] (sdhci_do_set_ios+0x1c/0x5cc) [ 1.727464] [<c030d7d0>] (sdhci_do_set_ios) from [<c030ddfc>] (sdhci_runtime_resume_host+0x50/0x104) [ 1.736574] [<c030ddfc>] (sdhci_runtime_resume_host) from [<c02462dc>] (pm_generic_runtime_resume+0x2c/0x40) [ 1.746383] [<c02462dc>] (pm_generic_runtime_resume) from [<c0247898>] (__rpm_callback+0x34/0x70) [ 1.755233] [<c0247898>] (__rpm_callback) from [<c02478fc>] (rpm_callback+0x28/0x88) [ 1.762958] [<c02478fc>] (rpm_callback) from [<c02486f0>] (rpm_resume+0x384/0x4ec) [ 1.770511] [<c02486f0>] (rpm_resume) from [<c02488b0>] (pm_runtime_forbid+0x58/0x64) [ 1.778325] [<c02488b0>] (pm_runtime_forbid) from [<c030ea70>] (sdhci_s3c_probe+0x4a4/0x540) [ 1.786749] [<c030ea70>] (sdhci_s3c_probe) from [<c02429cc>] (platform_drv_probe+0x2c/0x5c) [ 1.795076] [<c02429cc>] (platform_drv_probe) from [<c02415f0>] (driver_probe_device+0x114/0x234) [ 1.803929] [<c02415f0>] (driver_probe_device) from [<c024179c>] (__driver_attach+0x8c/0x90) [ 1.812347] [<c024179c>] (__driver_attach) from [<c023ffb4>] (bus_for_each_dev+0x54/0x88) [ 1.820506] [<c023ffb4>] (bus_for_each_dev) from [<c0240df8>] (bus_add_driver+0xd8/0x1cc) [ 1.828665] [<c0240df8>] (bus_add_driver) from [<c0241db8>] (driver_register+0x78/0xf4) [ 1.836652] [<c0241db8>] (driver_register) from [<c00088a4>] (do_one_initcall+0x80/0x1d0) [ 1.844816] [<c00088a4>] (do_one_initcall) from [<c059ac94>] (kernel_init_freeable+0x108/0x1d4) [ 1.853503] [<c059ac94>] (kernel_init_freeable) from [<c0401300>] (kernel_init+0x8/0xe4) [ 1.861568] [<c0401300>] (kernel_init) from [<c000e538>] (ret_from_fork+0x14/0x3c) [ 1.869582] platform 12530000.sdhci: Driver s3c-sdhci requests probe deferral ... [ 1.997047] s3c-sdhci 12530000.sdhci: Unbalanced pm_runtime_enable! ... [ 2.027235] s3c-sdhci 12530000.sdhci: sdhci_add_host() failed [ 2.032884] platform 12530000.sdhci: Driver s3c-sdhci requests probe deferral ... Tested on Hardkernel's Exynos4412 based ODROID-U3 board. Fixes: 9f4e8151dbbc ("mmc: sdhci-s3c: Enable runtime power management") Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | PM / Domains: Move dev_pm_domain_attach|detach() to pm_domain.hUlf Hansson2014-09-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 46420dd73b80 (PM / Domains: Add APIs to attach/detach a PM domain for a device) started using errno values in pm.h header file. It also failed to include the header for these, thus it caused compiler errors. Instead of including the errno header to pm.h, let's move the functions to pm_domain.h, since it's a better match. Fixes: 46420dd73b80 (PM / Domains: Add APIs to attach/detach a PM domain for a device) Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | mmc: sdio: Convert to dev_pm_domain_attach|detach()Ulf Hansson2014-09-22
|/ | | | | | | | | | | | | Previously only the ACPI PM domain was supported by the sdio bus. Let's convert to the common attach/detach functions for PM domains, which currently means we are extending the support to include the generic PM domain as well. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Kevin Hilman <khilman@linaro.org> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* Merge tag 'pci-v3.17-changes-2' of ↵Linus Torvalds2014-08-14
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull DEFINE_PCI_DEVICE_TABLE removal from Bjorn Helgaas: "Part two of the PCI changes for v3.17: - Remove DEFINE_PCI_DEVICE_TABLE macro use (Benoit Taine) It's a mechanical change that removes uses of the DEFINE_PCI_DEVICE_TABLE macro. I waited until later in the merge window to reduce conflicts, but it's possible you'll still see a few" * tag 'pci-v3.17-changes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use
| * PCI: Remove DEFINE_PCI_DEVICE_TABLE macro useBenoit Taine2014-08-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should prefer `struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to meet kernel coding style guidelines. This issue was reported by checkpatch. A simplified version of the semantic patch that makes this change is as follows (http://coccinelle.lip6.fr/): // <smpl> @@ identifier i; declarer name DEFINE_PCI_DEVICE_TABLE; initializer z; @@ - DEFINE_PCI_DEVICE_TABLE(i) + const struct pci_device_id i[] = z; // </smpl> [bhelgaas: add semantic patch] Signed-off-by: Benoit Taine <benoit.taine@lip6.fr> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* | Merge tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmcLinus Torvalds2014-08-14
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MMC updates from Ulf Hansson: "Me and Chris Ball decided to try out using my MMC tree as the primary one, to simplify handling of patches. This pull does thus contains all the MMC patches for 3.17 rc1, no pull from Chris this time. Details: MMC core: - forward compatibility for eMMC - fix some blacklisted cards with broken secure discard MMC host: - mmci: Add support for Qualcomm variant - mmci: Fix regression for arm_variant - sdhci: Various fixes and cleanups - sdhci: Improve external VDD regulator support - sdhci: Support for DDR50 1.8V mode for BayTrail - sdhci-st: Add driver for ST SDHCI controller - sh-mmcif: DMA fixes - omap_hsmmc: Add support for SDIO interrupts - sdhci-pci: Add support for Intel Quark X1000 - dw_mmc: Update the reset sequence - s3cmci: port DMA code to dmaengine API" * tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmc: (67 commits) mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeed mmc: dw_mmc: Slot quirk "disable-wp" is deprecated. mmc: mmci: Reverse IRQ handling for the arm_variant mmc: mmci: Move all CMD irq handling to mmci_cmd_irq() mmc: mmci: Remove redundant check of status for DATA irq mmc: dw_mmc: change to use recommended reset procedure mmc: sdhci-pxav3: Use devm_* managed helpers mmc: tmio: Configure DMA slave bus width mmc: sh_mmcif: Configure DMA slave bus width mmc: sh_mmcif: Fix DMA slave address configuration mmc: sh_mmcif: Document DT bindings mmc: sdhci-pci: remove PCI PM functions in suspend/resume callback mmc: Do not advertise secure discard if it is blacklisted mmc: sdhci-msm: Get COMPILE_TEST support mmc: sdhci-msm: Remove unnecessary header file inclusion mmc: sdhci-msm: Fix the binding example mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller mmc: sdhci: Preset value not supported in Baytrail eMMC mmc: MMC_USDHI6ROL0 should depend on HAS_DMA mmc: MMC_SH_MMCIF should depend on HAS_DMA ...
| * mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.Jaehoon Chung2014-08-11
| | | | | | | | | | | | | | | | | | | | | | | | | | Slot quirks "disable-wp" is deprecated. Instead, use the host quirk "disable-wp". (Because the slot-node is removed in dt-file.) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Sachin Kamat <sachin.kamat@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: Reverse IRQ handling for the arm_variantUlf Hansson2014-08-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit "mmc: mmci: Handle CMD irq before DATA irq", caused an issue when using the ARM model of the PL181 and running QEMU. The bug was reported for the following QEMU version: $ qemu-system-arm -version QEMU emulator version 2.0.0 (Debian 2.0.0+dfsg-2ubuntu1.1), Copyright (c) 2003-2008 Fabrice Bellard To resolve the problem, let's restore the old behavior were the DATA irq is handled prior the CMD irq, but only for the arm_variant, which the problem was reported for. Reported-by: John Stultz <john.stultz@linaro.org> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: Move all CMD irq handling to mmci_cmd_irq()Ulf Hansson2014-08-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch won't change the behavior of how mmci deals with CMD irqs. By moving code from mmci_irq() to mmci_cmd_irq(), we getter a better overview of what going on. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mmci: Remove redundant check of status for DATA irqUlf Hansson2014-08-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need to verify the content of the status register twice, while we are about to handle a DATA irq. Instead let's leave all verification to be handled by mmci_data_irq(). Cc: Peter Maydell <peter.maydell@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kees Cook <keescook@chromium.org> Tested-by: John Stultz <john.stultz@linaro.org> Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: dw_mmc: change to use recommended reset procedureSonny Rao2014-08-11
| | | | | | | | | | | | | | | | | | | | | | | | This patch changes the fifo reset code to follow the reset procedure outlined in the documentation of Synopsys Mobile storage host databook. Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> [sonnyrao: fix compile for !CONFIG_MMC_DW_IDMAC case] Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci-pxav3: Use devm_* managed helpersLaurent Pinchart2014-08-11
| | | | | | | | | | | | | | This simplifies probe error and remove code paths. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: tmio: Configure DMA slave bus widthLaurent Pinchart2014-07-26
| | | | | | | | | | | | | | | | | | Even though some implementations support 4-bytes data register access, the tmio driver never configures the hardware in such a way and always performs 2-bytes accesses. Hardcode the DMA transfer size to 2 bytes. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sh_mmcif: Configure DMA slave bus widthLaurent Pinchart2014-07-26
| | | | | | | | | | | | | | | | The data register is 4 bytes wide, hardcode the DMA transfer size to 4 bytes in both directions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sh_mmcif: Fix DMA slave address configurationLaurent Pinchart2014-07-26
| | | | | | | | | | | | | | | | | | | | Commit e5a233cb647d749de2f188477c9a54b94d90477f ("mmc: sh_mmcif: Factorize DMA channel request and configuration code") incorrectly set the destination address for both slave channels instead of setting the source address for the receive channel. Fix that. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci-pci: remove PCI PM functions in suspend/resume callbackChuanxiao.Dong2014-07-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not required (in fact it even is not recommended) that a PCI driver's suspend() callback save the standard configuration registers of the device, prepare it for waking up the system, or put it into a low-power state. All of these operations can very well be taken care of by the PCI subsystem, without the driver's participation. Thus remove these PCI functions. For the device which has wake up capability, use device_init_wakeup to init the wake up capability so that PCI core will help to enable the wakeup for it. Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: Do not advertise secure discard if it is blacklistedLukas Czerner2014-07-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when the device secure discard implementation is blacklisted (MMC_QUIRK_SEC_ERASE_TRIM_BROKEN quirk is set) instead of secure discard we're going to do normal discard, which is wrong. When the secure discard is known to be broken we should just disallow it entirely and not advertise this functionality to the user. Fix it. Also move mmc_fixup_device() in from of mmc_blk_alloc() so we can get quirks set before we attempt to set queue information. Signed-off-by: Lukas Czerner <lczerner@redhat.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci-msm: Get COMPILE_TEST supportGeorgi Djakov2014-07-26
| | | | | | | | | | | | | | Increase the build testing coverage. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci-msm: Remove unnecessary header file inclusionGeorgi Djakov2014-07-26
| | | | | | | | | | | | | | The header <linux/regulator/consumer.h> is unused. Remove it. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC ControllerMaurice Petallo2014-07-10
| | | | | | | | | | | | | | | | | | This is to enable DDR50 bus speed mode with 1.8V signaling capability for BayTrail ACPI and PCI mode eMMC Controller. Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci: Preset value not supported in Baytrail eMMCMaurice Petallo2014-07-10
| | | | | | | | | | | | | | | | | | "SDHCI_QUIRK2_PRESET_VALUE_BROKEN" quirk is added to prohibit preset value enabling for Baytrail eMMC controller. Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: MMC_USDHI6ROL0 should depend on HAS_DMAGeert Uytterhoeven2014-07-10
| | | | | | | | | | | | | | | | | | | | | | | | If NO_DMA=y: drivers/built-in.o: In function `usdhi6_dma_setup': usdhi6rol0.c:(.text+0x5c35fc): undefined reference to `dma_map_sg' drivers/built-in.o: In function `usdhi6_dma_stop_unmap': usdhi6rol0.c:(.text+0x5c3738): undefined reference to `dma_unmap_sg' Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: MMC_SH_MMCIF should depend on HAS_DMAGeert Uytterhoeven2014-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If NO_DMA=y: drivers/built-in.o: In function `sh_mmcif_start_dma_tx': sh_mmcif.c:(.text+0x5a3286): undefined reference to `dma_map_sg' drivers/built-in.o: In function `sh_mmcif_start_dma_rx': sh_mmcif.c:(.text+0x5a33fc): undefined reference to `dma_map_sg' drivers/built-in.o: In function `sh_mmcif_end_cmd': sh_mmcif.c:(.text+0x5a3668): undefined reference to `dma_unmap_sg' Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: MMC_OMAP_HS should depend on HAS_DMAGeert Uytterhoeven2014-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If NO_DMA=y: drivers/built-in.o: In function `omap_hsmmc_pre_dma_transfer': omap_hsmmc.c:(.text+0x5a0928): undefined reference to `dma_map_sg' drivers/built-in.o: In function `omap_hsmmc_dma_cleanup': omap_hsmmc.c:(.text+0x5a0e8e): undefined reference to `dma_unmap_sg' drivers/built-in.o: In function `omap_hsmmc_dma_callback': omap_hsmmc.c:(.text+0x5a1f58): undefined reference to `dma_unmap_sg' drivers/built-in.o: In function `omap_hsmmc_post_req': omap_hsmmc.c:(.text+0x5a2082): undefined reference to `dma_unmap_sg' Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci-st: Intial support for ST SDHCI controllerPeter Griffin2014-07-10
| | | | | | | | | | | | | | | | | | | | | | | | | | This platform driver adds initial support for the SDHCI host controller found on STMicroelectronics SoCs. It has been tested on STiH41x b2020 platforms currently. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: s3cmci: port DMA code to dmaengine APIVasily Khoruzhick2014-07-09
| | | | | | | | | | | | | | | | Utilise new s3c24xx-dma dmaengine driver for DMA ops. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: tegra: Do not include asm/gpio.hThierry Reding2014-07-09
| | | | | | | | | | | | | | | | This doesn't seem to be used any longer and removing the include fixes 64-bit ARM builds. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: mxs: fix card detection in case of 'broken-cd' flag setRoman Peniaev2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of reboot my olinuxino imx23 board does not see mmc card any more. mmc_rescan is being called by delayed work in loop, but mxs_mmc_get_cd always returns 0, so we will never pass the card detection check and will not do further card inition. This patch is just an attempt to partially revert the patch a91fe279ae of Sascha Hauer, where it is claimed that upper layer will handle broken card detection using the polling logic and MMC_CAP_NEEDS_POLL capability, but seems it is not true, because upper logic still expects 1 from 'get_cd'. So, here we always return 1 (card present) in case of MMC_CAP_NEEDS_POLL capability set. Signed-off-by: Roman Pen <r.peniaev@gmail.com> CC: Chris Ball <chris@printf.net> CC: Sascha Hauer <s.hauer@pengutronix.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Shawn Guo <shawn.guo@linaro.org> CC: Ulf Hansson <ulf.hansson@linaro.org> CC: linux-mmc@vger.kernel.org CC: linux-kernel@vger.kernel.org Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: s3cmci: Move to clk_prepare_enable/clk_disable_unprepareVasily Khoruzhick2014-07-09
| | | | | | | | | | | | | | | | Use clk_prepare_enable/clk_disable_unprepare to make the driver work properly with common clock framework. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: Allow forward compatibility for eMMCRomain Izard2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | As stated by the eMMC 5.0 specification, a chip should not be rejected only because of the revision stated in the EXT_CSD_REV field of the EXT_CSD register. Remove the control on this value, the control of the CSD_STRUCTURE field should be sufficient to reject future incompatible changes. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci: Replace host->mmc with mmc where possibleMarkus Mayer2014-07-09
| | | | | | | | | | | | | | | | | | | | After the switch to the MMC core regulator infrastucture, we already have a local "mmc" pointer in various functions. There is no longer a need to access the data structure via host->mmc. Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <mporter@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci: avoid double-delay while transitioning to 1.8VRussell King2014-07-09
| | | | | | | | | | | | | | | | | | The MMC core in mmc_set_signal_voltage() already provides for the delay required to switch to 1.8V, so there is no need for drivers to perform this wait themselves. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci-pci: SDIO host controller support for Intel Quark X1000Derek Browne2014-07-09
| | | | | | | | | | | | | | | | This patch is to enable SDIO host controller for Intel Quark X1000. Signed-off-by: Derek Browne <Derek.Browne@intel.com> Signed-off-by: Alvin (Weike) Chen <alvin.chen@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci: Remove blank lineUlf Hansson2014-07-09
| | | | | | | | | | | | | | | | | | While merging the sdhci patchset from Russell King, somehow a blank line was left behind. Let's correct the formatting. Cc: Chris Ball <chris@printf.net> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: sdhci: Improve external VDD regulator supportTim Kryger2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A standard compliant SDHCI can itself supply VDD at 1.8, 3.0, or 3.3v. Several vendors ignore this and instead rely upon external regulators to supply VDD. While the external regulators typically can supply one of the standard SDHCI voltage levels, there is no real reason for this to be a hard requirement. This patch alters the SDHCI driver such that external VDD regulators that provide voltages other than the three mentioned above may be used so long as they can supply a voltage that meets the needs of the card. In the case that an external VDD regulator is provided, it is reasonable to ignore the voltage capabilities of the host controller and allow the external regulator to set the OCR mask. Additionally, there is no need to convert a VDD voltage request into one of the standard SDHCI voltage levels or program it in the host controller's power control register. Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Tested-by: Sachin Kamat <spk.linux@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: wmt-sdmmc: Remove deprecated IRQF_DISABLEDAxel Lin2014-07-09
| | | | | | | | | | | | | | | | | | It's a NOOP since 2.6.35 and it will be removed one day. This is not trivial because current code uses hard coded 32 instead of IRQF_DISABLED in the request_irq call. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: wmt-sdmmc: Fix settting BM_EIGHTBIT_MODE bit in wmt_mci_set_ios()Axel Lin2014-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For MMC_BUS_WIDTH_8 case, current code missed setting BM_EIGHTBIT_MODE bit. Also has a small refactor to make the code looks better in readability. So the bit settings witch below logic: SDMMC_BUSMODE register: Set EIGHTBIT_MODE bit for 8 bit mode, Set FOURBIT_MODE bit for 4 bit mode. Clear both EIGHTBIT_MODE and FOURBIT_MODE bits for 1 bit mode. SDMMC_EXTCTRL register: Set EXT_EIGHTBIT bit for 8 bit mode, Clear EXT_EIGHTBIT bit for 1/4 bit mode. Add define for EXT_EIGHTBIT to avoid using magic number. BM_ONEBIT_MASK is no longer used, thus remove it. This patch is untested due to lack of platform with 8-bit hardware. However since the code is there, it's good to make the code match the document. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-20 03:46:29 -0400