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path: root/drivers/kvm
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* Consolidate host virtualization support under Virtualization menuRusty Russell2007-10-23
| | | | | | | Move lguest under the virtualization menu. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Avi Kivity <avi@qumranet.com>
* KVM: Use new smp_call_function_mask() in kvm_flush_remote_tlbs()Laurent Vivier2007-10-22
| | | | | | | | In kvm_flush_remote_tlbs(), replace a loop using smp_call_function_single() by a single call to smp_call_function_mask() (which is new for x86_64). Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Improve local apic timer wraparound handlingKevin Pedretti2007-10-22
| | | | | | | | | | Better handle wrap-around cases when reading the APIC CCR (current count register). Also, if ICR is 0, CCR should also be 0... previously reading CCR before setting ICR would result in a large kinda-random number. Signed-off-by: Kevin Pedretti <kevin.pedretti@gmail.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Fix local apic timer divide by zeroKevin Pedretti2007-10-22
| | | | | | | | | | | | | | kvm_lapic_reset() was initializing apic->timer.divide_count to 0, which could potentially lead to a divide by zero error in apic_get_tmcct(). Any guest that reads the APIC's CCR (current count) register before setting DCR (divide configuration) would trigger a divide by zero exception in the host kernel, leading to a host-OS crash. This patch results in apic->timer.divide_count being initialized to 2 at reset, eliminating the bug (DCR=0 at reset, meaning divide by 2). Signed-off-by: Kevin Pedretti <kevin.pedretti@gmail.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move kvm_guest_exit() after local_irq_enable()Laurent Vivier2007-10-22
| | | | | | | | | | We need to make sure that the timer interrupt happens before we clear PF_VCPU, so the accounting code actually sees guest mode. http://lkml.org/lkml/2007/10/15/114 Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: fix access registers for instructions with ModR/M byte ↵Aurelien Jarno2007-10-22
| | | | | | | | | | | | | | and Mod = 3 The patch belows changes the access type to register from memory for instructions that are declared as SrcMem or DstMem, but have a ModR/M byte with Mod = 3. It fixes (at least) the lmsw and smsw instructions on an AMD64 CPU, which are needed for FreeBSD. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Force vm86 mode if setting flags during real modeAvi Kivity2007-10-22
| | | | | | | When resetting from userspace, we need to handle the flags being cleared even after we are in real mode. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: implement 'movnti mem, reg'Sheng Yang2007-10-22
| | | | | | | | | Implement emulation of instruction: movnti m32/m64, r32/r64 opcode: 0x0f 0xc3 Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Reset mmu context when entering real modeEddie Dong2007-10-22
| | | | | | | | | | | | | Resetting an SMP guest will force AP enter real mode (RESET) with paging enabled in protected mode. While current enter_rmode() can only handle mode switch from nonpaging mode to real mode which leads to SMP reboot failure. Fix by reloading the mmu context on entering real mode. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Handle NMIs before enabling interrupts and preemptionAvi Kivity2007-10-22
| | | | | | | This makes sure we handle NMI on the current cpu, and that we don't service maskable interrupts before non-maskable ones. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Set shadow pte atomically in mmu_pte_write_zap_pte()Izik Eidus2007-10-22
| | | | | | | Setting shadow page table entry should be set atomicly using set_shadow_pte(). Signed-off-by: Izik Eidus <izike@qumranet.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: fix repne/repnz decodingLaurent Vivier2007-10-22
| | | | | | | | | | | | | The repnz/repne instructions must set rep_prefix to 1 like rep/repe/repz. This patch correct the disk probe problem met with OpenBSD. This issue appears with commit e70669abd4e60dfea3ac1639848e20e2b8dd1255 because before it, the decoding was done internally to kvm and after it is done by x86_emulate.c (which doesn't do it correctly). Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: fix merge screwup due to emulator splitNitin A Kamble2007-10-22
| | | | | | | | This code has gone to wrong place in the file. Moving it back to right location. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* sched: guest CPU accounting: maintain guest state in KVMLaurent Vivier2007-10-15
| | | | | | | | | | Modify KVM to update guest time accounting. [ mingo@elte.hu: ported to 2.6.24 KVM. ] Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Acked-by: Avi Kivity <avi@qumranet.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* KVM: Skip pio instruction when it is emulated, not executedAvi Kivity2007-10-13
| | | | | | | | | | | If we defer updating rip until pio instructions are executed, we have a problem with reset: a pio reset updates rip, and when the instruction completes we skip the emulated instruction, pointing rip somewhere completely unrelated. Fix by updating rip when we see decode the instruction, not after emulation. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: popfNitin A Kamble2007-10-13
| | | | | | | | | Implement emulation of instruction: popf opcode: 0x9d Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: fix src, dst value initializationNitin A Kamble2007-10-13
| | | | | | | | Some operand fetches are less than the machine word size and can result in stale bits if used together with operands of different sizes. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: jmp absNitin A Kamble2007-10-13
| | | | | | | | | Implement emulation of instruction: jump absolute r/m opcode: 0xff /4 Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: leaNitin A Kamble2007-10-13
| | | | | | | | | Implement emulation of instruction lea r16/r32, m opcode: 0x8d: Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: X86 emulator: jump conditional shortNitin A Kamble2007-10-13
| | | | | | | | | Implement emulation of more jump conditional instructions jcc shortrel opcodes: 0x70 - 0x7f Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: imlpement jump conditional relativeNitin A Kamble2007-10-13
| | | | | | | | | Implement emulation of instruction: jump conditional rel opcodes: 0x0f 0x80 - 0x0f 0x8f Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: sort opcodes into ascending orderNitin A Kamble2007-10-13
| | | | | Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Improve emulation failure reportingAvi Kivity2007-10-13
| | | | | | Report failed opcodes from all locations. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: pushfNitin A Kamble2007-10-13
| | | | | | | | | Implement emulation of instruction pushf opcode: 0x9c Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: call nearNitin A Kamble2007-10-13
| | | | | | | | | Implement emulation of instruction opcode: 0xe8 call (near) Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: push imm8Nitin A Kamble2007-10-13
| | | | | | | | | | Implement the instruction push imm8 opcode: 0x6a Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Fix exit qualification width on i386He, Qing2007-10-13
| | | | | | | | | | | | | | According to Intel Software Developer's Manual, Vol. 3B, Appendix H.4.2, exit qualification should be of natural width. However, current code uses u64 as the data type for this register, which occasionally introduces invalid value to VMExit handling logics. This patch fixes this bug. I have tested Windows and Linux guest on i386 host, and they can boot successfully with this patch. Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move main vcpu loop into subarch independent codeAvi Kivity2007-10-13
| | | | | | This simplifies adding new code as well as reducing overall code size. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Move vm entry failure handling to the exit handlerAvi Kivity2007-10-13
| | | | | | This will help moving the main loop to subarch independent code. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Don't do GFP_NOWAIT allocationsAvi Kivity2007-10-13
| | | | | | | | | | | Before preempt notifiers, kvm needed to allocate memory with GFP_NOWAIT so as not to have to enable preemption and take a heavyweight exit. On oom, we'd fall back to a GFP_KERNEL allocation. With preemption notifiers, we can do a GFP_KERNEL allocation, and perform the heavyweight exit only if the kernel decides to put us to sleep. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Rename kvm_arch_ops to kvm_x86_opsChristian Ehrhardt2007-10-13
| | | | | | | | This patch just renames the current (misnamed) _arch namings to _x86 to ensure better readability when a real arch layer takes place. Signed-off-by: Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Simplify memory allocationLaurent Vivier2007-10-13
| | | | | | | | | | The mutex->splinlock convertion alllows us to make some code simplifications. As we can keep the lock longer, we don't have to release it and then have to check if the environment has not been modified before re-taking it. We can remove kvm->busy and kvm->memory_config_version. Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Hoist SVM's get_cs_db_l_bits into core code.Rusty Russell2007-10-13
| | | | | | | | SVM gets the DB and L bits for the cs by decoding the segment. This is in fact the completely generic code, so hoist it for kvm-lite to use. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Keep control regs in syncRusty Russell2007-10-13
| | | | | | | | We don't update the vcpu control registers in various places. We should do so. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Clean up unloved invlpg emulationRusty Russell2007-10-13
| | | | | | | | | | invlpg shouldn't fetch the "src" address, since it may not be valid, however SVM's "solution" which neuters emulation of all group 7 instruction is horrible and breaks kvm-lite. The simplest fix is to put a special check in for invlpg. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Remove the unused invlpg member of struct kvm_arch_ops.Rusty Russell2007-10-13
| | | | | Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Set the ET flag in CR0 after initializing FXAmit Shah2007-10-13
| | | | | | | | | This was missed when moving stuff around in fbc4f2e Fixes Solaris guests and bug #1773613 Signed-off-by: Amit Shah <amit.shah@qumranet.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: enable in-kernel APIC INIT/SIPI handlingHe, Qing2007-10-13
| | | | | | | | | | | This patch enables INIT/SIPI handling using in-kernel APIC by introducing a ->mp_state field to emulate the SMP state transition. [avi: remove smp_processor_id() warning] Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Xin Li <xin.b.li@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: round robin for APIC lowest priority delivery modeHe, Qing2007-10-13
| | | | | Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: deliver PIC interrupt only to vcpu0Qing He2007-10-13
| | | | | | | | | | | | | This patch changes the PIC interrupts delivery. Now it is only delivered to vcpu0 when either condition is met (on vcpu0): 1. local APIC is hardware disabled 2. LVT0 is unmasked and configured to delivery mode ExtInt It fixes the 2x faster wall clock on x86_64 and SMP i386 Linux guests Signed-off-by: Eddie (Yaozu) Dong <eddie.dong@intel.com> Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: disable tpr/cr8 sync when in-kernel APIC is usedHe, Qing2007-10-13
| | | | | Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Migrate lapic hrtimer when vcpu moves to another cpuEddie Dong2007-10-13
| | | | | | | | | | | This reduces overhead by accessing cachelines from the wrong node, as well as simplifying locking. [Qing: fix for inactive or expired one-shot timer] Signed-off-by: Yaozu (Eddie) Dong <Eddie.Dong@intel.com> Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Keep track of missed timer irq injectionsEddie Dong2007-10-13
| | | | | | | | | | | | | APIC timer IRQ is set every time when a certain period expires at host time, but the guest may be descheduled at that time and thus the irq be overwritten by later fire. This patch keep track of firing irq numbers and decrease only when the IRQ is injected to guest or buffered in APIC. Signed-off-by: Yaozu (Eddie) Dong <Eddie.Dong@intel.com> Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Use shadow TPR/cr8 for 64-bits guestsYang, Sheng2007-10-13
| | | | | | | | | | | This patch enables TPR shadow of VMX on CR8 access. 64bit Windows using CR8 access TPR frequently. The TPR shadow can improve the performance of access TPR by not causing vmexit. Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: pending irq save/restoreEddie Dong2007-10-13
| | | | | | | | | | | Add in kernel irqchip save/restore support for pending vectors. [avi: fix compile warning on i386] [avi: remove printk] Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: in-kernel LAPIC save and restore supportEddie Dong2007-10-13
| | | | | | | | | | | | This patch adds a new vcpu-based IOCTL to save and restore the local apic registers for a single vcpu. The kernel only copies the apic page as a whole, extraction of registers is left to userspace side. On restore, the APIC timer is restarted from the initial count, this introduces a little delay, but works fine. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: in-kernel IOAPIC save and restore supportHe, Qing2007-10-13
| | | | | | | | | | This patch adds support for in-kernel ioapic save and restore (to and from userspace). It uses the same get/set_irqchip ioctl as in-kernel PIC. Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Bypass irq_pending get/set when using in kernel irqchipHe, Qing2007-10-13
| | | | | | | | vcpu->irq_pending is saved in get/set_sreg IOCTL, but when in-kernel local APIC is used, doing this may occasionally overwrite vcpu->apic to an invalid value, as in the vm restore path. Signed-off-by: Qing He <qing.he@intel.com>
* KVM: Add get/set irqchip ioctls for in-kernel PIC live migration supportHe, Qing2007-10-13
| | | | | | | | | | This patch adds two new ioctls to dump and write kernel irqchips for save/restore and live migration. PIC s/r and l/m is implemented in this patch. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Qing He <qing.he@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Protect in-kernel pio using kvm->lockEddie Dong2007-10-13
| | | | | | | | pio operation and IRQ_LINE kvm_vm_ioctl is not kvm->lock protected. Add lock to same with IOAPIC MMIO operations. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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