aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/iommu
Commit message (Collapse)AuthorAge
* Merge tag 'iommu-updates-v3.4' of ↵Linus Torvalds2012-03-23
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "The IOMMU updates for this round are not very large patch-wise. But they contain two new IOMMU drivers for the ARM Tegra 2 and 3 platforms. Besides that there are also a few patches for the AMD IOMMU which prepare the driver for adding intr-remapping support and a couple of fixes." * tag 'iommu-updates-v3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/amd: Fix section mismatch iommu/amd: Move interrupt setup code into seperate function iommu/amd: Make sure IOMMU interrupts are re-enabled on resume iommu/amd: Fix section warning for prealloc_protection_domains iommu/amd: Don't initialize IOMMUv2 resources when not required iommu/amd: Update git-tree in MAINTAINERS iommu/tegra-gart: fix spin_unlock in map failure path iommu/amd: Fix double free of mem-region in error-path iommu/amd: Split amd_iommu_init function ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver ARM: IOMMU: Tegra20: Add iommu_ops for GART driver
| *-. Merge branches 'iommu/fixes', 'arm/tegra' and 'x86/amd' into nextJoerg Roedel2012-03-22
| |\ \
| | | * iommu/amd: Fix section mismatchGerard Snitselaar2012-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | amd_iommu_enable_interrupts() called in amd_iommu_resume(). Signed-off-by: Gerard Snitselaar <dev@snitselaar.org> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | | * iommu/amd: Move interrupt setup code into seperate functionJoerg Roedel2012-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For interrupt remapping the enablement of the IOMMU MSI interrupt needs to be deferred because the IOMMU itself will be initialized before the io-apics are up and running. So the code to setup the MSI is moved seperated from the hardware-setup routine now. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Make sure IOMMU interrupts are re-enabled on resumeJoerg Roedel2012-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunatly the interrupts for the event log and the peripheral page-faults are only enabled at boot but not re-enabled at resume. Fix that. Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Fix section warning for prealloc_protection_domainsSteffen Persvold2012-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following section warning in drivers/iommu/amd_iommu.c : WARNING: vmlinux.o(.text+0x526e77): Section mismatch in reference from the function prealloc_protection_domains() to the function .init.text:alloc_passthrough_domain() The function prealloc_protection_domains() references the function __init alloc_passthrough_domain(). This is often because prealloc_protection_domains lacks a __init annotation or the annotation of alloc_passthrough_domain is wrong. Cc: stable@vger.kernel.org Signed-off-by: Steffen Persvold <sp@numascale.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Don't initialize IOMMUv2 resources when not requiredJoerg Roedel2012-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a check to the init-path of the AMD IOMMUv2 driver if the hardware is available in the system. Only allocate all the resources if it is really available. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Fix double free of mem-region in error-pathJoerg Roedel2012-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When ioremap_nocache fails in iommu initialization the code calls release_mem_region immediatly. But the function is called again when the propagates into the upper init functions leading to a double-free. Fix that. Reported-by: Don Dutile <ddutile@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * iommu/amd: Split amd_iommu_init functionJoerg Roedel2012-03-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware-initializtion part of the AMD IOMMU driver is split out into a seperate function. This function can now be called either from amd_iommu_init() itself or any other place if the hardware needs to be ready earlier. This will be used to implement interrupt remapping for AMD. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * | iommu/tegra-gart: fix spin_unlock in map failure pathLucas Stach2012-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This must have been messed up while merging, the intention was clearly to unlock there. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * | ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driverHiroshi DOYU2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit). This patch implements struct iommu_ops for SMMU for the upper IOMMU API. This H/W module supports multiple virtual address spaces(domain x4), and manages 2 level H/W translation pagetable. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * | ARM: IOMMU: Tegra20: Add iommu_ops for GART driverHiroshi DOYU2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra 20 IOMMU H/W, GART (Graphics Address Relocation Table). This patch implements struct iommu_ops for GART for the upper IOMMU API. This H/W module supports only single virtual address space(domain), and manages a single level 1-to-1 mapping H/W translation page table. [With small fixes by Joerg Roedel] Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | | | Merge branch 'x86-debug-for-linus' of ↵Linus Torvalds2012-03-22
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86/debug changes from Ingo Molnar. * 'x86-debug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86: Fix section warnings x86-64: Fix CFI data for common_interrupt() x86: Properly _init-annotate NMI selftest code x86/debug: Fix/improve the show_msr=<cpus> debug print out
| * | | | x86: Fix section warningsSteffen Persvold2012-03-19
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following section warnings : WARNING: vmlinux.o(.text+0x49dbc): Section mismatch in reference from the function acpi_map_cpu2node() to the variable .cpuinit.data:__apicid_to_node The function acpi_map_cpu2node() references the variable __cpuinitdata __apicid_to_node. This is often because acpi_map_cpu2node lacks a __cpuinitdata annotation or the annotation of __apicid_to_node is wrong. WARNING: vmlinux.o(.text+0x49dc1): Section mismatch in reference from the function acpi_map_cpu2node() to the function .cpuinit.text:numa_set_node() The function acpi_map_cpu2node() references the function __cpuinit numa_set_node(). This is often because acpi_map_cpu2node lacks a __cpuinit annotation or the annotation of numa_set_node is wrong. WARNING: vmlinux.o(.text+0x526e77): Section mismatch in reference from the function prealloc_protection_domains() to the function .init.text:alloc_passthrough_domain() The function prealloc_protection_domains() references the function __init alloc_passthrough_domain(). This is often because prealloc_protection_domains lacks a __init annotation or the annotation of alloc_passthrough_domain is wrong. Signed-off-by: Steffen Persvold <sp@numascale.com> Link: http://lkml.kernel.org/r/1331810188-24785-1-git-send-email-sp@numascale.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* | | | Merge branch 'for-linus' of ↵Linus Torvalds2012-03-21
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial tree from Jiri Kosina: "It's indeed trivial -- mostly documentation updates and a bunch of typo fixes from Masanari. There are also several linux/version.h include removals from Jesper." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (101 commits) kcore: fix spelling in read_kcore() comment constify struct pci_dev * in obvious cases Revert "char: Fix typo in viotape.c" init: fix wording error in mm_init comment usb: gadget: Kconfig: fix typo for 'different' Revert "power, max8998: Include linux/module.h just once in drivers/power/max8998_charger.c" writeback: fix fn name in writeback_inodes_sb_nr_if_idle() comment header writeback: fix typo in the writeback_control comment Documentation: Fix multiple typo in Documentation tpm_tis: fix tis_lock with respect to RCU Revert "media: Fix typo in mixer_drv.c and hdmi_drv.c" Doc: Update numastat.txt qla4xxx: Add missing spaces to error messages compiler.h: Fix typo security: struct security_operations kerneldoc fix Documentation: broken URL in libata.tmpl Documentation: broken URL in filesystems.tmpl mtd: simplify return logic in do_map_probe() mm: fix comment typo of truncate_inode_pages_range power: bq27x00: Fix typos in comment ...
| * | | | iommu: Fix typo in intel-iommu.cMasanari Iida2012-02-05
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | Correct spelling "supportd" to "supported" in drivers/iommu/intel-iommu.c Signed-off-by: Masanari Iida<standby24x7@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | | Merge branch 'core-iommu-for-linus' of ↵Linus Torvalds2012-03-19
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull core/iommu changes for v3.4 from Ingo Molnar * 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/iommu/intel: Increase the number of iommus supported to MAX_IO_APICS x86/iommu/intel: Fix identity mapping for sandy bridge
| * | | x86/iommu/intel: Increase the number of iommus supported to MAX_IO_APICSMike Travis2012-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of IOMMUs supported should be the same as the number of IO APICS. This limit comes into play when the IOMMUs are identity mapped, thus the number of possible IOMMUs in the "static identity" (si) domain should be this same number. Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Jack Steiner <steiner@sgi.com> Cc: Jack Steiner <steiner@sgi.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Chris Wright <chrisw@sous-sol.org> Cc: Daniel Rahn <drahn@suse.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Joerg Roedel <joerg.roedel@amd.com> [ Fixed printk format string, cleaned up the code ] Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Link: http://lkml.kernel.org/n/tip-ixcmp0hfp0a3b2lfv3uo0p0x@git.kernel.org Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | x86/iommu/intel: Fix identity mapping for sandy bridgeMike Travis2012-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With SandyBridge, Intel has changed these Socket PCI devices to have a class type of "System Peripheral" & "Performance counter", rather than "HostBridge". So instead of using a "special" case to detect which devices will not be doing DMA, use the fact that a device that is not associated with an IOMMU, will not need an identity map. Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Mike Habeck <habeck@sgi.com> Cc: Jack Steiner <steiner@sgi.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Chris Wright <chrisw@sous-sol.org> Cc: Daniel Rahn <drahn@suse.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Link: http://lkml.kernel.org/n/tip-018fywmjs3lmzfyzjlktg8dx@git.kernel.org Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | x86/amd: iommu_set_device_table() must not be __initJan Beulich2012-03-08
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | This function is called from enable_iommus(), which in turn is used from amd_iommu_resume(). Cc: stable@vger.kernel.org Signed-off-by: Jan Beulich <jbeulich@suse.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | | ARM: OMAP: make iommu subsys_initcall to fix builtin omap3ispOhad Ben-Cohen2012-02-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap3isp depends on omap's iommu and will fail to probe if initialized before it (which always happen if they are builtin). Make omap's iommu subsys_initcall as an interim solution until the probe deferral mechanism is merged. Reported-by: James <angweiyang@gmail.com> Debugged-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: stable <stable@vger.kernel.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | | iommu/omap: fix NULL pointer dereferenceOhad Ben-Cohen2012-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix this: root@omap4430-panda:~# cat /debug/iommu/ducati/mem [ 62.725708] Unable to handle kernel NULL pointer dereference at virtual addre ss 0000001c [ 62.725708] pgd = e6240000 [ 62.737091] [0000001c] *pgd=a7168831, *pte=00000000, *ppte=00000000 [ 62.743682] Internal error: Oops: 17 [#1] SMP [ 62.743682] Modules linked in: omap_iommu_debug omap_iovmm virtio_rpmsg_bus o map_remoteproc remoteproc virtio_ring virtio mailbox_mach mailbox [ 62.743682] CPU: 0 Not tainted (3.3.0-rc1-00265-g382f84e-dirty #682) [ 62.743682] PC is at debug_read_mem+0x5c/0xac [omap_iommu_debug] [ 62.743682] LR is at 0x1004 [ 62.777832] pc : [<bf033178>] lr : [<00001004>] psr: 60000013 [ 62.777832] sp : e72c7f40 ip : c0763c00 fp : 00000001 [ 62.777832] r10: 00000000 r9 : 00000000 r8 : e72c7f80 [ 62.777832] r7 : e6ffdc08 r6 : bed1ac78 r5 : 00001000 r4 : e7276000 [ 62.777832] r3 : e60f3460 r2 : 00000000 r1 : e60f38c0 r0 : 00000000 [ 62.777832] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 62.816375] Control: 10c53c7d Table: a624004a DAC: 00000015 [ 62.816375] Process cat (pid: 1176, stack limit = 0xe72c62f8) [ 62.828369] Stack: (0xe72c7f40 to 0xe72c8000) ... [ 62.884185] [<bf033178>] (debug_read_mem+0x5c/0xac [omap_iommu_debug]) from [<c010e354>] (vfs_read+0xac/0x130) [ 62.884185] [<c010e354>] (vfs_read+0xac/0x130) from [<c010e4a8>] (sys_read+0x40/0x70) [ 62.884185] [<c010e4a8>] (sys_read+0x40/0x70) from [<c0014a00>] (ret_fast_syscall+0x0/0x3c) Fix also its 'echo bla > /debug/iommu/ducati/mem' Oops sibling, too. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | | iommu/omap: fix erroneous omap-iommu-debug API callsOhad Ben-Cohen2012-02-24
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adapt omap-iommu-debug to the latest omap-iommu API changes, which were introduced by commit fabdbca "iommu/omap: eliminate the public omap_find_iommu_device() method". In a nutshell, iommu users are not expected to provide the omap_iommu handle anymore - instead, iommus are attached using their user's device handle. omap-iommu-debug is a hybrid beast though: it invokes both public and private omap iommu API, so fix it as necessary (otherwise a crash is imminent). Note: omap-iommu-debug is a bit disturbing, as it fiddles with internal omap iommu data and requires exposing API which is otherwise not needed. It should better be more tightly coupled with omap-iommu, to prevent further bit rot and avoid exposing redundant API. Naturally that's out of scope for the -rc cycle, so for now just fix the obvious. Reported-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/msm: Fix error handling in msm_iommu_unmap()Joerg Roedel2012-01-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Error handling in msm_iommu_unmap() is broken. On some error conditions retval is set to a non-zero value which causes the function to return 'len' at the end. This hides the error from the user. Zero should be returned in those error cases. Cc: David Brown <davidb@codeaurora.org> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Cc: stable@vger.kernel.org # >= 3.1 Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Acked-by: David Brown <davidb@codeaurora.org>
* | iommu/amd: Work around broken IVRS tablesJoerg Roedel2012-01-23
|/ | | | | | | | | | | | On some systems the IVRS table does not contain all PCI devices present in the system. In case a device not present in the IVRS table is translated by the IOMMU no DMA is possible from that device by default. This patch fixes this by removing the DTE entry for every PCI device present in the system and not covered by IVRS. Cc: stable@vger.kernel.org # >= 3.0 Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommuLinus Torvalds2012-01-10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (53 commits) iommu/amd: Set IOTLB invalidation timeout iommu/amd: Init stats for iommu=pt iommu/amd: Remove unnecessary cache flushes in amd_iommu_resume iommu/amd: Add invalidate-context call-back iommu/amd: Add amd_iommu_device_info() function iommu/amd: Adapt IOMMU driver to PCI register name changes iommu/amd: Add invalid_ppr callback iommu/amd: Implement notifiers for IOMMUv2 iommu/amd: Implement IO page-fault handler iommu/amd: Add routines to bind/unbind a pasid iommu/amd: Implement device aquisition code for IOMMUv2 iommu/amd: Add driver stub for AMD IOMMUv2 support iommu/amd: Add stat counter for IOMMUv2 events iommu/amd: Add device errata handling iommu/amd: Add function to get IOMMUv2 domain for pdev iommu/amd: Implement function to send PPR completions iommu/amd: Implement functions to manage GCR3 table iommu/amd: Implement IOMMUv2 TLB flushing routines iommu/amd: Add support for IOMMUv2 domain mode iommu/amd: Add amd_iommu_domain_direct_map function ...
| * Merge branches 'iommu/page-sizes' and 'iommu/group-id' into nextJoerg Roedel2012-01-09
| |\ | | | | | | | | | | | | | | | | | | Conflicts: drivers/iommu/amd_iommu.c drivers/iommu/intel-iommu.c include/linux/iommu.h
| | * iommu: Add option to group multi-function devicesAlex Williamson2011-11-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The option iommu=group_mf indicates the that the iommu driver should expose all functions of a multi-function PCI device as the same iommu_device_group. This is useful for disallowing individual functions being exposed as independent devices to userspace as there are often hidden dependencies. Virtual functions are not affected by this option. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/amd: Implement iommu_device_groupAlex Williamson2011-11-15
| | | | | | | | | | | | | | | | | | | | | Just use the amd_iommu_alias_table directly. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu/intel: Implement iommu_device_groupAlex Williamson2011-11-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We generally have BDF granularity for devices, so we just need to make sure devices aren't hidden behind PCIe-to-PCI bridges. We can then make up a group number that's simply the concatenated seg|bus|dev|fn so we don't have to track them (not that users should depend on that). Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Acked-By: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * iommu: Add iommu_device_group callback and iommu_group sysfs entryAlex Williamson2011-11-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An IOMMU group is a set of devices for which the IOMMU cannot distinguish transactions. For PCI devices, a group often occurs when a PCI bridge is involved. Transactions from any device behind the bridge appear to be sourced from the bridge itself. We leave it to the IOMMU driver to define the grouping restraints for their platform. Using this new interface, the group for a device can be retrieved using the iommu_device_group() callback. Users will compare the value returned against the value returned for other devices to determine whether they are part of the same group. Devices with no group are not translated by the IOMMU. There should be no expectations about the group numbers as they may be arbitrarily assigned by the IOMMU driver and may not be persistent across boots. We also provide a sysfs interface to the group numbers here so that userspace can understand IOMMU dependencies between devices for managing safe, userspace drivers. [Some code changes by Joerg Roedel <joerg.roedel@amd.com>] Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | |
| | \
| *-. \ Merge branches 'iommu/fixes', 'arm/omap' and 'x86/amd' into nextJoerg Roedel2012-01-09
| |\ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/pci/hotplug/acpiphp_glue.c
| | | * | iommu/amd: Set IOTLB invalidation timeoutJoerg Roedel2011-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To protect the command buffer from hanging when a device does not respond to an IOTLB invalidation, set a timeout of 1s for outstanding IOTLB invalidations. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Init stats for iommu=ptJoerg Roedel2011-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IOMMUv2 driver added a few statistic counter which are interesting in the iommu=pt mode too. So initialize the statistic counter for that mode too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Remove unnecessary cache flushes in amd_iommu_resumeJoerg Roedel2011-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The caches are already flushed in enable_iommus(), so this flush is not necessary. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Add invalidate-context call-backJoerg Roedel2011-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This call-back is invoked when the task that is bound to a pasid is about to exit. The driver can use it to shutdown all context related to that context in a safe way. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Add amd_iommu_device_info() functionJoerg Roedel2011-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function can be used to find out which features necessary for IOMMUv2 usage are available on a given device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Adapt IOMMU driver to PCI register name changesJoerg Roedel2011-12-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The symbolic register names for PCI and PASID changed in PCI code. This patch adapts the AMD IOMMU driver to these changes. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | Merge branch 'iommu/page-sizes' into x86/amdJoerg Roedel2011-12-14
| | | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/iommu/amd_iommu.c
| | | | * | iommu/core: remove the temporary pgsize settingsOhad Ben-Cohen2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all IOMMU drivers are exporting their supported pgsizes, we can remove the default pgsize settings in register_iommu(). Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | iommu/intel: announce supported page sizesOhad Ben-Cohen2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let the IOMMU core know we support arbitrary page sizes (as long as they're an order of 4KiB). This way the IOMMU core will retain the existing behavior we're used to; it will let us map regions that: - their size is an order of 4KiB - they are naturally aligned Note: Intel IOMMU hardware doesn't support arbitrary page sizes, but the driver does (it splits arbitrary-sized mappings into the pages supported by the hardware). To make everything simpler for now, though, this patch effectively tells the IOMMU core to keep giving this driver the same memory regions it did before, so nothing is changed as far as it's concerned. At this point, the page sizes announced remain static within the IOMMU core. To correctly utilize the pgsize-splitting of the IOMMU core by this driver, it seems that some core changes should still be done, because Intel's IOMMU page size capabilities seem to have the potential to be different between different DMA remapping devices. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | iommu/amd: announce supported page sizesOhad Ben-Cohen2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let the IOMMU core know we support arbitrary page sizes (as long as they're an order of 4KiB). This way the IOMMU core will retain the existing behavior we're used to; it will let us map regions that: - their size is an order of 4KiB - they are naturally aligned Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | iommu/msm: announce supported page sizesOhad Ben-Cohen2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes. This way the IOMMU core can split any arbitrary-sized physically contiguous regions (that it needs to map) as needed. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Acked-by: David Brown <davidb@codeaurora.org> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | iommu/omap: announce supported page sizesOhad Ben-Cohen2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let the IOMMU core know we support 4KiB, 64KiB, 1MiB and 16MiB page sizes. This way the IOMMU core can split any arbitrary-sized physically contiguous regions (that it needs to map) as needed. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | iommu/core: split mapping to page sizes as supported by the hardwareOhad Ben-Cohen2011-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When mapping a memory region, split it to page sizes as supported by the iommu hardware. Always prefer bigger pages, when possible, in order to reduce the TLB pressure. The logic to do that is now added to the IOMMU core, so neither the iommu drivers themselves nor users of the IOMMU API have to duplicate it. This allows a more lenient granularity of mappings; traditionally the IOMMU API took 'order' (of a page) as a mapping size, and directly let the low level iommu drivers handle the mapping, but now that the IOMMU core can split arbitrary memory regions into pages, we can remove this limitation, so users don't have to split those regions by themselves. Currently the supported page sizes are advertised once and they then remain static. That works well for OMAP and MSM but it would probably not fly well with intel's hardware, where the page size capabilities seem to have the potential to be different between several DMA remapping devices. register_iommu() currently sets a default pgsize behavior, so we can convert the IOMMU drivers in subsequent patches. After all the drivers are converted, the temporary default settings will be removed. Mainline users of the IOMMU API (kvm and omap-iovmm) are adopted to deal with bytes instead of page order. Many thanks to Joerg Roedel <Joerg.Roedel@amd.com> for significant review! Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: David Brown <davidb@codeaurora.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Cc: KyongHo Cho <pullip.cho@samsung.com> Cc: Hiroshi DOYU <hdoyu@nvidia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: kvm@vger.kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | | * | iommu/core: stop converting bytes to page order back and forthOhad Ben-Cohen2011-11-10
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Express sizes in bytes rather than in page order, to eliminate the size->order->size conversions we have whenever the IOMMU API is calling the low level drivers' map/unmap methods. Adopt all existing drivers. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: David Brown <davidb@codeaurora.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Cc: KyongHo Cho <pullip.cho@samsung.com> Cc: Hiroshi DOYU <hdoyu@nvidia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Add invalid_ppr callbackJoerg Roedel2011-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This callback can be used to change the PRI response code sent to a device when a PPR fault fails. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Implement notifiers for IOMMUv2Joerg Roedel2011-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since pages are not pinned anymore we need notifications when the VMM changes the page-tables. Use mmu_notifiers for that. Also use the task_exit notifier from the profiling subsystem to shutdown all contexts related to this task. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Implement IO page-fault handlerJoerg Roedel2011-12-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register the notifier for PPR faults and handle them as necessary. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | iommu/amd: Add routines to bind/unbind a pasidJoerg Roedel2011-12-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds routines to bind a specific process address-space to a given PASID. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 22:14:52 -0500