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path: root/drivers/ide/pci/hpt366.c
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* ide: move ide_rate_filter() calls to the upper layer (take 2)Bartlomiej Zolnierkiewicz2007-10-11
| | | | | | | | | | | | | | | | * Move ide_rate_filter() calls from host drivers to IDE core. * Make ide_rate_filter() static. * Make 'speed' argument of ->speedproc const. v2: * Fix it8213_tune_chipset() comment. There should be no functionality changes caused by this patch. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: mode limiting fixes for user requested speed changesBartlomiej Zolnierkiewicz2007-10-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add an extra argument to ide_max_dma_mode() for passing requested transfer mode. Use it as an upper limit when finding the best DMA for device/host. * Rename ide_max_dma_mode() to ide_find_dma_mode() and at the same time add ide_max_dma_mode() wrapper which passes XFER_UDMA_6 as a requested mode to ide_find_dma_mode(). Also add inline ide_find_dma_mode() version for CONFIG_BLK_DEV_IDEDMA=n case. * Pass requested transfer mode from ide_find_dma_mode() to ide_get_mode_mask() to avoid false warning from eighty_ninty_three(). * Use ide_find_dma_mode() to limit the user requested transfer mode in ide_rate_filter(). Also limit the requested mode by host max PIO mode. Above changes make ide_rate_filter() to: * Clip desired transfer mode down if it is invalid (values 0x0F, 0x13-0x19 and 0x25-0x39, values > 0x46 were already clipped down, same for values 0x25-0x39 but iff UDMA was not supported by the host). * Clip desired transfer mode down if it is currently unsupported by IDE core (PIO6 and MWDMA3-4, the latter were already clipped down but iff UDMA was not supported by the host). * Clip desired transfer mode down according to the host capabilities (UDMA modes were already clipped down but MWDMA/SWDMA/PIO weren't, also ->atapi_dma flag was not respected). * Clip desired transfer mode down according to the device capabilities (except PIO modes for now which require mode work) - shouldn't be a problem since ide_set_xfer_rate() is called _after_ device has accepted given transfer mode. and also result in a number of host driver specific bugfixes: * icside - clip unsupported PIO5 mode down - fix unsupported/invalid modes being set in drive->current_speed * ide-cris - clip unsupported PIO5 and SWDMA0-2 modes down - clip DMA modes down for ATAPI devices - fix BUG() on unsupported/invalid modes * au1xxx-ide - clip unsupported PIO5, SWDMA0-2 and MWDMA0-2 (if BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA=n) modes down * aec62xx - clip unsupported PIO5 and SWDMA0-2 modes down - clip DMA modes down for ATAPI devices - fix 0x00 being programmed as PIO timing for unsupported/invalid modes - fix unsupported/invalid modes being set on the device * alim15x3 - clip DMA modes down for ATAPI devices (chipset revision == 0x20 only) - fix theoretical OOPS for 0x0F mode - fix unsupported/invalid modes being set on the device * amd74xx - clip unsupported SWDMA0-2 (on COBRA_7401 revs <= 7) modes down - fix random PIO timings being set for unsupported/invalid modes - fix unsupported/invalid modes being set on the device * atiixp - clip unsupported PIO5 and SWDMA0-2 modes down - fix cached MWDMA mode being cleared for unsupported/invalid modes - fix PIO{0,2} timings being programmed for unsupported/invalid modes - fix theoretical OOPS for PIO5-6 and 0x0F modes - fix unsupported/invalid modes being set on the device * cmd64x - clip unsupported SWDMA0-2 modes down * cs5530 - clip unsupported PIO5 and SWDMA0-2 modes down - fix unsupported/invalid modes being set on the device - fix BUG() on unsupported/invalid modes (which happened if the device accepted the setting) * cs5535 - clip unsupported PIO5 and SWDMA0-2 modes down - fix unsupported/invalid modes being set on the device - fix theoretical OOPS for PIO5-6 and 0x0F modes * hpt34x - clip DMA modes down for ATAPI devices - fix invalid timings being programmed for unsupported/invalid modes - fix unsupported/invalid modes being set on the device * hpt366 - clip unsupported PIO5 and SWDMA0-2 modes down - fix PIO0 timings being programmed for unsupported/invalid modes - fix DMA timings being cleared for MWDMA3-4 and 0x25-0x39 modes - fix unsupported/invalid modes being set on the device * it8213 - clip unsupported PIO5, SWDMA0-1 and MWDMA0 modes down * it821x - clip unsupported PIO5 and SWDMA0-2 modes down - clip DMA modes down for ATAPI devices (chipset in smart mode and revision 0x10 in pass-through mode) * jmicron - clip unsupported SWDMA0-2 modes down - fix unsupported/invalid modes being set on the device * pdc202xx_new - clip unsupported PIO5 and SWDMA0-2 modes down - fix unsupported/invalid modes being set on the device * pdc202xx_old - clip unsupported PIO5 mode down - fix incorrect timings being set for unsupported/invalid modes - fix unsupported/invalid modes being set on the device * piix - clip unsupported PIO5, SWDMA0-1 and MWDMA0 modes down * sc1200 - clip unsupported PIO5 and SWDMA0-2 modes down - fix unsupported/invalid modes being set on the device - fix BUG() on unsupported/invalid modes (which happened if the device accepted the setting) * scc_pata - clip unsupported PIO5, SWDMA0-2 and MWDMA0-2 modes down * serverworks - clip unsupported PIO5 and SWDMA0-2 modes down - fix DMA/UDMA timings/settings being cleared for unsupported/invalid modes - fix unsupported/invalid modes being set on the device * siimage - clip unsupported PIO5 and SWDMA0-2 modes down - clip DMA modes down for ATAPI devices (SATA chipsets) * sis5513 - clip unsupported PIO5 mode down - fix BUG() on unsupported/invalid modes * sl82c105 - clip unsupported SWDMA0-2 modes down * slc90e66 - clip unsupported PIO5, SWDMA0-1 and MWDMA0 modes down * tc86c001 - clip unsupported PIO5 and SWDMA0-2 modes down - fix PIO0 timings being programmed for PIO5/0x0F/SWDMA0-2/0x13-0x19 modes - fix invalid 0x00 DMA timing being programmed for MWDMA3-4/0x25-0x39 modes - fix unsupported/invalid modes being set on the device * triflex - clip unsupported PIO5 mode down * via82cxxx - fix random PIO timings being set for unsupported/invalid modes - fix unsupported/invalid modes being set on the device * pmac - clip unsupported PIO5 and SWDMA0-2 modes down * cmd640/ht6560b - clip DMA modes down (if CONFIG_BLK_DEV_IDEDMA=y) - fix PIO5 being clipped to PIO4 (if CONFIG_BLK_DEV_IDEDMA=n) * opti621 - clip DMA modes down (if CONFIG_BLK_DEV_IDEDMA=y) - clip unsupported PIO4 to PIO3 (if CONFIG_BLK_DEV_IDEDMA=n) While at it: * Use ide_rate_filter() in cs5520.c::cs5520_tune_chipset(). * Remove no longer needed checks from hpt366.c::hpt3{6,7}x_tune_chipset(). Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: MWDMA filter for SATA cards (take 2)Sergei Shtylyov2007-10-11
| | | | | | | | | | | | | | | The Marvell bridge chips used on HighPoint SATA cards do not seem to support the MWDMA modes (at least that could be seen in their so-called drivers :-), so the driver needs to account for this -- to achieve this: - add mdma_filter() method from the original patch by Bartlomiej Zolnierkiewicz with his consent; - install the method for all chips to only return empty mask if a SATA drive is detected on HPT372{AN]/374 chips... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: UltraDMA filter for SATA cards (take 2)Sergei Shtylyov2007-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | The Marvell bridge chips used on HighPoint SATA cards do not seem to support the UltraDMA modes 1, 2, and 3 as well as any MWDMA modes, so the driver needs to account for this in the udma_filter() method. In order to achieve that, do the following changes: - install the method for all chips, not only HPT36x/370 and improve the code formatting by killing the extra tabs while at it; - add to the end of the 'switch' statement in the method cases for HPT372[AN] and HPT374 chips upon which the known SATA cards are based; - use hwif->ultra_mask as a default mask for the ide_dma_filter() method to behave correctly; - move the HPT370[A] cases below the HPT36x case for consistency. While at it, replace the explicit UltraDMA mode masks with ATA_UDMA* constants all over the driver... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Bob Ham <rah@bash.sh> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: fix PCI clock detection for HPT374 (take 4)Sergei Shtylyov2007-09-11
| | | | | | | | | | | | HPT374 BIOS seems to only save f_CNT register value for the function #0 before re-tuning DPLL (that causes the driver to report obviously distorted f_CNT for the function #1) -- fix this by always reading the saved f_CNT register value from the function #0 in the driver's init_chipset() method. While at it, introduce 'chip_type' for holding the 'struct hpt_info' field of the same name and replace the structure assignment with memcpy()... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: add PIO masksBartlomiej Zolnierkiewicz2007-07-19
| | | | | | | | | | | | | * Add ATA_PIO[0-6] defines to <linux/ata.h>. * Add ->pio_mask field to ide_pci_device_t and ide_hwif_t. * Add PIO masks to host drivers. <linux/ata.h> change ACK-ed by Jeff Garzik <jeff@garzik.org>. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: drop "PIO data" argument from ide_get_best_pio_mode()Bartlomiej Zolnierkiewicz2007-07-19
| | | | | | | | | | * Drop no longer needed "PIO data" argument from ide_get_best_pio_mode() and convert all users accordingly. * Remove no longer needed ide_pio_data_t. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: add ide_pci_device_t.host_flags (take 2)Bartlomiej Zolnierkiewicz2007-07-19
| | | | | | | | | | | | | | | | | | * Rename ide_pci_device_t.flags to ide_pci_device_t.host_flags and IDEPCI_FLAG_ISA_PORTS flag to IDE_HFLAG_ISA_PORTS. * Add IDE_HFLAG_SINGLE flag for single channel devices. * Convert core code and all IDE PCI drivers to use IDE_HFLAG_SINGLE and remove no longer needed ide_pci_device_t.channels field. v2: * Fix issues noticed by Sergei: - correct code alignment in scc_pata.c - s/IDE_HFLAG_SINGLE/~IDE_HFLAG_SINGLE/ in serverworks.c Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: Stop mapping ROMsAlan Cox2007-07-19
| | | | | | | | | | | | | Various old IDE drivers go mapping ROM devices for no apparent reason and without using the ROM mapping API we now have. They don't actually use the ROM they map and the new libata drivers are happy without it being mapped so rather than port them lets just junk it for the next -rc1. Signed-off-by: Alan Cox <alan@redhat.com> Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* PCI: Change all drivers to use pci_device->revisionAuke Kok2007-07-11
| | | | | | | | | | | | | | | | | | | | Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Dave Jones <davej@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* ide: add short cables supportBartlomiej Zolnierkiewicz2007-07-09
| | | | | | | | | | | | | | | | | | | | | | This patch allows users to override both host and device side cable detection with "ideX=ata66" kernel parameter. Thanks to this it should be now possible to use UDMA > 2 modes on systems (laptops mainly) which use short 40-pin cable instead of 80-pin one. Next patches add automatic detection of some systems using short cables. Changes: * Rename hwif->udma_four to hwif->cbl and make it u8. * Convert all existing users accordingly (use ATA_CBL_* defines while at it). * Add ATA_CBL_PATA40_SHORT support to ide-iops.c:eighty_ninty_three(). * Use ATA_CBL_PATA40_SHORT for "ideX=ata66" kernel parameter. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Reviewed-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
* hpt366: simplify UltraDMA filtering (take 4)Sergei Shtylyov2007-07-09
| | | | | | | | | | | | | | | | | | Simplify UltraDMA mode filtering in the driver: - make use of the newly introduced 'udma_mask' field of 'ide_pci_device_t' to set the correct hwif->ultra_mask, modifying init_setup_hpt366() to select the correct mask based on the chip revision; - replace 'max_mode' field of the 'struct hpt_info' with 'max_ultra' specifying the maximum UltraDMA mode allowed; - rewrite hpt3xx_udma_filter() to differ the filters based on the 'chip_type' field, and only use it for HPT366 and HPT370[A] where it's really necessary. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: make void and rename ide_dma_timeout() methodSergei Shtylyov2007-07-09
| | | | | | | | | | | | | | | Since ide_dma_timeout() method's result is discarded, make it return 'void'. While at it, drop 'ide_' from the method's name, drop the '__' prefix from the default method's name, and do some cleanups in this method driver-wise: - in ide-dma.c, au1xxx-ide.c, and pdc202xx_old.c, define/use 'hwif' variable; - in au1xxx-ide.c, get rid of commented out printk(); - in sl82c105.c, get rid of unnecessary variables. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: make void and rename ide_dma_lostirq() methodSergei Shtylyov2007-07-09
| | | | | | | | | | | | | | | | Since ide_dma_lostirq() method's result is discarded, make it return 'void'. While at it, rename the method to dma_lost_irq(), drop the '__' prefix from the default method's name, and do some cleanups in this method driver-wise: - in aec62xx.c, rename the method in accordance with other drivers, and get rid of unnecessary variables there; - in pdc202xx_old.c, define/use 'hwif' variable; - in sgiioc4.c, rearrange the code to call the resetproc() method directly. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: use correct enablebits for HPT36xSergei Shtylyov2007-07-03
| | | | | | | | | | | | The HPT36x chips finally turned out to have the channel enable bits -- however, badly implemented. Make use of them despite it's probably only going to burden the driver's code -- assuming both channels are always enabled by the HighPoint BIOS anyway... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Acked-by: Linas Vepstas <linas@austin.ibm.com> Cc: michal.kepien@poczta.onet.pl Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: blacklist MAXTOR STM3320620A for UltraDMA/66Sergei Shtylyov2007-07-03
| | | | | | | | | Add the MAXTOR STM3320620A drive into the UltraDMA/66 mode blacklist for the HPT36x chips. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Acked-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: disallow Ultra133 for HPT374Sergei Shtylyov2007-06-08
| | | | | | | | | Eliminate UltraATA/133 support for HPT374 -- the chip isn't capable of this mode according to the manual, and doesn't even seem to tolerate 66 MHz DPLL clock... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Geller Sandor <wildy@petra.hos.u-szeged.hu> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: add ide_tune_dma() helperBartlomiej Zolnierkiewicz2007-05-09
| | | | | | | | | | After reworking the code responsible for selecting the best DMA transfer mode it is now possible to add generic ide_tune_dma() helper. Convert some IDE PCI host drivers to use it (the ones left need more work). Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: rework the code for selecting the best DMA transfer mode (v3)Bartlomiej Zolnierkiewicz2007-05-09
| | | | | | | | | | | | | | | | | | | | | | | | | Depends on the "ide: fix UDMA/MWDMA/SWDMA masks" patch. * add ide_hwif_t.udma_filter hook for filtering UDMA mask (use it in alim15x3, hpt366, siimage and serverworks drivers) * add ide_max_dma_mode() for finding best DMA mode for the device (loosely based on some older libata-core.c code) * convert ide_dma_speed() users to use ide_max_dma_mode() * make ide_rate_filter() take "ide_drive_t *drive" as an argument instead of "u8 mode" and teach it to how to use UDMA mask to do filtering * use ide_rate_filter() in hpt366 driver * remove no longer needed ide_dma_speed() and *_ratemask() * unexport eighty_ninty_three() v2: * rename ->filter_udma_mask to ->udma_filter [ Suggested by Sergei Shtylyov <sshtylyov@ru.mvista.com>. ] v3: * updated for scc_pata driver (fixes XFER_UDMA_6 filtering for user-space originated transfer mode change requests when 100MHz clock is used) Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: don't check enablebits for HPT36xSergei Shtylyov2007-05-05
| | | | | | | | | HPT36x chip don't seem to have the channel enable bits, so prevent the IDE core from checking them... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Michal Kepien <michal.kepien@poczta.onet.pl> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: fix kernel oops with HPT302NSergei Shtylyov2007-04-20
| | | | | | | | | | The driver crashes the kernel on HPT302N chips due to the missing initializer for 'hpt302n.settings' having been unfortunately overlooked so far. :-< Much thanks to Mike Mattie for pin-pointing the reason of crash. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: add ide_set_dma() helper (v2)Bartlomiej Zolnierkiewicz2007-02-16
| | | | | | | | | | | | | | * add ide_set_dma() helper and make ide_hwif_t.ide_dma_check return -1 when DMA needs to be disabled (== need to call ->ide_dma_off_quietly) 0 when DMA needs to be enabled (== need to call ->ide_dma_on) 1 when DMA setting shouldn't be changed * fix IDE code to use ide_set_dma() instead if using ->ide_dma_check directly v2: * updated for scc_pata Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: disable DMA in ->ide_dma_check for "no IORDY" case (v2)Bartlomiej Zolnierkiewicz2007-02-16
| | | | | | | | | | If DMA is unsupported ->ide_dma_check should disable DMA. v2: * updated for scc_pata Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: use PIO/MMIO operations directly where possible (v2)Bartlomiej Zolnierkiewicz2007-02-16
| | | | | | | | | | | This results in smaller/faster/simpler code and allows future optimizations. Also remove no longer needed ide[_mm]_{inl,outl}() and ide_hwif_t.{INL,OUTL}. v2: * updated for scc_pata Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: add ide_use_fast_pio() helper (v3)Bartlomiej Zolnierkiewicz2007-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * add ide_use_fast_pio() helper for use by host drivers * add DMA capability and hwif->autodma checks to ide_use_dma() - au1xxx-ide/it8213/it821x drivers didn't check for (id->capability & 1) [ for the IT8211/2 in SMART mode this check shouldn't be made but since in it821x_fixups() we set DMA bit explicitly: if(strstr(id->model, "Integrated Technology Express")) { /* In raid mode the ident block is slightly buggy We need to set the bits so that the IDE layer knows LBA28. LBA48 and DMA ar valid */ id->capability |= 3; /* LBA28, DMA */ we are better off using generic helper if we can ] - ide-cris driver didn't set ->autodma [ before the patch hwif->autodma was only checked in the chipset specific hwif->ide_dma_check implementations, for ide-cris it is cris_dma_check() function so there no behavior change here ] v2: * updated patch description (thanks to Alan Cox for the feedback) v3: * updated for scc_pata driver Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: remove redundant check from init_dma_hpt366()Bartlomiej Zolnierkiewicz2007-02-16
| | | | | | | | ->init_dma() cannot be called with dmabase == 0 (see drivers/ide/setup-pci.c) Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: HPT36x PCI clock detection fixSergei Shtylyov2007-02-07
| | | | | | | | | | | | | | | | | | | Fix minor coding mistake in the HPT36x PCI clock detection code noticed by Bartlomiej Zolnierkiewicz -- it always reported 33 MHz due to the missing 'break' statements. This, however, most probably never mattered -- in fact, I was thinking of removing the 25/40 MHz cases completely since HPT36x BIOSes didn't seem to set any other value than 7 into the 'cmd_high_time' field, i.e. supported only 33 MHz PCI. Note that in the original driver there was another bug: 25 and 40 MHz cases were interchanged. Since the 'cmd_high_time' field is in units of PCI clocks, a lower clock count just *cannot* correspond to a higher frequency, i. e. it should be 5 for 25 MHz PCI and 9 for 40 MHz PCI, not the other way around. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: init code rewriteSergei Shtylyov2007-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Finally, rework the driver init. code to correctly handle all the chip variants HighPoint has created so far. This should cure the rest of the timing issues in the driver (especially, on 66 MHz PCI) caused by the HighPoint's habit of switching the base DPLL clock with every new revision of the chips... - switch to using the enumeration type to differ between the numerous chip variants, matching PCI device/revision ID with the chip type early, at the init_setup stage; - extend the hpt_info structure to hold the DPLL and PCI clock frequencies, stop duplicating it for each channel by storing the pointer in the pci_dev structure: first, at the init_setup stage, point it to a static "template" with only the chip type and its specific base DPLL frequency, the highest supported DMA mode, and the chip settings table pointer filled, then, at the init_chipset stage, allocate per-chip instance and fill it with the rest of the necessary information; - get rid of the constant thresholds in the HPT37x PCI clock detection code, switch to calculating PCI clock frequency based on the chip's base DPLL frequency; - switch to using the DPLL clock and enable UltraATA/133 mode by default on anything newer than HPT370/A; - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(), unify the HPT36x/37x setup code and the speedproc handlers by joining the register setting lists into the table indexed by the clock selected; - add enablebits for all the chips to avoid touching disabled channels (though the HighPoint BIOS seem to only disable the primary one on HPT371/N); - separate the UltraDMA and MWDMA masks there to avoid changing PIO timings when setting an UltraDMA mode in hpt37x_tune_chipset(). This version has been tested on HPT370/302/371N. Thanks to Alan for the inspiration. Hopefully, his libata driver will also benefit from the work done on this "obsolete" driver... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: clean up DMA timeout handling for HPT370Sergei Shtylyov2007-02-07
| | | | | | | | | | | | | | | | | | | | Clean up DMA timeout handling for HPT370: - hpt370_lostirq_timeout() cleared the DMA status which made __ide_dma_end() called afterwards return the incorrect result, and the DMA engine was reset both before and after stopping DMA while the HighPoint drivers only do it after (which seems logical) -- fix this and also rename the function; - get rid of the needless mutual recursion in hpt370_ide_dma_end() and hpt370_ide_dma_timeout(); - get rid of hpt370_lostirq_timeout() since hwif->ide_dma_end() called from the driver's interrupt handler later does all its work. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: merge HPT37x speedproc handlersSergei Shtylyov2007-02-07
| | | | | | | | | | | | | | | | | | | | | | | Continue with the driver rewrite: - move the interrupt twiddling code from the speedproc handlers into the init_hwif_hpt366 which allows to merge the two HPT37x speedproc handlers into one; - get rid of in init_hpt366 which solely consists of the duplicate code, then fold init_hpt37x() into init_chipset_hpt366(); - fix hpt3xx_tune_drive() to always set the PIO mode requested, not the best possible one, change hpt366_config_drive_xfer_rate() accordingly, simplify it a bit; - group all the DMA related code together init_hwif_hpt366(), and generally clean up and beautify it. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: cache channel's MCR addressSergei Shtylyov2007-02-07
| | | | | | | | | | | | | | | | | | | | | Begin the real driver redesign. For the starters: - cache the offset of the IDE channel's MISC. control registers which are used throughout the driver in hwif->select_data; - only touch the relevant MCR when detecting the cable type on HPT374's function 1; - make HPT36x's speedproc handler look the same way as HPT37x ones; fix the PIO timing register mask for HPT37x. - rename all the HPT3xx register related variables consistently; clean up the whitespace. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: switch to using pci_get_slotSergei Shtylyov2007-02-07
| | | | | | | | | | | Switch to using pci_get_slot() to get to the function 1 of HPT36x/374 chips -- there's no need for the driver itself to walk the list of the PCI devices, and it also forgets to check the bus number of the device found. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: print the real chip name at startupSergei Shtylyov2007-02-07
| | | | | | | | | | | | | | | | - Rework the driver setup code so that it prefixes the driver startup messages with the real chip name. - Print the measured f_CNT value and the DPLL setting for non-HPT3xx chips as well. - Claim the extra 240 bytes of I/O space for all chips, not only for those having PCI device ID of 0x0004. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: rework rate filtering tidyAndrew Morton2007-02-07
| | | | | | | Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* hpt366: rework rate filteringSergei Shtylyov2007-02-07
| | | | | | | | | | | | | | | | | | | | | | | - Rework hpt3xx_ratemask() and hpt3xx_ratefilter() so that the former returns the max. mode computed at the load time and doesn't have to do bad Ultra33 drive list lookups anymore; remove the duplicate code from the latter function. Move the quirky drive list lookup into hpt3xx_quirkproc() where it should have been from the start... - Disable UltraATA/100 for HPT370 by default as the 33 MHz ATA clock being used does not allow for it, and this *greatly* increases the transfer speed. - Save some space by using byte-wide fields in struct hpt_info; switch to reading the 8-bit PCI revision ID reg. only, not the whole 32-bit reg. - Start incrementing the driver version number with each patch (should have been done from the first one posted). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* ide: add missing __init tags to IDE PCI host driversBartlomiej Zolnierkiewicz2007-01-27
| | | | | | also change __devinit tag for sgiioc4.c:ioc4_ide_init() to __init Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* [PATCH] HPT37x: read f_CNT saved by BIOS from portSergei Shtylyov2006-12-13
| | | | | | | | | | | | | The undocumented register BIOS uses for saving f_CNT seems to only be mapped to I/O space while all the other HPT3xx regs are dual-mapped. Looks like another HighPoint's dirty trick. With this patch, the deadly kernel oops on the cards having the modern HighPoint BIOSes is now at last gone! Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ide: HPT3xx: fix PCI clock detectionSergei Shtylyov2006-12-13
| | | | | | | | | | | | Use the f_CNT value saved by the HighPoint BIOS if available as reading it directly would give us a wrong PCI frequency after DPLL has already been calibrated by BIOS. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ide: fix the case of multiple HPT3xx chips presentSergei Shtylyov2006-12-13
| | | | | | | | | | | | init_chipset_hpt366() modifies some fields of the ide_pci_device_t structure depending on the chip's revision, so pass it a copy of the structure to avoid issues when multiple different chips are present. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ide: fix HPT3xx hotswap supportSergei Shtylyov2006-12-13
| | | | | | | | | | | | | | | | | Fix the broken hotswap code: on HPT37x it caused RESET- to glitch when tristating the bus (the MISC control 3/6 and soft control 2 need to be written to in the certain order), and for HPT36x the obsolete HDIO_TRISTATE_HWIF ioctl() handler was called instead which treated the state argument wrong. Also, get rid of the soft control reg. 1 wtite to enable IDE interrupt -- this is done in init_hpt37x() already... Have been tested on HPT370 and 371N. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ide: optimize HPT37x timing tablesSergei Shtylyov2006-12-13
| | | | | | | | | | | | | | | | | Save some space on the timing tables by introducing the separate transfer mode table in which the mode lookup is done to get the index into the timing table itself. Get rid of the rest of the obsolete/duplicate tables and use one set of tables for the whole HPT37x chip family like the HighPoint open-source drivers do. Documnent the different timing register layout for the HPT36x chip family (this is my guesswork based on the timing values). Have been tested and works fine on HPT370/302/371N. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ide: fix HPT37x timing tablesSergei Shtylyov2006-12-13
| | | | | | | | | | | | | | | | | | | Fix/remove bad/unused timing tables: HPT370/A 66 MHz tables weren't really needed (the chips are not UltraATA/133 capable and shouldn't support 66 MHz PCI) and had many modes over- and underclocked, HPT372 33 MHz table was in fact for 66 MHz and 50 MHz table missed UltraDMA mode 6, HPT374 33 MHz table was really for 50 MHz... (Actually, HPT370/A 33 MHz tables also have issues. e.g. HPT370 has PIO modes 0/1 overlocked.) There's also no need in the separate HPT374 tables because HPT372 timings should be the same (and those tables has UltraDMA mode 6 which HPT374 supports depending on HPT374_ALLOW_ATA133_6 #define)... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ide: HPT3xxN clocking fixesSergei Shtylyov2006-12-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix serious problems with the HPT372N clock turnaround code: - the wrong ports were written to when called for the secondary channel; - it didn't serialize access to the channels; - turnaround shou;dn't be done on 66 MHz PCI; - caching the clock mode per-channel caused it to get out of sync with the actual register value. Additionally, avoid calibrating PLL twice (for each channel) as the second try results in a wrong PCI frequency and thus in the wrong timings. Make the driver deal with HPT302N and HPT371N correctly -- the clocking and (seemingly) a need for clock tunaround is the same as for HPT372N. HPT371/N chips have only one, secondary channel, so avoid touching their "pure virtual" primary channel, and disable it if the BIOS haven't done this already. Also, while at it, disable UltraATA/133 for HPT372 by default -- 50 MHz DPLL clock don't allow for this speed anyway. And remove the traces of the former bad patch that wasn't even applicable to this version of driver. Has been tested on HPT370/371N, unfortunately I don't have an instant access to the other chips... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Remove obsolete #include <linux/config.h>Jörn Engel2006-06-30
| | | | | Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* [PATCH] RocketPoint 1520 [hpt366] fails clock stabilizationLoren M. Lang2006-02-03
| | | | | | | | | | | | | | | | I just purchased a HighPoint Rocket 1520 SATA controller. There seems to be no libata driver (yet), but there is an ide driver, hpt366. When the driver gets loaded, it causes a kernel NULL pointer dereference in pci_bus_clock_list. It seems to be because the driver is waiting for clock stabilization in init_hpt37x() which never comes. The driver just continues on with the pci drvdata set to NULL, instead of a valid clock entry. The following patch prevents the NULL dereference from happening, but instead exit with an error. Acked-by: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ide: kmalloc + memset -> kzalloc conversionDeepak Saxena2005-11-07
| | | | | | Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* hpt366: write the full 4 bytes of ROM address, not just low 1 byteLinus Torvalds2005-09-11
| | | | | | | | | This is one heck of a confused driver. It uses a byte write to a dword register to enable a ROM resource that it doesn't even seem to be using. "Lost and wandering in the desert of confusion" Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ide: fix the HPT366 driver layerAlan Cox2005-06-27
| | | | | | | | | | | | | | The highpoint driver is unreadable, buggy and crashes on some chipsets. The -ac one is more readable (but not ideal) and doesn't crash all over the place. Been in Fedora for some time. Backported from the Fedora one to the old Bartlomiej IDE core. No other dependencies. Signed-off-by: Alan Cox <alan@redhat.com> Acked-by: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-16
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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