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| * drm/i915: Fix channel ending action for DP aux transactionZhenyu Wang2009-07-29
| | | | | | | | | | | | | | | | | | | | | | We should use current channel 'status' bits to clear DP aux channel's done and error bits, instead of using the channel setting bits, that will set send/busy bit again to initiate new transaction. This also includes also some minor cleanup. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: fix issue in display pipe setup on IGDNGZhenyu Wang2009-07-29
| | | | | | | | | | | | | | | | | | | | | | During pipe DPMS off, instead of busy waiting pipe off, insert delays during wait and don't loop after enough tries which matches spec requirement. Also try to match DPMS on path by disable FDI TX PLL in DPMS off. Disable PF by writing PF_WIN_SZ which really trigger the update. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: disable VGA plane reliablyZhenyu Wang2009-07-29
| | | | | | | | | | | | | | | | | | This does VGA disable like DDX driver. SR01 bit 5 should be set before VGA plane disable through control register, otherwise we might get random crash and lockups. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/I915: Fix offset to DVO timings in LVDS dataZhao Yakui2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the DVO timing in LVDS data entry is obtained by using the following step: a. get the entry size for every LVDS panel data b. Get the LVDS fp entry for the preferred panel type c. get the DVO timing by using entry->dvo_timing In our driver the entry->dvo_timing is related with the size of lvds_fp_timing. For example: the size is 46. But it seems that the size of lvds_fp_timing varies on the differnt platform. In such case we will get the incorrect DVO timing entry because of the incorrect DVO offset in LVDS panel data entry. This also removes a hack on new IGDNG to get proper DVO timing. Calculate the DVO timing offset in LVDS data entry to get the DVO timing a. get the DVO timing offset in the LVDS fp data entry by using the pointer definition in LVDS data ptr b. get the LVDS data entry c. get the DVO timing by adding the DVO timing offset to data entry https://bugs.freedesktop.org/show_bug.cgi?id=22787 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Tested-by: Zhenyu Wang <zhenyuw@linux.intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: hdmi detection according by reading edidling.ma@intel.com2009-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | According to investigations from windows team ,hw team, and our test results on all 4x platofrms available (gm45, g45b, q45, g45a, g45c, g41a, and g41), we find currently Hot plug live status and Hot plug interrupt detection are not reliable, sometime the results from the two approaches are contradicts. So we chose edid detection for hdmi output. Signed-off-by: Ma Ling <ling.ma@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: correct self-refresh calculation in "everything off" caseJesse Barnes2009-07-16
| | | | | | | | | | | | | | | | | | | | | | If no planes are enabled, the self-refresh calculation may end up doing a divide by zero. This patch should prevent that by making sure at least one of the CRTCs had a valid hdisplay value. Reported-by: Eric Anholt <eric@anholt.net> Tested-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: handle FIFO oversubsription correctlyJesse Barnes2009-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | If you're pushing a plane hard (i.e. you need most or all of the FIFO entries just to cover your frame refresh latency), the watermark level may end up being negative. So fix up the signed vs. unsigned math in the calculation function to handle this correctly, giving all available FIFO entries to such a configuration. Reported-by: Eric Anholt <eric@anholt.net> Tested-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: FIFO watermark calculation fixesJesse Barnes2009-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I discovered several bugs in the FIFO code that was recently applied. Some of them fell into the "how did this ever work" category, since in some cases we were using the wrong FIFO size values, and the calculations ended up being way off. This patch fixes all the bugs I found, and works well on my GM45, 915GM and 855GM test machines; but as usual with these sorts of patches broader testing is definitely requested (in particular this patch affects 830, 845 and 865 for which I don't have test hardware). Overall, the patch clarifies the watermark calculation function by adding some comments and debug info, and making the variable names a bit clearer. The "get FIFO size" portion of the code has also been corrected, so we should be able to properly detect the FIFO allocations for each pipe, for use in the watermark calculation. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: ignore lvds on AOpen Mini PC MP-915Tormod Volden2009-07-13
| | | | | | | | | | | | | | | | | | This motherboard thinks it has an LVDS connected, so without this patch the screen goes blank on the connected VGA monitor. More information (for the non-KMS case) in fd.o bug #18004. Signed-off-by: Tormod Volden <debian.tormod@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Allow frame buffers up to 4096x4096 on 915/945 class hardwareKeith Packard2009-07-13
| | | | | | | | | | | | | | | | | | | | | | | | The 915 and 945 scanout engines can handle frame buffers up to 4096 pixels wide. Pre-9xx hardware has an 8192 byte stride limit, and so we leave the existing 2048 max in place. I'm not sure why we limit the height to the same value; there's no intrinsic hardware limit in the scanout engine. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: refactor error detection & collectionJesse Barnes2009-07-13
| | | | | | | | | | | | | | | | | | | | | | | | This patch refactors the existing error detection and collection code, placing most of it in i915_handle_error(). Additionally, we introduce a work queue for scheduling post-crash tasks such as generating a uevent. Using the uevent facility, userspace should be able to capture a post-mortem dump for diagnostics. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Set lvds dual channel according to register from vbiosFlorian Mickler2009-07-13
| | | | | | | | | | | | | | | | | | | | | | | | Vbios will set lvds register correctly based on current algorithm for lingle/dual Channel LVDS when system boot, so we can accept this configuration directly, regardless of LVDS enable status. It fixed freedesktop.org bug #22262 Signed-off-by: Florian Mickler <florian@mickler.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/radeon/kms: setup MC/VRAM the same way for suspend/resumeDave Airlie2009-08-07
| | | | | | | | | | | | | | we should align the GTT after VRAM no matter what, as we can come back from resume and put in a different place and bad things happen. Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: Fix caching mode selection for GTT objectJerome Glisse2009-08-06
| | | | | | | | | | | | | | | | | | GTT object can either be cached,uncached or wc just let core ttm pick the best mode according to how the bo driver and GTT memory type was initialized. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon: Add support for RS880 chipsAlex Deucher2009-08-04
| | | | | | | | | | | | | | These are new AMD IGP chips Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/ttm: Read buffer overflowRoel Kluin2009-08-03
| | | | | | | | | | | | | | Check whether index is within bounds before grabbing the element. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon: Read buffer overflowRoel Kluin2009-08-03
| | | | | | | | | | | | | | Check whether index is within bounds before grabbing the element. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/ttm: Fix a sync object leak.Thomas Hellstrom2009-08-03
| | | | | | | | | | | | | | | | If there are multiple simultaneous waiters for the same buffer object, a temporary reference to its sync object may be leaked. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: fix memory leak in radeon_driver_load_kmsXiaotian Feng2009-08-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes following kmemleak report: unreferenced object 0xffff88022cb53000 (size 4096): comm "work_for_cpu", pid 97, jiffies 4294672345 backtrace: [<ffffffff810eb222>] create_object+0x19f/0x2a0 [<ffffffff810eb422>] kmemleak_alloc+0x26/0x4c [<ffffffff810e363f>] __kmalloc+0x187/0x1b0 [<ffffffffa005f3db>] kzalloc.clone.0+0x13/0x15 [radeon] [<ffffffffa005f403>] radeon_driver_load_kms+0x26/0xe1 [radeon] [<ffffffffa0017432>] drm_get_dev+0x37f/0x480 [drm] [<ffffffffa007f424>] radeon_pci_probe+0x15/0x269 [radeon] [<ffffffff811f8779>] local_pci_probe+0x17/0x1b [<ffffffff8105ffbb>] do_work_for_cpu+0x18/0x2a [<ffffffff81063c38>] kthread+0x8a/0x92 [<ffffffff81012cba>] child_rip+0xa/0x20 [<ffffffffffffffff>] 0xffffffffffffffff Signed-off-by: Xiaotian Feng <dfeng@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: fix nomodeset.Dave Airlie2009-08-03
| | | | | | | | | | | | The ordering was wrong to get the nomodeset parameter to work. Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/ttm: Fix a potential comparison of structs.Thomas Hellstrom2009-08-03
| | | | | | | | | | | | | | | | | | On some architectures the comparison may cause a compilation failure. Original partial fix Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Pekka Paalanen <pq@iki.fi> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: fix rv515 VRAM initialisation.Dave Airlie2009-08-03
| | | | | | | | | | | | This got missed in the VRAM init re-workings. Signed-of-by: Dave Airlie <airlied@redhat.com>
* | drm: Catch stop possible NULL pointer referenceJakob Bornecrantz2009-08-03
| | | | | | | | | | | | | | | | | | This was caught by Weiss. Also added some comments to the fb_changed and mode_changed variables to explain what they do. Signed-off-by: Jakob Bornecrantz <jakob@vmware.com> Tested-by: Thomas White <taw@bitwiz.org.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm: Small logic fix in drm_mode_setcrtcJakob Bornecrantz2009-08-03
| | | | | | | | | | | | | | Match the logic to the comments in the debug message Signed-off-by: Jakob Bornecrantz <jakob@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'drm-radeon-kms' of ↵Linus Torvalds2009-07-29
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-radeon-kms' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (35 commits) drm/radeon: set fb aperture sizes for framebuffer handoff. drm/ttm: fix highuser vs dma32 confusion. drm/radeon: Fix size used for benchmarking BO copies. drm/radeon: Add radeon.test parameter for running BO GPU copy tests. drm/radeon/kms: allow interruptible waits for objects. drm/ttm: powerpc: Fix Highmem cache flushing. x86: Export kmap_atomic_prot() needed for TTM. drm/ttm: Fix ttm in-kernel copying of pages with non-standard caching attributes. drm/ttm: Fix an oops and sync object leak. drm/radeon/kms: vram sizing on certain r100 chips needs workaround. drm/radeon: Pay more attention to object placement requested by userspace. drm/radeon: Fall back to evicting BOs with memcpy if necessary. drm/radeon: Don't unreserve twice on failure to validate. drm/radeon/kms: fix bandwidth computation on avivo hardware drm/radeon/kms: add initial colortiling support. drm/radeon/kms: fix hotspot handling on pre-avivo chips drm/radeon/kms: enable frac fb divs on rs600/rs690/rs740 drm/radeon/kms: add PLL flag to prefer frequencies <= the target freq drm/radeon/kms: block RN50 from using 3D engine. drm/radeon/kms: fix VRAM sizing like DDX does it. ...
| * | drm/radeon: set fb aperture sizes for framebuffer handoff.Dave Airlie2009-07-29
| | | | | | | | | | | | | | | | | | This will allow efi/vesa to handoff to radeon. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ttm: fix highuser vs dma32 confusion.Dave Airlie2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | DMA32 and highmem are sort of exclusive. Noticed by AndrewR on #radeon. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: Fix size used for benchmarking BO copies.Michel Dänzer2009-07-29
| | | | | | | | | | | | | | | | | | | | | The incorrect size caused benchmark results to be inflated by a factor of 4. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: Add radeon.test parameter for running BO GPU copy tests.Michel Dänzer2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If enabled, during initialization BO GTT->VRAM and VRAM->GTT GPU copies are tested across the whole GTT aperture. This has helped uncover the benchmark copy size bug and verify the maximum aperture size supported by the AGP bridge in my PowerBook. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: allow interruptible waits for objects.Dave Airlie2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Blocking here isn't something the X server mouse appreciates, avoid the block and let userspace retry the waits. libdrm_radeon userspace library is also expecting EBUSY not ERESTART Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ttm: powerpc: Fix Highmem cache flushing.Thomas Hellstrom2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | Temporarily maps highmem pages while flushing to get a valid virtual address to flush. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ttm: Fix ttm in-kernel copying of pages with non-standard caching ↵Thomas Hellstrom2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | attributes. For x86 this affected highmem pages only, since they were always kmapped cache-coherent, and this is fixed using kmap_atomic_prot(). For other architectures that may not modify the linear kernel map we resort to vmap() for now, since kmap_atomic_prot() generally uses the linear kernel map for lowmem pages. This of course comes with a performance impact and should be optimized when possible. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ttm: Fix an oops and sync object leak.Thomas Hellstrom2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | The code was potentially dereferencig a NULL sync object pointer. At the same time a sync object reference was potentially leaked. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: vram sizing on certain r100 chips needs workaround.Dave Airlie2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an rn50/r100/m6/m7 GPU has < 64MB RAM, i.e. 8/16/32, the aperture used to calculate the MC_FB_LOCATION needs to be worked out from the CONFIG_APER_SIZE register, and not the actual vram size. TTM VRAM size was also being initialised wrong, use actual vram size to initialise it. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: Pay more attention to object placement requested by userspace.Michel Dänzer2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | Previously we were basically always setting the GTT and VRAM flags regardless of what userspace requested. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: Fall back to evicting BOs with memcpy if necessary.Michel Dänzer2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | Otherwise if there's no GTT space we would fail the eviction, leading to cascaded failure. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: Don't unreserve twice on failure to validate.Michel Dänzer2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | This is done later in radeon_object_list_unvalidate(). Doing it twice triggers a BUG in TTM, rendering X on KMS unusable until reboot. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: fix bandwidth computation on avivo hardwareJerome Glisse2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix bandwidth computation and crtc priority in memory controller so that crtc memory request are fullfill in time to avoid display artifact. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: add initial colortiling support.Dave Airlie2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds new set/get tiling interfaces where the pitch and macro/micro tiling enables can be set. Along with a flag to decide if this object should have a surface when mapped. The only thing we need to allocate with a mapped surface should be the frontbuffer. Note rotate scanout shouldn't require one, and back/depth shouldn't either, though mesa needs some fixes. It fixes the TTM interfaces along Thomas's suggestions, and I've tested the surface stealing code with two X servers and not seen any lockdep issues. I've stopped tiling the fbcon frontbuffer, as I don't see there being any advantage other than testing, I've left the testing commands in there, just flip the fb_tiled to true in radeon_fb.c Open: Can we integrate endian swapping in with this? Future features: texture tiling - need to relocate texture registers TXOFFSET* with tiling info. This also merges Michel's cleanup surfaces regs at init time patch even though it makes sense on its own, this patch really relies on it. Some PowerMac firmwares set up a tiling surface at the beginning of VRAM which messes us up otherwise. that patch is: Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: fix hotspot handling on pre-avivo chipsAlex Deucher2009-07-15
| | | | | | | | | | | | | | | | | | | | | Need to adjust CUR_OFFSET for yorigin Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: enable frac fb divs on rs600/rs690/rs740Alex Deucher2009-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows us to hit dot clocks much closer, especially on chips with non-27 Mhz reference clocks like most IGP chips. This fixes most flickering and blanking problems with non-exact dot clocks on these chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: add PLL flag to prefer frequencies <= the target freqAlex Deucher2009-07-15
| | | | | | | | | | | | | | | | | | | | | | | | This is needed when using fractional feedback dividers on some IGP chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: block RN50 from using 3D engine.Dave Airlie2009-07-15
| | | | | | | | | | | | | | | | | | | | | | | | RN50/ES1000 is a cut-down rv100 chip used in the server market. The 3D engine on these is either not there or unverified so refuse any attempt to configure registers on it. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: fix VRAM sizing like DDX does it.Dave Airlie2009-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Doing this like the DDX seems like the most sure fire way to avoid having to reinvent it slowly and painfully. At the moment we keep getting things wrong with aper vs vram, so we know the DDX does it right. booted on PCI r100, PCIE rv370, IGP rs400. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ttm/radeon: add dma32 support.Dave Airlie2009-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | This add support for using dma32 memory on gpus that really need it. Currently IGPs are left without DMA32 but we might need to change that unless we can fix rs690. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: Endianness fixes for radeondrmfb.Michel Dänzer2009-07-15
| | | | | | | | | | | | | | | | | | | | | | | | For now handle it via r/g/b offsets and disallow 16 bpp modes on big endian machines. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: don't swap PCIEGART PTEs in VRAM.Dave Airlie2009-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | On powerpc, since we aren't using any hw swappers, this will get flipped around by default in hw. tested on a G5 + rv515. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: drop zero length CS indirect buffers.Dave Airlie2009-07-15
| | | | | | | | | | | | | | | | | | | | | If userspace sends a zero length IB, it really shouldn't have bothered so EINVAL it. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: fix vram vs aper size check.Dave Airlie2009-07-15
| | | | | | | | | | | | | | | | | | | | | Fix this to be correct like the DDX code, looks like a typo on transfer to the kernel. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: get lvds info for DIG LVTMA and UNIPHY encodersAlex Deucher2009-07-15
| | | | | | | | | | | | | | | | | | | | | | | | Noticed by Rafał Miłecki on dri-devel. On r6xx/r7xx hardware, laptop panels can be driven by KLDSCP_LVTMA or UNIPHY. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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