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| | * | drm/nv40/vpe: add support for PMPEGBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nvc0: implement support for copy enginesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nva3: implement support for copy engineBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: remove remnants of nouveau_pgraph_engineBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: fix suspend failure path to reinitialise all enginesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: remove remnants of nouveau_pgraph_engine from nouveau_channelBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nouveau_wait_for_idle() call should hopefully not have been actually necessary, we *do* wait for the channel to go idle already. If it's an issue somehow, the chipset-specific hooks can wait for idle themselves before taking the lock. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: move set_tile_region to nouveau_exec_engineBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the very least VPE (PMPEG and friends) also has this style of tile region regs, lets make them just work if/when they get added. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nv04/gr: move to exec engine interfacesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | Like nv10-nv50, needs cleanup. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nv10/gr: move to exec engine interfacesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | Like nv20-nv50, needs cleanup. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nv20-nv30/gr: move to exec engine interfaceBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | A bit of cleanup done along the way, but, like nv40/nv50, needs more. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nv40/gr: move to exec engine interfacesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | Like nv50, this needs a good cleanup. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nvc0/gr: move to exec engine interfacesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Much nicer to do that nv50, the code was pretty much written to expect such a change in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nv50/gr: move to exec engine interfacesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This needs a massive cleanup, but to catch bugs from the interface changes vs the engine code cleanup, this will be done later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: working towards a common way to represent enginesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's lots of more-or-less independant engines present on NVIDIA GPUs these days, and we generally want to perform the same operations on them. Implementing new ones requires hooking into lots of different places, the aim of this work is to make this simpler and cleaner. NV84:NV98 PCRYPT moved over as a test. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: remove some unused members from dev_privBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: move engine object creation into per-engine hooksBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: use static vidshift of 2 on volt 0x30 tablesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Explanation is in the commit. If anyone has an example of where this is *not* the case, please report it! Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: improve memtiming table parsingRoy Spliet2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Improves the parsing of the memory timing table on NV50-NV98revA1 chipsets. Added stepping to drm_nouveau_private to make sure newer NV98 (105M) is zero rather than incorrect. Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nvc0: decode gpc/hubclient on vm faultBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nvc0: more vm fault reasonsBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nvc0: more vm fault enginesBen Skeggs2011-05-15
| | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | drm/nouveau: Fix missing whitespace checkpatch.pl errors.Emil Velikov2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes messages such as ERROR: space required after that ',' ERROR: spaces required around that '=' Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
| | * | drm/nouveau: Fix brace placement checkpatch.pl errors.Emil Velikov2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix 'ERROR: that open brace { should be on the previous line' Fix 'ERROR: else should follow close brace }' Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
| | * | drm/nouveau: Clean up trailing whitespace and C99-style comments.Emil Velikov2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix 'ERROR: trailing whitespace', Fix 'ERROR: do not use C99 // comments' Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
| | * | drm/nouveau: Fix indentation-related checkpatch.pl error messages.Emil Velikov2011-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix 'ERROR: code indent should use tabs where possible' Fix 'ERROR: space required before the open parenthesis (' Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
| | * | drm/nouveau: name the boot perflvl "boot"Martin Peres2011-05-15
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| * | | Merge remote branch 'keithp/drm-intel-next' of /ssd/git/drm-next into ↵Dave Airlie2011-05-15
| |\ \ \ | | |/ / | |/| / | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm-core-next * 'keithp/drm-intel-next' of /ssd/git/drm-next: (301 commits) drm/i915: split PCH clock gating init drm/i915: add Ivybridge clock gating init function drm/i915: Update the location of the ringbuffers' HWS_PGA registers for IVB. drm/i915: Add support for fence registers on Ivybridge. drm/i915: Use existing function instead of open-coding fence reg clear. drm/i915: split clock gating init into per-chipset functions drm/i915: set IBX pch type explicitly drm/i915: add Ivy Bridge PCI IDs and driver feature structs drm/i915: add PantherPoint PCH ID agp/intel: add Ivy Bridge support drm/i915: ring support for Ivy Bridge drm/i915: page flip support for Ivy Bridge drm/i915: interrupt & vblank support for Ivy Bridge drm/i915: treat Ivy Bridge watermarks like Sandy Bridge drm/i915: manual FDI training for Ivy Bridge drm/i915: add swizzle/tiling support for Ivy Bridge drm/i915: Ivy Bridge has split display and pipe control drm/i915: add IS_IVYBRIDGE macro for checks drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later drm/i915: split enable/disable vblank code into chipset specific functions ...
| | * drm/i915: split PCH clock gating initJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Ibex Peak and CougarPoint already require a different setting (added here), and future chips will likely follow that precedent. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add Ivybridge clock gating init functionJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the bits have changed, including one we were setting that enables a VGA test mode, preventing pipe B from working at all. So add a new IVB specific function with the right bits. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: Update the location of the ringbuffers' HWS_PGA registers for IVB.Eric Anholt2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | They have been moved from the ringbuffer groups to their own group it looks like. Fixes GPU hangs on gnome startup. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: Add support for fence registers on Ivybridge.Eric Anholt2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The registers are the same as on Sandybridge. Fixes scrambled display in X when it does software drawing to the GTT, and scans the results out as tiled. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: Use existing function instead of open-coding fence reg clear.Eric Anholt2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | This is once less place to miss a new INTEL_INFO(dev)->gen update now. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: split clock gating init into per-chipset functionsJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | This helps contain the mess to init_display() instead. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: set IBX pch type explicitlyJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is a little less confusing than relying on the implicit zeroing of the dev_priv. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add Ivy Bridge PCI IDs and driver feature structsJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are several variants, set feature bits appropriately for both mobile and desktop parts. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add PantherPoint PCH IDJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | We can treat PantherPoint as CougarPoint as far as display goes. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: ring support for Ivy BridgeJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | Use Sandy Bridge paths in a few places. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: page flip support for Ivy BridgeJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Treat Ivy Bridge like previous chips as far as flip submission is concerned. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: interrupt & vblank support for Ivy BridgeJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | Add new interrupt handling functions for Ivy Bridge. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: treat Ivy Bridge watermarks like Sandy BridgeJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | Not fully tested. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: manual FDI training for Ivy BridgeJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | A0 stepping chips need to use manual training, but the bits have all moved. So fix things up so we can at least train FDI for VGA links. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add swizzle/tiling support for Ivy BridgeJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | Treat it like Ironlake and Sandy Bridge. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: Ivy Bridge has split display and pipe controlJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ivy Bridge has a similar split display controller to Sandy Bridge, so use HAS_PCH_SPLIT. And gen7 also has the pipe control instruction, so use HAS_PIPE_CONTROL as well. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add IS_IVYBRIDGE macro for checksJesse Barnes2011-05-13
| | | | | | | | | | | | | | | Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add IS_GEN7 macro to cover Ivy Bridge and laterJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Note: IS_GEN* are for render related checks. Display and other checks should use IS_MOBILE, IS_$CHIPSET or test for specific features. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: split enable/disable vblank code into chipset specific functionsJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | This makes the Ironlake+ code trivial and generally simplifies things. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: split irq handling into per-chipset functionsJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the IRQ handling functions in driver load so they'll just be used directly, rather than branching over most of the code in the chipset functions. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: make FDI training a display functionJesse Barnes2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than branching in ironlake_pch_enable, add a new train_fdi function to the display function pointer struct and use it instead. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: forcewake debugfs fixBen Widawsky2011-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Forcewake needs to register itself with drm to use the remove function. The file also should be read only. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: debugfs interface for forcewake reference countBen Widawsky2011-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | forcewake is controlled by the open and close of the debugfs file. This assures that buggy applications cannot cause the GT to stay on forever. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Keith Packard <keithp@keithp.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-07 00:22:18 -0400