| Commit message (Collapse) | Author | Age |
|---|
| |
|
|
|
|
|
|
|
| |
Tegra124 supports a block-linear mode in addition to the regular pitch
linear and tiled modes. Add support for these by moving the internal
representation into a structure rather than a simple flag.
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| |
|
|
|
|
|
|
| |
The majority of the code in this driver is licensed under the GPL v2, so
relicense the rest under GPL v2 as well for consistency.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| |
|
|
|
|
|
|
| |
Implement very basic PRIME support. This currently only works with
buffers that are contiguous in memory and will refuse to import any
physically non-contiguous buffers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| |
|
|
|
|
|
| |
These buffer object operations are never used outside of the GEM
implementation so there is no use in exporting them.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| |
|
|
|
|
|
|
|
| |
The gr3d engine renders images bottom-up. Allow buffers that are used
for 3D content to be marked as such and implement support in the display
controller to present them properly.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| |
|
|
|
|
|
|
|
| |
The gr2d and gr3d engines work more efficiently on buffers with a tiled
memory layout. Allow created buffers to be marked as tiled so that the
display controller can scan them out properly.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
|
|
In order to make subsystem-wide changes easier, move the Tegra DRM
driver back into the DRM tree.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
