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* drm: radeon: fix printk format warningRandy Dunlap2012-10-15
| | | | | | | | | drivers/gpu/drm/radeon/radeon_atpx_handler.c:151:3: warning: format '%lu' expects type 'long unsigned int', but argument 2 has type 'size_t' [airlied: Alex had others fixed already, except for atpx one] Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon: fix spelling typos in debugging outputThomas Friebel2012-10-15
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: Don't destroy I2C Bus Rec in radeon_ext_tmds_enc_destroy().Egbert Eich2012-10-15
| | | | | | | | | | | | | | | | | | radeon_i2c_fini() walks thru the list of I2C bus recs rdev->i2c_bus[] to destroy each of them. radeon_ext_tmds_enc_destroy() however also has code to destroy it's associated I2C bus rec which has been obtained by radeon_i2c_lookup() and is therefore also in the i2c_bus[] list. This causes a double free resulting in a kernel panic when unloading the radeon driver. Removing destroy code from radeon_ext_tmds_enc_destroy() fixes this problem. agd5f: fix compiler warning Signed-off-by: Egbert Eich <eich@suse.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: check if pcie gen 2 is already enabled (v2)Alex Deucher2012-10-15
| | | | | | | | If so, skip enabling it to save time. v2: coding style fixes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/cayman: set VM max pfn at MC initAlex Deucher2012-10-15
| | | | | | | | | | No need to emit them at VM flush as we no longer use variable sized page tables now that we support 2 level page tables. This matches the behavior of SI (which does not support variable sized page tables). Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/radeon: separate pt alloc from lru addChristian König2012-10-15
| | | | | | | | Make it possible to allocate a persistent page table. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: don't add the IB pool to all VMs v2Christian König2012-10-15
| | | | | | | | | | We want to use VMs without the IB pool in the future. v2: also remove it from radeon_vm_finish. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: allocate page tables on demand v4Christian König2012-10-15
| | | | | | | | | | | | | | | | | | | | | | | | Based on Dmitries work, but splitting the code into page directory and page table handling makes it far more readable and (hopefully) more reliable. Allocations of page tables are made from the SA on demand, that should still work fine since all page tables are of the same size. Also using the fact that allocations from the SA are mostly continuously (except for end of buffer wraps and under very high memory pressure) to group updates send to the chipset specific code into larger chunks. v3: mostly a rewrite of Dmitries previous patch. v4: fix some typos and coding style Signed-off-by: Dmitry Cherkasov <Dmitrii.Cherkasov@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: update comments to clarify VM setup (v2)Alex Deucher2012-10-15
| | | | | | | | | | The actual set up and assignment of VM page tables is done on the fly in radeon_gart.c. v2: update vm size comments Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/radeon: allocate PPLLs from low to highAlex Deucher2012-10-15
| | | | | | | | | | The order shouldn't matter, but there have been problems reported on certain older asics. This behaves more like the original code before the PPLL allocation rework. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Markus Trippelsdorf <markus@trippelsdorf.de>
* drm/radeon: fix compilation with backlight disabledAlex Deucher2012-10-15
| | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: use %zu for formatting size_tLuca Tettamanti2012-10-15
| | | | | | | Fixes compiler warnings on 32bit. Signed-off-by: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2012-10-04
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm merge (part 1) from Dave Airlie: "So first of all my tree and uapi stuff has a conflict mess, its my fault as the nouveau stuff didn't hit -next as were trying to rebase regressions out of it before we merged. Highlights: - SH mobile modesetting driver and associated helpers - some DRM core documentation - i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write combined pte writing, ilk rc6 support, - nouveau: major driver rework into a hw core driver, makes features like SLI a lot saner to implement, - psb: add eDP/DP support for Cedarview - radeon: 2 layer page tables, async VM pte updates, better PLL selection for > 2 screens, better ACPI interactions The rest is general grab bag of fixes. So why part 1? well I have the exynos pull req which came in a bit late but was waiting for me to do something they shouldn't have and it looks fairly safe, and David Howells has some more header cleanups he'd like me to pull, that seem like a good idea, but I'd like to get this merge out of the way so -next dosen't get blocked." Tons of conflicts mostly due to silly include line changes, but mostly mindless. A few other small semantic conflicts too, noted from Dave's pre-merged branch. * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits) drm/nv98/crypt: fix fuc build with latest envyas drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering drm/nv41/vm: fix and enable use of "real" pciegart drm/nv44/vm: fix and enable use of "real" pciegart drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie drm/nouveau: store supported dma mask in vmmgr drm/nvc0/ibus: initial implementation of subdev drm/nouveau/therm: add support for fan-control modes drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules drm/nouveau/therm: calculate the pwm divisor on nv50+ drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster drm/nouveau/therm: move thermal-related functions to the therm subdev drm/nouveau/bios: parse the pwm divisor from the perf table drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices drm/nouveau/therm: rework thermal table parsing drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table drm/nouveau: fix pm initialization order drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it drm/nouveau: log channel debug/error messages from client object rather than drm client drm/nouveau: have drm debugging macros build on top of core macros ...
| * Merge branch 'drm-next-3.7' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2012-10-02
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Alex writes: "The big changes for 3.7 include: - Asynchronous VM page table updates for Cayman/SI - 2 level VM page table support. Saves memory compared to 1 level page tables. - Reworked PLL handing in the display code allows lots more combinations of monitors to work, including more than two DP displays assuming compatible clocks across shared PLLs. This also allows us to power down extra PLLs when we can share a single one across multiple displays which saves power. - Native backlight control on ATOMBIOS systems. - Improved ACPI support for interacting with the GPU. Fixes backlight control on some laptops. - Document AMD ACPI interfaces - Lots of code cleanup - Bug fixes" * 'drm-next-3.7' of git://people.freedesktop.org/~agd5f/linux: (79 commits) drm/radeon: add vm set_page() callback for SI drm/radeon: rework the vm_flush interface drm/radeon: use WRITE_DATA packets for vm flush on SI drm/radeon/pm: fix multi-head profile handling on BTC+ (v2) drm/radeon: fix radeon power state debug output drm/radeon: force MSIs on RS690 asics drm/radeon: Add MSI quirk for gateway RS690 drm/radeon: allow MIP_ADDRESS=0 for MSAA textures on Evergreen drm/radeon/kms: allow STRMOUT_BASE_UPDATE on RS780 and RS880 drm/radeon: add 2-level VM pagetables support v9 drm/radeon: refactor set_page chipset interface v5 drm/radeon: Fix scratch register leak in IB test. drm/radeon: restore backlight level on resume drm/radeon: add get_backlight_level callback drm/radeon: only adjust default clocks on NI GPUs drm/radeon: validate PPLL in crtc fixup drm/radeon: work around KMS modeset limitations in PLL allocation (v2) drm/radeon: make non-DP PPLL sharing more robust drm/radeon: store the encoder in the radeon_crtc drm/radeon: rework crtc pll setup to better support PPLL sharing ...
| | * drm/radeon: add vm set_page() callback for SIAlex Deucher2012-10-02
| | | | | | | | | | | | | | | | | | | | | Use the new WRITE_DATA packet rather than the legacy ME_WRITE packet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: rework the vm_flush interfaceAlex Deucher2012-10-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | Pass the vm and ring index rather than an IB. This allows us to use the vm_flush interface for non-IB cases in the future. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| | * drm/radeon: use WRITE_DATA packets for vm flush on SIAlex Deucher2012-10-02
| | | | | | | | | | | | | | | | | | | | | This is the preferred packet for writing data to memory or registers on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon/pm: fix multi-head profile handling on BTC+ (v2)Alex Deucher2012-10-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting on BTC, there are no longer separate states for single head and multi-head, we just use the high mclk/voltage for all states for multi-head. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=49981 v2: fix typo Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: fix radeon power state debug outputAlex Deucher2012-10-01
| | | | | | | | | | | | | | | | | | | | | Driver used to print "default" as the state type regardless of whether it is the default state. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: force MSIs on RS690 asicsAlex Deucher2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are so many quirks, lets just try and force this for all RS690s. See: https://bugs.freedesktop.org/show_bug.cgi?id=37679 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| | * drm/radeon: Add MSI quirk for gateway RS690Alex Deucher2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | Fixes another system on: https://bugs.freedesktop.org/show_bug.cgi?id=37679 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| | * drm/radeon: allow MIP_ADDRESS=0 for MSAA textures on EvergreenMarek Olšák2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIP_ADDRESS should point to the resolved FMASK for an MSAA texture. Setting MIP_ADDRESS to 0 means the FMASK pointer is invalid (the GPU won't read the memory then). The userspace has to set MIP_ADDRESS to 0 and *not* emit any relocation for it. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| | * drm/radeon/kms: allow STRMOUT_BASE_UPDATE on RS780 and RS880Marek Olšák2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | This is required to make streamout work there. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| | * drm/radeon: add 2-level VM pagetables support v9Dmitry Cherkasov2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PDE/PTE update code uses CP ring for memory writes. All page table entries are preallocated for now in alloc_pt(). It is made as whole because it's hard to divide it to several patches that compile and doesn't break anything being applied separately. Tested on cayman card. v2: rebased on top of "refactor set_page chipset interface v3", code cleanups v3: switched offsets calc macros to inline funcs where possible, remove pd_addr from radeon_vm, switched RADEON_BLOCK_SIZE define, to 9 (and PTE_COUNT to 1 << BLOCK_SIZE) v4 (ck): move "incr" documentation to previous patch, cleanup and document RADEON_VM_* constants, change commit message to our usual format, simplify patch allot by removing everything current not necessary, disable SI workaround. v5: (agd5f): Fix typo in tables_size calculation in radeon_vm_alloc_pt(). Second line should have been '+=' rather than '='. v6: fix npdes calculation. In scenario when pfns to be mapped overlap two PDE spans: +-----------+-------------+ | PDE span | PDE span | +-----------+----+--------+ | | +---------+ | pfns | +---------+ the following npdes calculation gives incorrect result: npdes = (nptes >> RADEON_VM_BLOCK_SIZE) + 1; For the case above picture it should give npdes = 2, but gives one. This patch corrects it by rounding last pfn up to 512 border, first - down to 512 border and then subtracting and dividing by 512. v7: Make npde calculation clearer, fix ndw calculation. v8: (agd5f): reserve enough for 2 full VM PTs, add some additional comments. v9: fix typo in npde calculation Signed-off-by: Dmitry Cherkasov <Dmitrii.Cherkasov@amd.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: refactor set_page chipset interface v5Christian König2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup the interface in preparation for hierarchical page tables. v2: add incr parameter to set_page for simple scattered PTs uptates added PDE-specific flags to r600_flags and radeon_drm.h removed superfluous value masking with 0xffffffff v3: removed superfluous bo_va->valid checking changed R600_PTE_VALID to R600_ENTRY_VALID to handle PDE too v4 (ck): fix indention style, rework and fix typos in commit message, add documentation for incr parameter, also use incr parameter for system pages v5 (agd5f): use upper_32_bits() and minor white space fixes Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Dmitry Cherkassov <Dmitrii.Cherkasov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: Fix scratch register leak in IB test.Michel Dänzer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Restructure the code to jump out via labels instead of directly returning early. Also make error reporting consistent across all hardware generations. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Simon Kitching <skitching@vonos.net> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: restore backlight level on resumeAlex Deucher2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Restore the backlight level on resume. Some systems need to explicitly restore the backlight level on resume. Fixes panel resume on my Trinity laptop and may fix the following bugs: https://bugs.freedesktop.org/show_bug.cgi?id=43829 https://bugzilla.kernel.org/show_bug.cgi?id=46241 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: add get_backlight_level callbackAlex Deucher2012-09-27
| | | | | | | | | | | | | | | | | | | | | Read back the backlight level from the hw. Needed for proper backlight restoration on resume. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: only adjust default clocks on NI GPUsAlex Deucher2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | SI asics store voltage information differently so we don't have a way to deal with it properly yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| | * drm/radeon: validate PPLL in crtc fixupAlex Deucher2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | This allows us to bail if we can't support the requested setup from a PPLL perspective. Prevents broken setups from being attempted. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: work around KMS modeset limitations in PLL allocation (v2)Alex Deucher2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the current KMS API sets the mode independantly on each crtc, we may end up with resource conflicts. The PLL allocation is one of those cases. In the following example we have 3 crtcs in use driving 2 DVI connectors and 1 DP connector. On the initial kernel modeset for fbdev, the display topology ends up as follows: crtc0 -> DP-0 crtc1 -> DVI-0 crtc2 -> DVI-1 Because this is the first modeset, all of the PLLs are available as none have been assigned. So we end up with the following: crtc0 uses DCPLL crtc1 uses PPLL2 crtc2 uses PPLL1 When X starts, it assigns a different topology: crtc0 -> DVI-0 crtc1 -> DP-0 crtc2 -> DVI-1 However, since the KMS API is per crtc, we set the mode on each crtc independantly. When it comes time to set the mode on crtc0, the topology for crtc1 and crtc2 are still intact. crtc1 and crtc2 are already assigned PPLL2 and PPLL1 so when it comes time to set the mode on crtc0, crtc1 and crtc2 have not been torn down yet, so there appears to be no PLLs available. In reality, we are reconfiguring the entire display topology, however, since each crtc is handled independantly, we don't know that in the driver at each crtc mode set time. This patch checks to see if the same connector is being driven by another crtc, and if so, uses the PLL already associated with it. v2: store connector in the radeon crtc struct, simplify checking. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: make non-DP PPLL sharing more robustAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | Compare the adjusted clock as well as the crtc mode clock. This handles cases where the driver adjusts the clock for specific special cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: store the encoder in the radeon_crtcAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | This saves lots of lookups later. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: rework crtc pll setup to better support PPLL sharingAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | | | | We need the calculate the pixel clock before allocating a PPLL in order to insure the clocks really match. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: allow PPLL sharing on non-DP displaysAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If several non-DP displays use the same pixel clock we can use the same PPLL for all of them. If all relevant displays have the same pixel clock, this allows the driver to: - use fewer PPLLs which saves power - support more than two non-DP displays on DCE4+ The current drm modesetting infrastructure doesn't really provide a good framework for validating combinations that work or won't work, so it's possible you could go from a working configuration to a non-working one by changing the mode a one of the displays. However, there this is better than what was there before. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon/dce3: use a single PPLL for all DP displaysAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | | | | If possible, use a single PPLL for multiple DP displays on DCE3.x. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: rework pll selection (v4)Alex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For DP we can use the same PPLL for all active DP encoders. Take advantage of that to prevent cases where we may end up sharing a PPLL between DP and non-DP which won't work. Also clean up the code a bit. v2: - fix missing pll_id assignment in crtc init v3: - fix DP PPLL check - document functions - break in main encoder search loop after matching. no need to keep checking additional encoders. v4: - same as v3, but re-apply to drm-next as the corner cases are fixed properly in subsequent patches. fixes: https://bugs.freedesktop.org/show_bug.cgi?id=54471 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: fix typo in atombios_get_encoder_modeAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | comparing the encoder mode to the encoder id for DVO. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon/atom: fix typo in SetPixelClock handlingAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | MiscInfo field should be programmed with the crtc id rather than the pll id. However, at this point the two are the same for chips with this version of the table. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: white space cleanup in transmitter setupAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | Makes it more consistent with the surrounding code. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: clean up encoder dp checksAlex Deucher2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | Use the proper struct in the union. That field has the same offset in every struct, so no functional change. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/radeon: rework the VM code a bit more (v2)Christian König2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Roughly based on how nouveau is handling it. Instead of adding the bo_va when the address is set add the bo_va when the handle is opened, but set the address to zero until userspace tells us where to place it. This fixes another bunch of problems with glamor. v2: agd5f: fix build after dropping patch 7/8. Signed-off-by: Christian König <deathsimple@vodafone.de>
| | * drm/radeon: fix gem_close_object handlingChristian König2012-09-20
| | | | | | | | | | | | | | | | | | | | | Make the reserve non interruptible. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * drm/radeon: let bo_reserve take no_intr instead of no_wait paramChristian König2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | The no_wait param isn't used anywhere, and actually isn't very usefull at all. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * drm/radeon: move and rename radeon_bo_va functionChristian König2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | It doesn't really belong into the object functions, also rename it to avoid collisions with struct radeon_bo_va. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * drm/radeon: move IB pool to 1MB offsetChristian König2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | Even GPUs can have a null pointer dereference, so move the IB pool to another offset to catch those. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * drm/radeon: fix VA overlap checkChristian König2012-09-20
| | | | | | | | | | | | | | | Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * drm/radeon: fix VA range checkChristian König2012-09-20
| | | | | | | | | | | | | | | | | | | | | The end offset is exclusive not inclusive. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * drm/radeon: fix VM syncing with multiple ringsChristian König2012-09-20
| | | | | | | | | | | | | | | | | | | | | | | | When a VM is used on more than one ring we need to sync to the last user. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
| | * drm/radeon: Remove unused functionsLauri Kasanen2012-09-20
| | | | | | | | | | | | | | | | | | | | | This applies on top of drm/radeon: Mark all possible functions / structs as static. Signed-off-by: Lauri Kasanen <cand@gmx.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 09:36:35 -0500