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path: root/drivers/gpu/drm/radeon
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* drm/radeon: add DisplayPort MST support (v2)Dave Airlie2015-03-19
| | | | | | | | | | | | | | | | This adds initial DP 1.2 MST support to radeon, on CAYMAN and up in theory. This is off by default. v2: agd5f: - add UNIPHY3 offsets - move atom cmd table code into atombios_encoders.c - whitespace cleanup - replace some magic numbers with proper defines Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: improve encoder picking functions (v2)Dave Airlie2015-03-19
| | | | | | | | | | | | | For MST we need to be able to pick front end encoders separate from backend, but only for MST, so we need to make the encoder picking interface smarter. v2: agd5f: squash in: drm/radeon: release digital encoder before asking for new one Reported-by: Dieter Nützel <Dieter@nuetzel-hh.de> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: export max link rate calculationDave Airlie2015-03-19
| | | | | | | We need this in the MST code later. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add new atombios encoder/transmitter interfacesDave Airlie2015-03-19
| | | | | | | | These allow overriding the encoder id with the frontend, we need this for setting up MST. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add some MST registersDave Airlie2015-03-19
| | | | | | | These registers will be used later to setup Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* radeon/fb: add wrapper functions around fb connector add/removeDave Airlie2015-03-19
| | | | | | | These are just two wrappers to be used in the MST code later. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* radeon/cik: add support for short HPD irqsAlex Deucher2015-03-19
| | | | | | This adds support to process short HPD irqs on CIK gpus. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* radeon/si: add support for short HPD irqsDave Airlie2015-03-19
| | | | | | | This adds support to process short HPD irqs on SI gpus. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* radeon/evergreen: add support for short HPD irqsDave Airlie2015-03-19
| | | | | | | | This adds support for processing short irqs, and triggering the dp_work. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* radeon: introduce a dp_work handlerDave Airlie2015-03-19
| | | | | | | | This is to be called on short HPD irqs, just introduce the basic infrastructure for it. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: program auxch directly (v2)Dave Airlie2015-03-19
| | | | | | | | | | | | | | | | | | | | The atombios tables have an unfortunate restriction on only being able to write 12 bytes, MST really wants 16-bytes here, and since the hw can do it, we should just write directly to it. This uses a module option to allow for it now, and maybe we should provide the old code as a fallback for a while. v2: (agd5f) - move registers to a proper register header - only enable on DCE5+ - enable by default on DCE5+ - Switch pad to aux mode before using it - reformat instance handling to better match the rest of the driver Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix doublescan modes (v2)Alex Deucher2015-03-19
| | | | | | | | | Use the correct flags for atom. v2: handle DRM_MODE_FLAG_DBLCLK Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: typo in parameter descriptionVincent Batts2015-03-19
| | | | | | | "defaul" -> "default" Signed-off-by: Vincent Batts <vbatts@hashbangbash.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add support for read reg query from radeon info ioctlAlex Deucher2015-03-19
| | | | | | | | | | This allows us to query certain registers from userspace for profiling and harvest configuration. E.g., it can be used by the GALLIUM_HUD for profiling the status of various gfx blocks. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add get_allowed_info_register for CIKAlex Deucher2015-03-19
| | | | | | | Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add get_allowed_info_register for SIAlex Deucher2015-03-19
| | | | | | | Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add get_allowed_info_register for cayman/TNAlex Deucher2015-03-19
| | | | | | | Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add get_allowed_info_register for EG/BTCAlex Deucher2015-03-19
| | | | | | | Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add get_allowed_info_register for r6xx/r7xxAlex Deucher2015-03-19
| | | | | | | Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add get_allowed_info_register function for r1xx-r5xxAlex Deucher2015-03-19
| | | | | | | Just a stub. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add new callback for info ioctl register accessorAlex Deucher2015-03-19
| | | | | | | | | | | | This adds a callback for each asic family to determine what registers are allowed to be read back via the info ioctl. The idea here is to allow usermode to query things like GPU status registers or GPU harvest registers for profiling and determining the gfx config. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add INFO query for current sclk/mclkAlex Deucher2015-03-19
| | | | | | | | Allow the UMDs to query the current sclk/mclk for profiling, etc. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/kv: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/tn: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/sumo: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/ci: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/si: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/ni: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: remove some rv7xx leftovers from btc dpm codeAlex Deucher2015-03-19
| | | | | | | Some copy paste leftovers. No functional change. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/btc: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/rv7xx/eg: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/rv6xx: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/rs780: implement get_current_sclk/mclkAlex Deucher2015-03-19
| | | | | | | Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add new callbacks to get the current sclk/mclkAlex Deucher2015-03-19
| | | | | | | Needed to to expose the current clocks via the INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add INFO query for GPU temperatureAlex Deucher2015-03-19
| | | | | | | Useful for profiling. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: dont switch vt on suspendMaarten Lankhorst2015-03-19
| | | | | | Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: setup quantization_range in AVI infoframeAlex Deucher2015-03-19
| | | | | | | | | | If the display supports selectable range, set the range based on what the user has selected for output csc. bug: https://bugs.freedesktop.org/show_bug.cgi?id=83226 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: implement output csc property for DCE5+Alex Deucher2015-03-19
| | | | | | | | | | Implement the property for DCE5+ asics. Older asics require a slightly more complex process. bug: https://bugs.freedesktop.org/show_bug.cgi?id=83226 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add an output_csc propertyAlex Deucher2015-03-19
| | | | | | | | | | | | | | | | | This adds the drm property for output csc (e.g., transform of output display colorspace). Currently only common ones (TV RGB, BT.601, BT.709) are supported, but bypass and tv rgb are really the only useful ones at the moment. Additionally we could expose a user adjustable matrix in the future. This commit just adds the property. The hw support will be added in subsequent patches. bug: https://bugs.freedesktop.org/show_bug.cgi?id=83226 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix interlaced modes on DCE8Alex Deucher2015-03-03
| | | | | | | Need to double the viewport height. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: fix DRM_IOCTL_RADEON_CS oopsTommi Rantala2015-03-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Passing zeroed drm_radeon_cs struct to DRM_IOCTL_RADEON_CS produces the following oops. Fix by always calling INIT_LIST_HEAD() to avoid the crash in list_sort(). ---------------------------------- #include <stdint.h> #include <fcntl.h> #include <unistd.h> #include <sys/ioctl.h> #include <drm/radeon_drm.h> static const struct drm_radeon_cs cs; int main(int argc, char **argv) { return ioctl(open(argv[1], O_RDWR), DRM_IOCTL_RADEON_CS, &cs); } ---------------------------------- [ttrantal@test2 ~]$ ./main /dev/dri/card0 [ 46.904650] BUG: unable to handle kernel NULL pointer dereference at (null) [ 46.905022] IP: [<ffffffff814d6df2>] list_sort+0x42/0x240 [ 46.905022] PGD 68f29067 PUD 688b5067 PMD 0 [ 46.905022] Oops: 0002 [#1] SMP [ 46.905022] CPU: 0 PID: 2413 Comm: main Not tainted 4.0.0-rc1+ #58 [ 46.905022] Hardware name: Hewlett-Packard HP Compaq dc5750 Small Form Factor/0A64h, BIOS 786E3 v02.10 01/25/2007 [ 46.905022] task: ffff880058e2bcc0 ti: ffff880058e64000 task.ti: ffff880058e64000 [ 46.905022] RIP: 0010:[<ffffffff814d6df2>] [<ffffffff814d6df2>] list_sort+0x42/0x240 [ 46.905022] RSP: 0018:ffff880058e67998 EFLAGS: 00010246 [ 46.905022] RAX: 0000000000000000 RBX: 0000000000000000 RCX: 0000000000000000 [ 46.905022] RDX: ffffffff81644410 RSI: ffff880058e67b40 RDI: ffff880058e67a58 [ 46.905022] RBP: ffff880058e67a88 R08: 0000000000000000 R09: 0000000000000000 [ 46.905022] R10: ffff880058e2bcc0 R11: ffffffff828e6ca0 R12: ffffffff81644410 [ 46.905022] R13: ffff8800694b8018 R14: 0000000000000000 R15: ffff880058e679b0 [ 46.905022] FS: 00007fdc65a65700(0000) GS:ffff88006d600000(0000) knlGS:0000000000000000 [ 46.905022] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 46.905022] CR2: 0000000000000000 CR3: 0000000058dd9000 CR4: 00000000000006f0 [ 46.905022] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 46.905022] DR3: 0000000000000000 DR6: 00000000ffff4ff0 DR7: 0000000000000400 [ 46.905022] Stack: [ 46.905022] ffff880058e67b40 ffff880058e2bcc0 ffff880058e67a78 0000000000000000 [ 46.905022] 0000000000000000 0000000000000000 0000000000000000 0000000000000000 [ 46.905022] 0000000000000000 0000000000000000 0000000000000000 0000000000000000 [ 46.905022] Call Trace: [ 46.905022] [<ffffffff81644a65>] radeon_cs_parser_fini+0x195/0x220 [ 46.905022] [<ffffffff81645069>] radeon_cs_ioctl+0xa9/0x960 [ 46.905022] [<ffffffff815e1f7c>] drm_ioctl+0x19c/0x640 [ 46.905022] [<ffffffff810f8fdd>] ? trace_hardirqs_on_caller+0xfd/0x1c0 [ 46.905022] [<ffffffff810f90ad>] ? trace_hardirqs_on+0xd/0x10 [ 46.905022] [<ffffffff8160c066>] radeon_drm_ioctl+0x46/0x80 [ 46.905022] [<ffffffff81211868>] do_vfs_ioctl+0x318/0x570 [ 46.905022] [<ffffffff81462ef6>] ? selinux_file_ioctl+0x56/0x110 [ 46.905022] [<ffffffff81211b41>] SyS_ioctl+0x81/0xa0 [ 46.905022] [<ffffffff81dc6312>] system_call_fastpath+0x12/0x17 [ 46.905022] Code: 48 89 b5 10 ff ff ff 0f 84 03 01 00 00 4c 8d bd 28 ff ff ff 31 c0 48 89 fb b9 15 00 00 00 49 89 d4 4c 89 ff f3 48 ab 48 8b 46 08 <48> c7 00 00 00 00 00 48 8b 0e 48 85 c9 0f 84 7d 00 00 00 c7 85 [ 46.905022] RIP [<ffffffff814d6df2>] list_sort+0x42/0x240 [ 46.905022] RSP <ffff880058e67998> [ 46.905022] CR2: 0000000000000000 [ 47.149253] ---[ end trace 09576b4e8b2c20b8 ]--- Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tommi Rantala <tt.rantala@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: do a posting read in cik_set_irqAlex Deucher2015-03-03
| | | | | | | | | | To make sure the writes go through the pci bridge. bug: https://bugzilla.kernel.org/show_bug.cgi?id=90741 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: do a posting read in si_set_irqAlex Deucher2015-03-03
| | | | | | | | | | To make sure the writes go through the pci bridge. bug: https://bugzilla.kernel.org/show_bug.cgi?id=90741 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: do a posting read in evergreen_set_irqAlex Deucher2015-03-03
| | | | | | | | | | To make sure the writes go through the pci bridge. bug: https://bugzilla.kernel.org/show_bug.cgi?id=90741 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: do a posting read in r600_set_irqAlex Deucher2015-03-03
| | | | | | | | | | To make sure the writes go through the pci bridge. bug: https://bugzilla.kernel.org/show_bug.cgi?id=90741 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: do a posting read in rs600_set_irqAlex Deucher2015-03-03
| | | | | | | | | | To make sure the writes go through the pci bridge. bug: https://bugzilla.kernel.org/show_bug.cgi?id=90741 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: do a posting read in r100_set_irqAlex Deucher2015-03-03
| | | | | | | | | | To make sure the writes go through the pci bridge. bug: https://bugzilla.kernel.org/show_bug.cgi?id=90741 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* radeon/audio: fix DP audio on DCE6Slava Grigorev2015-03-03
| | | | | | | | | Split DCE6 and DCE8 programming of DCCG_AUDIO_DTO1 registers to properly enable DP audio for both DCE revisions. Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* radeon/audio: fix whitespaceSlava Grigorev2015-03-03
| | | | | | | Use proper tabs. Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: adjust audio callback orderAlex Deucher2015-03-03
| | | | | | | - Move it out of the UNIPHY case to handle older DCE blocks. - set audio dpms before video dpms Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-06 07:35:11 -0500