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path: root/drivers/gpu/drm/radeon/radeon.h
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* drm/radeon/dpm: add infrastructure to properly handle bapmAlex Deucher2013-09-11
| | | | | | | | | bapm is a pm feature for sharing the power budget between the GPU and the CPU on APUs. It needs to be enabled or disabled in certain circumstances. For now, disable it when on battery and enable it when on AC power. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: fix typo in PG flagsAlex Deucher2013-09-11
| | | | | | s/CG/PG/ in the GFX powergating flag name. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add spinlocks for indirect register accesssAlex Deucher2013-09-11
| | | | | | | | | This adds spinlocks to protect access to other indirect register apertures. These indirect spaces are used pretty infrequently and we haven't had an reported problems, but better safe than sorry. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: protect concurrent smc register access with a spinlockAlex Deucher2013-09-11
| | | | | | | | smc registers are access indirectly via the main mmio aperture, so there may be problems with concurrent access. This adds a spinlock to protect access to this register space. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2013-09-01
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Alex writes: This is the radeon drm-next request. Big changes include: - support for dpm on CIK parts - support for ASPM on CIK parts - support for berlin GPUs - major ring handling cleanup - remove the old 3D blit code for bo moves in favor of CP DMA or sDMA - lots of bug fixes [airlied: fix up a bunch of conflicts from drm_order removal] * 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux: (898 commits) drm/radeon/dpm: make sure dc performance level limits are valid (CI) drm/radeon/dpm: make sure dc performance level limits are valid (BTC-SI) (v2) drm/radeon: gcc fixes for extended dpm tables drm/radeon: gcc fixes for kb/kv dpm drm/radeon: gcc fixes for ci dpm drm/radeon: gcc fixes for si dpm drm/radeon: gcc fixes for ni dpm drm/radeon: gcc fixes for trinity dpm drm/radeon: gcc fixes for sumo dpm drm/radeonn: gcc fixes for rv7xx/eg/btc dpm drm/radeon: gcc fixes for rv6xx dpm drm/radeon: gcc fixes for radeon_atombios.c drm/radeon: enable UVD interrupts on CIK drm/radeon: fix init ordering for r600+ drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabled drm/radeon: check the return value of uvd_v1_0_start in uvd_v1_0_init drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resume radeon kms: fix uninitialised hotplug work usage in r100_irq_process() drm/radeon/audio: set up the sads on DCE3.2 asics drm/radeon: fix handling of variable sized arrays for router objects ... Conflicts: drivers/gpu/drm/i915/i915_dma.c drivers/gpu/drm/i915/i915_gem_dmabuf.c drivers/gpu/drm/i915/intel_pm.c drivers/gpu/drm/radeon/cik.c drivers/gpu/drm/radeon/ni.c drivers/gpu/drm/radeon/r600.c
| * drm/radeon/si: restructure cg code (v3)Alex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | | | | | Resturcture clockgating code so that it can be enabled/disabled from other components such as dpm. v2: make function static v3: add fine grained cg controls Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add cg and pg flagsAlex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | This commits adds flags for supported clockgating and powergating features. This allows us to more easily track which features are supported on a particular asic and to enable/disable features for debugging. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add audio support for DCE6/8 GPUs (v12)Alex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to DCE4/5, but supports multiple audio pins which can be assigned per afmt block. v2: rework the driver to handle more than one audio pin. v3: try different dto reg v4: properly program dto v5 (ck): change dto programming order v6: program speaker allocation block v7: rebase v8: rebase on Rafał's changes v9: integrated Rafał's comments, update to latest drm_edid_to_speaker_allocation API v10: add missing line break in error message v11: add back audio enabled messages v12: fix copy paste typo in r600_audio_enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Rafał Miłecki <zajec5@gmail.com>
| * drm/radeon: remove special handling for the DMA ringChristian König2013-08-30
| | | | | | | | | | | | | | | | | | Now that we have callbacks for [rw]ptr handling we can remove the special handling for the DMA rings and use the callbacks instead. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: rework UVD writeback & [rw]ptr handlingChristian König2013-08-30
| | | | | | | | | | | | | | | | The hardware just doesn't support this correctly. Disable it before we accidentally write anywhere we shouldn't. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: rework ring function handlingChristian König2013-08-30
| | | | | | | | | | | | | | | | | | | | | | Give the ring functions a separate structure and let the asic structure point to the ring specific functions. This simplifies the code and allows us to make changes at only one point. No change in functionality. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: add new callback for powergating UVD (v4)Alex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting on CIK, multi-media blocks like UVD no longer have special power state. Rather they have their own DPM implementation which adjusts their clocks dynamically when active. When they are not active, the blocks are powergated to save power. v2: add missing pm locks v3: rebase on uvd state selection rework v4: fix inverted logic typo noticed by Christian Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add dpm support for CI dGPUs (v2)Alex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds dpm support for btc asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen switching Set radeon.dpm=1 to enable. v2: remove unused radeon_atombios.c changes, make missing smc ucode non-fatal Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: add vce clocks to radeon_psAlex Deucher2013-08-30
| | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add clock voltage dep tables for acp, samuAlex Deucher2013-08-30
| | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add structs to store vce clock voltage depsAlex Deucher2013-08-30
| | | | | | | | | | | | Used for vce power management. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: grab mvdd_dependency_on_mclk info from vbiosAlex Deucher2013-08-30
| | | | | | | | | | | | Required for dpm on CI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: add support for parsing the atom powertune tableAlex Deucher2013-08-30
| | | | | | | | | | | | Needed for DPM on CI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: update cac leakage table parsing for CIAlex Deucher2013-08-30
| | | | | | | | | | | | Uses a different table format if the board supports EVV. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add support for thermal controller on KB/KVAlex Deucher2013-08-30
| | | | | | | | | | | | No support for reading temperature back yet. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add structs to store uvd clock voltage depsAlex Deucher2013-08-30
| | | | | | | | | | | | Used for uvd power management. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add indirect accessors for dift registers on CIKAlex Deucher2013-08-30
| | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: implement clock and power gating for CIK (v3)Alex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | Only the APUs support power gating. v2: disable cgcg for now v3: workaround hw issue in mgcg Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: convert SI,CIK to use sumo_rlc functionsAlex Deucher2013-08-30
| | | | | | | | | | | | and remove duplicate si_rlc functions. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: rework thermal state handlingAlex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | 1. Handle the the thermal state directly in the work handler. Remove the state selection function since nothing else uses it now. 2. On some asics there is no thermal state, so we just use a regular state and force the low performance state. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/dpm: use multiple UVD power states (v3)Alex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | Use the UVD handle information to determine which which power states to select when using UVD. For example, decoding a single SD stream requires much lower clocks than multiple HD streams. v2: switch to a cleaner dpm/uvd interface v3: change the uvd power state while streams are active if need be Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: add UVD->DPM helper function (v5)Alex Deucher2013-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a helper function for counting the number of open stream handles. v2: fix copy-pasta in comments and whitespace error v3: make function static since it's only used in radeon_uvd.c at the moment v4: make non-static again for future changes v5: make static again for new rework of dpm uvd changes Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/kms: remove r6xx+ blit copy routinesAlex Deucher2013-08-30
| | | | | | | | | | | | | | No longer used now that we use the async dma engines or CP DMA for bo copies. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: fix WREG32_OR macro setting bits in a registerRafał Miłecki2013-08-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This bug (introduced in 3.10) in WREG32_OR made commit d3418eacad403033e95e49dc14afa37c2112c134 "drm/radeon/evergreen: setup HDMI before enabling it" cause a regression. Sometimes audio over HDMI wasn't working, sometimes display was corrupted. This fixes: https://bugzilla.kernel.org/show_bug.cgi?id=60687 https://bugzilla.kernel.org/show_bug.cgi?id=60709 https://bugs.freedesktop.org/show_bug.cgi?id=67767 Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/cik: use a mutex to properly lock srbm instanced registersAlex Deucher2013-08-07
| | | | | | | | | | | | | | We need proper locking in the driver when accessing instanced registers on CIK. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: only save UVD bo when we have open handlesChristian König2013-08-07
| | | | | | | | | | | | | | | | | | Otherwise just reinitialize from scratch on resume, and so make it more likely to succeed. Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/gem: create drm_gem_dumb_destroyDaniel Vetter2013-08-06
|/ | | | | | | | | | | | | | | | | | | | | All the gem based kms drivers really want the same function to destroy a dumb framebuffer backing storage object. So give it to them and roll it out in all drivers. This still leaves the option open for kms drivers which don't use GEM for backing storage, but it does decently simplify matters for gem drivers. Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org> Cc: Ben Skeggs <skeggsb@gmail.com> Reviwed-by: Rob Clark <robdclark@gmail.com> Cc: Alex Deucher <alexdeucher@gmail.com> Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon: add a module parameter to disable aspmAlex Deucher2013-07-17
| | | | | | | Can cause hangs when enabled in certain motherboards. Set radeon.aspm=0 to disable aspm. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: align VM PTBs (Page Table Blocks) to 32KAlex Deucher2013-07-15
| | | | | | | | Covers requirements of all current asics. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: allow selection of alignment in the sub-allocatorAlex Deucher2013-07-14
| | | | | | | | There are cases where we need more than 4k alignment. No functional change with this commit. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/radeon: never unpin UVD bo v3Christian König2013-07-14
| | | | | | | | | | | | | | | | Changing the UVD BOs offset on suspend/resume doesn't work because the VCPU internally keeps pointers to it. Just keep it always pinned and save the content manually. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=66425 v2: fix compiler warning v3: fix CIK support Note: a version of this patch needs to go to stable. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add checks against vblank timeAlex Deucher2013-07-08
| | | | | | | If the vblank time is too short to adjust mclk, assume multiple displays (no mclk adjustments). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add infrastructure to force performance levelsAlex Deucher2013-07-05
| | | | | | | | | | | | This allows you to force specific power levels within a power state. Due to hardware restrictions between generations, the interface is limited to the following 3 selections: auto: all levels enabled low: forced to the lowest power level high: forced to the highest power level Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add support for 3d perf states on older asicsAlex Deucher2013-07-05
| | | | | | | | | | | | | | | | | | | Certain older rv770 asics have both a performance and a 3D performance state rather than just multiple performance levels in the state power state. The current code would select the performance state rather than the 3D performance state when the "performance" profile was selected. This change switches to the "balanced" profile by default which ends up being the internal performance profile. When the user selects the "performance" profile, it selects the internal 3D performance state so the user can select the higher performance modes. For most asics this changes nothing. For certain rv770 asics with static performance and 3D performance states, this allows you to select between then using by selecting the "balanced" and "performance" dpm profiles. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add infrastructure to support debugfs infoAlex Deucher2013-07-01
| | | | | | | This lays the frameworks to report realtime power level feedback. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/ttm: make ttm reservation calls behave like reservation callsMaarten Lankhorst2013-06-27
| | | | | | | | | | | This commit converts the source of the val_seq counter to the ww_mutex api. The reservation objects are converted later, because there is still a lockdep splat in nouveau that has to resolved first. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add dpm support for SI (v7)Alex Deucher2013-06-27
| | | | | | | | | | | | | | | | | | | | | This adds dpm support for SI asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2/gen3 switching - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: enable hainan support, rebase v3: guard acpi stuff v4: fix 64 bit math v5: fix 64 bit div harder v6: fix thermal interrupt check noticed by Jerome v7: attempt fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: validate voltages against dispclk requirementsAlex Deucher2013-06-27
| | | | | | | | | Validate the voltages against the voltage requirements of the dispclk. We currently don't adjust the disp clock so it never changes, but we need to filter out voltage levels that are too low none the less. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: pull in ppm info from atomAlex Deucher2013-06-27
| | | | | | Used by SI dpm. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: pull in phase shedding limits from atomAlex Deucher2013-06-27
| | | | | | Required for dpm on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon/dpm: add an enum for pcie gen selectionAlex Deucher2013-06-27
| | | | | | | This makes it easier the understand what the code is doing. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add indirect accessors for UVD CTX registersAlex Deucher2013-06-27
| | | | | | These are needed for certain UVD power saving features. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add atom get leakage vddc functionAlex Deucher2013-06-27
| | | | | | Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: add accessors of pif_phy indirect register spaceAlex Deucher2013-06-27
| | | | | | Required for accessing certain pcie related registers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: update radeon_atom_get_voltage_table() for SIAlex Deucher2013-06-27
| | | | | | SI uses a new atom table revision. Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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