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path: root/drivers/gpu/drm/radeon/r300.c
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* drm/radeon: R300 AD only has one quad pipe.Michel Dänzer2010-04-26
| | | | | | | | | | | | | commit 57b54ea6b7863ccfeb41851b5f58f9fd1b83c79e upstream. Gleaned from the Mesa code. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=27355 . Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* drm/radeon/kms: fix r300 vram width calculationsDave Airlie2010-02-04
| | | | | | | This was incorrect according to the docs and the UMS driver does it like this. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: don't call suspend path before cleaning up GPUJerome Glisse2010-02-04
| | | | | | | | | | | | | | In suspend path we unmap the GART table while in cleaning up path we will unbind buffer and thus try to write to unmapped GART leading to oops. In order to avoid this we don't call the suspend path in cleanup path. Cleanup path is clever enough to desactive GPU like the suspend path is doing, thus this was redondant. Tested on: RV370, R420, RV515, RV570, RV610, RV770 (all PCIE) Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Make sure we release AGP device if we acquired itJerome Glisse2010-01-07
| | | | | | | | | In some case we weren't releasing the AGP device at module unloading. This leaded to unfunctional AGP at next module load. This patch make sure we release the AGP bus if we acquire it. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Schedule host path read cache flush through the ring V2Jerome Glisse2010-01-07
| | | | | | | | | | | | | | | | | R300 family will hard lockup if host path read cache flush is done through MMIO to HOST_PATH_CNTL. But scheduling same flush through ring seems harmless. This patch remove the hdp_flush callback and add a flush after each fence emission which means a flush after each IB schedule. Thus we should have same behavior without the hard lockup. Tested on R100,R200,R300,R400,R500,R600,R700 family. V2: Adjust fence counts in r600_blit_prepare_copy() Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add 3DC compression supportMarek Olšák2009-12-22
| | | | | | | | There are 2 formats: ATI1N: 64 bits per 4x4 block, one-channel format ATI2N: 128 bits per 4x4 block, two-channel format Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: allow rendering while no colorbuffer is set on r300Marek Olšák2009-12-22
| | | | | | | | | | Because hardware cannot disable all colorbuffers directly to do depth-only rendering, a user should: - disable reading from a colorbuffer in blending - disable fastfill - set the color channel mask to 0 to prevent writing to a colorbuffer Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: fix r100->r500 CS checker for compressed textures. (v2)Dave Airlie2009-12-16
| | | | | | | | | | | | | This adds support for compressed textures to the r100->r500 CS checker, it lets me run openarena and the demos in mesa fine. Thanks to Maciej Cencora for initial comments. Changes since v1: fix calculations with Maciej formulas Reviewed-by: Maciej Cencora <m.cencora@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: allow for texture tilingMaciej Cencora2009-12-16
| | | | | | | This adds the relocations for texture tiling for KMS. Signed-off-by: Maciej Cencora <m.cencora@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: init pm on all chipsetsRafał Miłecki2009-12-16
| | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: restore surface registers on resume.Dave Airlie2009-12-10
| | | | | | | | | | | On resume on my rv530 laptop surface cntl was left disabled, so wierd stuff would happen with rendering to a tiled front buffer. This checks if the surface regs are assigned to bos and reprograms the surface registers on resume using the same path that clears them all on init. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms/legacy: set common regs to sane valueAlex Deucher2009-12-07
| | | | | | | The DDX and radeonfb always set these regs to a sane value. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Rework radeon object handlingJerome Glisse2009-12-01
| | | | | | | | | | | | | | | The locking & protection of radeon object was somewhat messy. This patch completely rework it to now use ttm reserve as a protection for the radeon object structure member. It also shrink down the various radeon object structure by removing field which were redondant with the ttm information. Last it converts few simple functions to inline which should with performances. airlied: rebase on top of r600 and other changes. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add irq mitigation code for sw interrupt.Dave Airlie2009-12-01
| | | | | | | | | We really don't need to process every irq that comes in, we only really want to do SW irq processing when we are actually waiting for a fence to pass. I'm not 100% sure this is race free esp on non-MSI systems so it needs some testing. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: ignore unposted GPUs with no BIOS.Dave Airlie2009-12-01
| | | | | | | If we find a GPU but we can't find its BIOS and it isn't posted, then ignore it. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: AGP systems need PCI bus mastering enabledDave Airlie2009-12-01
| | | | | | | | | | We might not hit this yet, but when if we do any sort of writeback we really need to enable PCI bus mastering on these systems from what I can see. This enables PCI BM on all radeons that require it. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: use RADEON_GPU_PAGE_SIZE instead of 4096Matt Turner2009-10-15
| | | | | Signed-off-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Remove old init path as no hw use it anymoreJerome Glisse2009-10-01
| | | | | | | | | This remove old init path and allow code cleanup, now all hw use the new init path, see top of radeon.h for description of this. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Convert R300 to new init pathJerome Glisse2009-10-01
| | | | | | | Also cleanup register specific to R300. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: Convert RS400/RS480 to new init path & fix legacy VGA (V3)Jerome Glisse2009-10-01
| | | | | | | | | | | | | | | | Also cleanup register specific to RS400/RS480. This patch also fix legacy VGA register used to disable VGA access we were programming wrong register. Now we should properly disable VGA on r100 up to rs400 asics. Note that RS400/RS480 resume is broken, it hangs the computer while reprogramming dynamic clock, doesn't work either without that patch. We need to spend more time investigating this issue. Version 2 of the patch remove dead code that was left commented out in the previous version. Version 3 correct the placement on IGP of the VRAM inside GPU address space to match the stollen RAM placement of IGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: don't require up to 64k allocations. (v2)Dave Airlie2009-09-24
| | | | | | | | | | | | | | | | | | This avoids needing to do a kmalloc > PAGE_SIZE for the main indirect buffer chunk, it adds an accessor for all reads from the chunk and caches a single page at a time for subsequent reads. changes since v1: Use a two page pool which should be the most common case a single packet spanning > PAGE_SIZE will be hit, but I'm having trouble seeing anywhere we currently generate anything like that. hopefully proper short page copying at end added parser_error flag to set deep errors instead of having to test every ib value fetch. fixed bug in patch that went to list. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: clear confusion in GART init/deinit pathJerome Glisse2009-09-14
| | | | | | | | | | | | | | | | GART static one time initialization was mixed up with GART enabling/disabling which could happen several time for instance during suspend/resume cycles. This patch splits all GART handling into 4 differents function. gart_init is for one time initialization, gart_deinit is called upon module unload to free resources allocated by gart_init, gart_enable enable the GART and is intented to be call after first initialization and at each resume cycle or reset cycle. Finaly gart_disable stop the GART and is intended to be call at suspend time or when unloading the module. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: cleanup - remove radeon_share.hJerome Glisse2009-09-14
| | | | | | | | | | radeon_share.h was begining to give problem with include order in respect of radeon.h. It's easier and also i think cleaner to move what was in radeon_share.h into radeon.h. At the same time use the extern keyword for function shared accross the module. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: convert r4xx to new init pathJerome Glisse2009-09-14
| | | | | | | This convert r4xx to new init path it also fix few bugs. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: R3XX/R4XX AGP asic use PCI GART not PCIE GARTJerome Glisse2009-09-10
| | | | | | | | | R3XX/R4XX AGP asic use the old PCI GART block, not the new PCIE GART. Make sure we pick the right GART when disabling AGP. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Acked-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add r600 KMS supportJerome Glisse2009-09-07
| | | | | | | | | | | | | | | | | | | | This adds the r600 KMS + CS support to the Linux kernel. The r600 TTM support is quite basic and still needs more work esp around using interrupts, but the polled fencing should work okay for now. Also currently TTM is using memcpy to do VRAM moves, the code is here to use a 3D blit to do this, but isn't fully debugged yet. Authors: Alex Deucher <alexdeucher@gmail.com> Dave Airlie <airlied@redhat.com> Jerome Glisse <jglisse@redhat.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add rn50/r100/r200 CS tracker.Dave Airlie2009-09-07
| | | | | | | | | | This adds the command stream checker for the RN50, R100 and R200 cards. It stops any access to 3D registers on RN50, and does checks on buffer sizes on the r100/r200 cards. It also fixes some texture sizing checks on r300. Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge intel drm-intel-next branchDave Airlie2009-09-07
|\ | | | | | | | | | | | | | | | | Merge remote branch 'anholt/drm-intel-next' of ../anholt-2.6 into drm-next Conflicts: drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_drv.h drivers/gpu/drm/i915/intel_sdvo.c
| * drm/radeon: add GET_PARAM/INFO support for Z pipesAlex Deucher2009-08-21
| | | | | | | | | | | | | | Needed for occlusion queries on rv530 chips. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/radeon/kms: generate the safe register tables.Dave Airlie2009-08-21
|/ | | | | | | | | | Previously we just made these offline and included them, but no reason we can't generate them at build time. TODO: add rs690 + r100/r200 when done. should we do rs480/rs690 no tcl version? Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: cut down indirects in register accesses.Dave Airlie2009-08-15
| | | | | | | | We really don't want to be doing all these indirects, updating the GPU gart table is something we do often so the less overhead the better. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add rv530 R300_SU_REG_DEST + reloc for ZPASS_ADDRDave Airlie2009-08-15
| | | | | | These are needed for Occulsion Query support. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: fix bandwidth computation on avivo hardwareJerome Glisse2009-07-29
| | | | | | | | | Fix bandwidth computation and crtc priority in memory controller so that crtc memory request are fullfill in time to avoid display artifact. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: add initial colortiling support.Dave Airlie2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds new set/get tiling interfaces where the pitch and macro/micro tiling enables can be set. Along with a flag to decide if this object should have a surface when mapped. The only thing we need to allocate with a mapped surface should be the frontbuffer. Note rotate scanout shouldn't require one, and back/depth shouldn't either, though mesa needs some fixes. It fixes the TTM interfaces along Thomas's suggestions, and I've tested the surface stealing code with two X servers and not seen any lockdep issues. I've stopped tiling the fbcon frontbuffer, as I don't see there being any advantage other than testing, I've left the testing commands in there, just flip the fb_tiled to true in radeon_fb.c Open: Can we integrate endian swapping in with this? Future features: texture tiling - need to relocate texture registers TXOFFSET* with tiling info. This also merges Michel's cleanup surfaces regs at init time patch even though it makes sense on its own, this patch really relies on it. Some PowerMac firmwares set up a tiling surface at the beginning of VRAM which messes us up otherwise. that patch is: Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: fix VRAM sizing like DDX does it.Dave Airlie2009-07-15
| | | | | | | | | | Doing this like the DDX seems like the most sure fire way to avoid having to reinvent it slowly and painfully. At the moment we keep getting things wrong with aper vs vram, so we know the DDX does it right. booted on PCI r100, PCIE rv370, IGP rs400. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: don't swap PCIEGART PTEs in VRAM.Dave Airlie2009-07-15
| | | | | | | | | On powerpc, since we aren't using any hw swappers, this will get flipped around by default in hw. tested on a G5 + rv515. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon: fix support for vline relocations.Dave Airlie2009-07-15
| | | | | | | | | | | | Userspace sends us a special relocation type to sync video/exa to vlines to avoid tearing, this deals with the relocation in the kernel, it picks the correct crtc and avoids issues where crtcs are disabled. This version also parses the wait until to make sure it isn't trying to do anything evil. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: fix some GART table entry bugs.Dave Airlie2009-07-15
| | | | | | | | 1. rv370 can accept 40-bit addresses - also at 24-bit shift not 4 bits 2. rs480 table can be in 40-bit space. - 4 bit shift for top 8 bits 3. rs480 table entries can be in 40-bit space. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon: command stream checker for r3xx-r5xx hardwareJerome Glisse2009-06-18
| | | | | | | | | | | | | | | | | | | | | | For security purpose we want to make sure the userspace process doesn't access memory beyond buffer it owns. To achieve this we need to check states the userspace program. For color buffer and zbuffer we check that the clipping register will discard access beyond buffers set as color or zbuffer. For vertex buffer we check that no vertex fetch will happen beyond buffer end. For texture we check various texture states (number of mipmap level, texture size, texture depth, ...) to compute the amount of memory the texture fetcher might access. The command stream checking impact the performances so far quick benchmark shows an average of 3% decrease in fps of various applications. It can be optimized a bit more by caching result of checking and thus avoid a full recheck if no states changed since last check. Note that this patch is still incomplete on checking side as it doesn't check 2d rendering states. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon: introduce kernel modesetting for radeon hardwareJerome Glisse2009-06-14
Add kernel modesetting support to radeon driver, use the ttm memory manager to manage memory and DRM/GEM to provide userspace API. In order to avoid backward compatibility issue and to allow clean design and code the radeon kernel modesetting use different code path than old radeon/drm driver. When kernel modesetting is enabled the IOCTL of radeon/drm driver are considered as invalid and an error message is printed in the log and they return failure. KMS enabled userspace will use new API to talk with the radeon/drm driver. The new API provide functions to create/destroy/share/mmap buffer object which are then managed by the kernel memory manager (here TTM). In order to submit command to the GPU the userspace provide a buffer holding the command stream, along this buffer userspace have to provide a list of buffer object used by the command stream. The kernel radeon driver will then place buffer in GPU accessible memory and will update command stream to reflect the position of the different buffers. The kernel will also perform security check on command stream provided by the user, we want to catch and forbid any illegal use of the GPU such as DMA into random system memory or into memory not owned by the process supplying the command stream. This part of the code is still incomplete and this why we propose that patch as a staging driver addition, future security might forbid current experimental userspace to run. This code support the following hardware : R1XX,R2XX,R3XX,R4XX,R5XX (radeon up to X1950). Works is underway to provide support for R6XX, R7XX and newer hardware (radeon from HD2XXX to HD4XXX). Authors: Jerome Glisse <jglisse@redhat.com> Dave Airlie <airlied@redhat.com> Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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