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| | * drm/i915: fix tiling on IGDNGZhenyu Wang2009-09-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It seems that on IGDNG the same swizzling setup always applys. And front buffer tiling needs to set address swizzle in display arb control too. Fix plane tricle feed setting in v1 which should be disable bit, and always setup address swizzle to let hardware care for buffer tiling in all cases. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: modeset: always set intel_crtc->dpms_mode by moving the assignment up.Daniel Vetter2009-09-04
| | | | | | | | | | | | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: remove open-coded drm_mode_object_findDaniel Vetter2009-09-04
| | | | | | | | | | | | | | | | | | | | | | | | And clean up a small whitespace goof-up in the same function, while I was looking at it. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Make the downclocking debug code be under DRM_DEBUG not DRM_ERROR.Eric Anholt2009-09-04
| | | | | | | | | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| | * drm/i915: i915_modeset is signedKyle McMartin2009-09-04
| | | | | | | | | | | | | | | Signed-off-by: Kyle McMartin <kyle@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: add dynamic clock frequency controlJesse Barnes2009-09-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several sources of unnecessary power consumption on Intel graphics systems. The first is the LVDS clock. TFTs don't suffer from persistence issues like CRTs, and so we can reduce the LVDS refresh rate when the screen is idle. It will be automatically upclocked when userspace triggers graphical activity. Beyond that, we can enable memory self refresh. This allows the memory to go into a lower power state when the graphics are idle. Finally, we can drop some clocks on the gpu itself. All of these things can be reenabled between frames when GPU activity is triggered, and so there should be no user visible graphical changes. Signed-off-by: Jesse Barnes <jesse.barnes@intel.com> Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Support IGD EOSShaohua Li2009-09-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the event that any one of the DAC analog outputs (R,G,B) were driven at full-scale (white video) or some analog level close to full-scale voltage, and if the video cable were then disconnected, the analog video voltage level would exceed the maximum electrical overstress limit of the native (thin-oxide) transistors thus causing a long-term reliability concern. The electrical overstress condition occurs in this particular case. This patch address the IGD EOS (electrical overstress condition) issue. When the EOS interrupt occurs, OS should disable DAC and then disable EOS, then the normal hotplug operation follows. TODO: it appears the normal unplug interrupt is missed as reported by Li Peng, need more checks here. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Enable PAL and SECAM format and add the propery for SDVO-TVZhao Yakui2009-09-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently SDVO TV only support NTSC-M format. In this patch we introduce PAL and SECAM formats available and create seting-format property at init time. When user dynamically chose preferred format by xrandr command, it will refine all modelines provided by SDVO device, then instruct SDVO device to execute. At the same time the property is added for SDVO-TV so that the SDVO-TV mode can be changed by using xrandr. https://bugs.freedesktop.org/show_bug.cgi?id=22891 Signed-off-by: Ma Ling <ling.ma@intel.com> review-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: select TV format according to connector typeMa Ling2009-09-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For integrated TV there are 3 connector types: S-VIDEO, Composite and Component(YprPb). Those tv formats whose component flag is true should be assigned to Component connector, others are for S-VIDEO and Composite. The patch intends to find appropriate tv format for each connector. In such case it will return the correct modeline to user space. Otherwise it will return the incorrect modeline when S-video/composite is connected. Signed-off-by: Ma Ling <ling.ma@intel.com> reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: update debugfs interrupt info on IGDNGZhenyu Wang2009-09-04
| | | | | | | | | | | | | | | Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Add i915 register dumping debugfs fileBen Gamari2009-09-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a debugfs file to dump the entire register range. Here we assume that reading write-only/reserved registers won't make the chip angry. Seems to hold true, thankfully. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Move i915_gem_debugfs.c to i915_debugfs.cBen Gamari2009-09-04
| | | | | | | | | | | | | | | | | | Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> [anholt: hand-applied for conflicts] Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm: fix two issues with fb consolidation.Dave Airlie2009-08-30
| | | | | | | | | | | | | | | | | | | | | | | | Set accel to none, we really don't want anyone thinking fb is an accel interface. Pass pitch not depth to function for intel. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/kms: move driver specific fb common code to helper functions (v2)Dave Airlie2009-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initially I always meant this code to be shared, but things ran away from me before I got to it. This refactors the i915 and radeon kms fbdev interaction layers out into generic helpers + driver specific pieces. It moves all the panic/sysrq enhancements to the core file, and stores a linked list of kernel fbs. This could possibly be improved to only store the fb which has fbcon on it for panics etc. radeon retains some specific codes used for a big endian workaround. changes: fix oops in v1 fix freeing path for crtc_info Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm: GEM handles are u32, not intPekka Paalanen2009-08-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several functions in the GEM kernel API used int as handle type, but user API has it __u32 which is also the intended type. Replace int with u32. Signed-off-by: Pekka Paalanen <pq@iki.fi> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | Merge Linus master to drm-nextDave Airlie2009-08-19
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | linux-next conflict reported needed resolution. Conflicts: drivers/gpu/drm/drm_crtc.c drivers/gpu/drm/drm_edid.c drivers/gpu/drm/i915/intel_sdvo.c drivers/gpu/drm/radeon/radeon_ttm.c drivers/gpu/drm/ttm/ttm_bo.c
| * | | drm: clarify scaling property namesJesse Barnes2009-08-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we're using the scaling property in the Intel driver I noticed that the names were a bit confusing. I've corrected them according to our discussion on IRC and the mailing list, though I've left out potential new additions for a new scaling property with an integer (or two) for the scaling factor. None of the drivers implement that today, but if someone wants to do it, I think it could be done with the addition of a single new type and a new property to describe the scaling factor in the X and Y directions. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Acked-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | | drm: Remove the unused prefix in DRM_DEBUG_KMS/DRIVER/MODEZhao Yakui2009-08-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We will have to add a prefix when using the macro defintion of DRM_DEBUG_KMS /DRM_DEBUG_DRIVER/MODE. It is not convenient. We should use the DRM_NAME as default prefix. So remove the prefix in the macro definition of DRM_DEBUG_KMS/DRIVER/MODE. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | | i915: disable interrupts before tearing down GEM stateLinus Torvalds2009-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reinette Chatre reports a frozen system (with blinking keyboard LEDs) when switching from graphics mode to the text console, or when suspending (which does the same thing). With netconsole, the oops turned out to be BUG: unable to handle kernel NULL pointer dereference at 0000000000000084 IP: [<ffffffffa03ecaab>] i915_driver_irq_handler+0x26b/0xd20 [i915] and it's due to the i915_gem.c code doing drm_irq_uninstall() after having done i915_gem_idle(). And the i915_gem_idle() path will do i915_gem_idle() -> i915_gem_cleanup_ringbuffer() -> i915_gem_cleanup_hws() -> dev_priv->hw_status_page = NULL; but if an i915 interrupt comes in after this stage, it may want to access that hw_status_page, and gets the above NULL pointer dereference. And since the NULL pointer dereference happens from within an interrupt, and with the screen still in graphics mode, the common end result is simply a silently hung machine. Fix it by simply uninstalling the irq handler before idling rather than after. Fixes http://bugzilla.kernel.org/show_bug.cgi?id=13819 Reported-and-tested-by: Reinette Chatre <reinette.chatre@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | drm/i915: fix mask bits settingZhenyu Wang2009-09-08
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eDP is exclusive connector too, and add missing crtc_mask setting for TV. This fixes http://bugzilla.kernel.org/show_bug.cgi?id=14139 Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Reported-and-tested-by: Carlos R. Mafra <crmafra2@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | drm/i915: Unref old_obj on get_fence_reg() error pathChris Wilson2009-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remember to release the local reference if we fail to wait on the rendering. (Also whilst in the vicinity add some whitespace so that the phasing of the operations is clearer.) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
* | | drm/i915: increase default latency constant (v2 w/comment)Jesse Barnes2009-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some i915/i945 platforms have a fairly high memory latency in certain situations, so increase our constant a bit to avoid FIFO underruns. The effect should be positive on other platforms as well; we'll have a bit more insurance against a busy memory subsystem due to the extra FIFO entries. Fixes fdo bug #23368. Needed for 2.6.31. Tested-by: Sven Arvidsson <sa@whiz.se> Tested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | | drm/i915: Improve CRTDDC mapping by using VBT infoDavid Müller (ELSOFT AG)2009-08-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use VBT information to determine which DDC bus to use for CRTDCC. Fall back to GPIOA if VBT info is not available. Signed-off-by: David Müller <d.mueller@elsoft.ch> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net> Tested on: 855 (David), and 945GM, 965GM, GM45, and G45 (anholt)
* | | drm/i915: Fix CPU-spinning hangs related to fence usage by using an LRU.Eric Anholt2009-08-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lack of a proper LRU was partially worked around by taking the fence from the object containing the oldest seqno. But if there are multiple objects inactive, then they don't have seqnos and the first fence reg among them would be chosen. If you were trying to copy data between two mappings, this could result in each page fault stealing the fence from the other argument, and your application hanging. https://bugs.freedesktop.org/show_bug.cgi?id=23566 https://bugs.freedesktop.org/show_bug.cgi?id=23220 https://bugs.freedesktop.org/show_bug.cgi?id=23253 https://bugs.freedesktop.org/show_bug.cgi?id=23366 Cc: Stable Team <stable@kernel.org> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
* | | drm/i915: Set crtc/clone mask in different output devicesMa Ling2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Bspec each encoder has different sharing pipe property, i.e. Integrated or SDVO TV both will occupy one pipe exclusively, and sdvo-non-tv and crt are allowed to share one. The patch moves sharing judgment into differnet output functions, and sets the right clone bit. This fixes both HDMI outputs choosing the same pipe. https://bugs.freedesktop.org/show_bug.cgi?id=22247 Signed-off-by: Ma Ling <ling.ma@intel.com> Reviewed-by : Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | | drm/i915: Always use SDVO_B detect bit for SDVO output detection.Ma Ling2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the following commit is shipped, the SDVO C detection will depend on the SDVO_C/DP detion bit. commit 13520b051e8888dd3af9bda639d83e7df76613d1 Author: Kristian Høgsberg <krh@redhat.com> Date: Fri Mar 13 15:42:14 2009 -0400 drm/i915: Read the right SDVO register when detecting SVDO/HDMI. According to the spec we should continue to detect the SDVO_B/C based on the SDVO_B detection bit. The new detection bit on G4X platform is for the HDMI_C detection rather than SDVO_C detection. https://bugs.freedesktop.org/show_bug.cgi?id=20639 Signed-off-by: Ma Ling <ling.ma@intel.com> Acked-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | | drm/i915: Fix typo that broke SVID1 in intel_sdvo_multifunc_encoder()Roel Kluin2009-08-24
| | | | | | | | | | | | | | | | | | | | | Bit SDVO_OUTPUT_SVID0 was tested twice Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | | drm/i915: Check if BIOS enabled dual-channel LVDS on 8xx, not only on 9xxBruno Prémont2009-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 0c2e39525b3b53a97a0202c5f35058147e53977e is not sufficient to get fd.o bug #20115 fixed. In addition intel_find_best_PLL() must not only rely on BIOS settings for i9xx chips but also for i8xx, so drop the IS_I9XX() check. Signed-off-by: Bruno Prémont <bonbons@linux-vserver.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | | drm/i915: Set the multiplier for SDVO on G33 platformSean Young2009-08-24
| |/ |/| | | | | | | | | | | | | | | http://bugs.freedesktop.org/show_bug.cgi?id=21417 Signed-off-by: Sean Young <sean@mess.org> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: silence vblank warningsFrans Pop2009-08-08
| | | | | | | | | | | | | | these errors are pretty pointless Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/i915: Fix read outside array bounds in restoring the SWF10 range.Roel Kluin2009-08-05
| | | | | | | | | | | | | | | | dev_priv->saveSWF1 is a 16 element array, but this reads up to index 22, and restored values from the wrong registers. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Use our own workqueue to avoid wedging the system along with the GPU.Eric Anholt2009-08-05
| | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Add support for dual-channel LVDS on 8xx.ling.ma@intel.com2009-07-30
| | | | | | | | | | | | | | This corresponds to a fix to UMS back in 2007. Fixes fd.o bug #20115. Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Return disconnected for SDVO DVI when there's no digital EDID.ling.ma@intel.com2009-07-30
| | | | | | | | | | | | | | | | | | The patch fixed a bug on MP965-D. When VGA is connected to a DVI-I connector, it incorrectly shows sdvo dvi as connected. Signed-off-by: Ma Ling <ling.ma@intel.com> [anholt: hand-resolved against previous commit and fixed up commit message] Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Choose real sdvo output according to result from detectionling.ma@intel.com2009-07-29
| | | | | | | | | | | | | | | | | | | | Baed on Eric's idea in order to handle multiple sdvo encoders we implement another approach to dynamically chose real one encoder after detection, which is contrasted with patch - drm/i915:Construct all possible sdvo outputs for sdvo encoder. Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Set preferred mode for integrated TV according to TV formatling.ma@intel.com2009-07-29
| | | | | | | | | | | | | | | | | | In order to get best possible quality image we chose 640x480 for NTSC, PAL and 480p, 1280x720 for 720p, 1920x1080 for 1080i/p TV format respectively. Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: fix 845G FIFO size & burst lengthJesse Barnes2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I had one report of flicker due to FIFO underruns on 845G. Scott was kind enough to test a few patches and report success with this one. Looks like 845G measures FIFO size slightly differently than other chips, and we were also clobbering the FIFO burst length. Fixing both of those issues gives him a healthy machine again. Note that we still only adjust plane A's watermark in the 830/845 case. If someone is willing to test we could support a bigger variety of dual-head 830/845 configurations with a bit more code. Fixes fdo bug #19304 (again). Reported-by: Scott Hansen <scottandchrystie@comcast.net> Tested-by: Scott Hansen <scottandchrystie@comcast.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: fix VGA detect on IGDNGZhenyu Wang2009-07-29
| | | | | | | | | | | | | | | | | | Check FORCE_DETECT bit to be clear for the finish of hotplug detect process. Also check possible mono monitor which should also be marked as connected. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Add eDP support on IGDNG mobile chipZhenyu Wang2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds embedded DisplayPort support on next mobile chip which aims to replace origin LVDS port. VBT's driver feature block has been used to determine the type of current internal panel for eDP or LVDS. Currently no panel fitting support for eDP and backlight control would be added in future. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: enable DisplayPort support on IGDNGZhenyu Wang2009-07-29
| | | | | | | | | | Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Fix channel ending action for DP aux transactionZhenyu Wang2009-07-29
| | | | | | | | | | | | | | | | | | | | | | We should use current channel 'status' bits to clear DP aux channel's done and error bits, instead of using the channel setting bits, that will set send/busy bit again to initiate new transaction. This also includes also some minor cleanup. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: fix issue in display pipe setup on IGDNGZhenyu Wang2009-07-29
| | | | | | | | | | | | | | | | | | | | | | During pipe DPMS off, instead of busy waiting pipe off, insert delays during wait and don't loop after enough tries which matches spec requirement. Also try to match DPMS on path by disable FDI TX PLL in DPMS off. Disable PF by writing PF_WIN_SZ which really trigger the update. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: disable VGA plane reliablyZhenyu Wang2009-07-29
| | | | | | | | | | | | | | | | | | This does VGA disable like DDX driver. SR01 bit 5 should be set before VGA plane disable through control register, otherwise we might get random crash and lockups. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/I915: Fix offset to DVO timings in LVDS dataZhao Yakui2009-07-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the DVO timing in LVDS data entry is obtained by using the following step: a. get the entry size for every LVDS panel data b. Get the LVDS fp entry for the preferred panel type c. get the DVO timing by using entry->dvo_timing In our driver the entry->dvo_timing is related with the size of lvds_fp_timing. For example: the size is 46. But it seems that the size of lvds_fp_timing varies on the differnt platform. In such case we will get the incorrect DVO timing entry because of the incorrect DVO offset in LVDS panel data entry. This also removes a hack on new IGDNG to get proper DVO timing. Calculate the DVO timing offset in LVDS data entry to get the DVO timing a. get the DVO timing offset in the LVDS fp data entry by using the pointer definition in LVDS data ptr b. get the LVDS data entry c. get the DVO timing by adding the DVO timing offset to data entry https://bugs.freedesktop.org/show_bug.cgi?id=22787 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Tested-by: Zhenyu Wang <zhenyuw@linux.intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: hdmi detection according by reading edidling.ma@intel.com2009-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | According to investigations from windows team ,hw team, and our test results on all 4x platofrms available (gm45, g45b, q45, g45a, g45c, g41a, and g41), we find currently Hot plug live status and Hot plug interrupt detection are not reliable, sometime the results from the two approaches are contradicts. So we chose edid detection for hdmi output. Signed-off-by: Ma Ling <ling.ma@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: correct self-refresh calculation in "everything off" caseJesse Barnes2009-07-16
| | | | | | | | | | | | | | | | | | | | | | If no planes are enabled, the self-refresh calculation may end up doing a divide by zero. This patch should prevent that by making sure at least one of the CRTCs had a valid hdisplay value. Reported-by: Eric Anholt <eric@anholt.net> Tested-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: handle FIFO oversubsription correctlyJesse Barnes2009-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | If you're pushing a plane hard (i.e. you need most or all of the FIFO entries just to cover your frame refresh latency), the watermark level may end up being negative. So fix up the signed vs. unsigned math in the calculation function to handle this correctly, giving all available FIFO entries to such a configuration. Reported-by: Eric Anholt <eric@anholt.net> Tested-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: FIFO watermark calculation fixesJesse Barnes2009-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I discovered several bugs in the FIFO code that was recently applied. Some of them fell into the "how did this ever work" category, since in some cases we were using the wrong FIFO size values, and the calculations ended up being way off. This patch fixes all the bugs I found, and works well on my GM45, 915GM and 855GM test machines; but as usual with these sorts of patches broader testing is definitely requested (in particular this patch affects 830, 845 and 865 for which I don't have test hardware). Overall, the patch clarifies the watermark calculation function by adding some comments and debug info, and making the variable names a bit clearer. The "get FIFO size" portion of the code has also been corrected, so we should be able to properly detect the FIFO allocations for each pipe, for use in the watermark calculation. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: ignore lvds on AOpen Mini PC MP-915Tormod Volden2009-07-13
| | | | | | | | | | | | | | | | | | This motherboard thinks it has an LVDS connected, so without this patch the screen goes blank on the connected VGA monitor. More information (for the non-KMS case) in fd.o bug #18004. Signed-off-by: Tormod Volden <debian.tormod@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Allow frame buffers up to 4096x4096 on 915/945 class hardwareKeith Packard2009-07-13
| | | | | | | | | | | | | | | | | | | | | | | | The 915 and 945 scanout engines can handle frame buffers up to 4096 pixels wide. Pre-9xx hardware has an 8192 byte stride limit, and so we leave the existing 2048 max in place. I'm not sure why we limit the height to the same value; there's no intrinsic hardware limit in the scanout engine. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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