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| * | gpio/davinci: fix oops on unbanked gpio irq requestSekhar Nori2012-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unbanked GPIO irq setup code was overwriting chip_data leading to the following oops on request_irq() Unable to handle kernel paging request at virtual address febfffff pgd = c22dc000 [febfffff] *pgd=00000000 Internal error: Oops: 801 [#1] PREEMPT Modules linked in: mcu(+) edmak irqk cmemk CPU: 0 Not tainted (3.0.0-rc7+ #93) PC is at irq_gc_mask_set_bit+0x68/0x7c LR is at vprintk+0x22c/0x484 pc : [<c0080c0c>] lr : [<c00457e0>] psr: 60000093 sp : c33e3ba0 ip : c33e3af0 fp : c33e3bc4 r10: c04555bc r9 : c33d4340 r8 : 60000013 r7 : 0000002d r6 : c04555bc r5 : fec67010 r4 : 00000000 r3 : c04734c8 r2 : fec00000 r1 : ffffffff r0 : 00000026 Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user Control: 0005317f Table: 822dc000 DAC: 00000015 Process modprobe (pid: 526, stack limit = 0xc33e2270) Stack: (0xc33e3ba0 to 0xc33e4000) 3ba0: 00000000 c007d3d4 c33e3bcc c04555bc c04555bc c33d4340 c33e3bdc c33e3bc8 3bc0: c007f5f8 c0080bb4 00000000 c04555bc c33e3bf4 c33e3be0 c007f654 c007f5c0 3be0: 00000000 c04555bc c33e3c24 c33e3bf8 c007e6e8 c007f618 c01f2284 c0350af8 3c00: c0405214 bf016c98 00000001 00000000 c33dc008 0000002d c33e3c54 c33e3c28 3c20: c007e888 c007e408 00000001 c23ef880 c33dc000 00000000 c33dc080 c25caa00 3c40: c0487498 bf017078 c33e3c94 c33e3c58 bf016b44 c007e7d4 bf017078 c33dc008 3c60: c25caa08 c33dc008 c33e3c84 bf017484 c25caa00 c25caa00 c01f5f48 c25caa08 3c80: c0496d60 bf017484 c33e3ca4 c33e3c98 c022a698 bf01692c c33e3cd4 c33e3ca8 3ca0: c01f5d88 c022a688 00000000 bf017484 c25caa00 c25caa00 c01f5f48 c25caa08 3cc0: c0496d60 00000000 c33e3cec c33e3cd8 c01f5f8c c01f5d10 00000000 c33e3cf0 3ce0: c33e3d14 c33e3cf0 c01f5210 c01f5f58 c303cb48 c25ecf94 c25caa00 c25caa00 3d00: c25caa34 c33e3dd8 c33e3d34 c33e3d18 c01f6044 c01f51b8 c0496d3c c25caa00 3d20: c044e918 c33e3dd8 c33e3d44 c33e3d38 c01f4ff4 c01f5fcc c33e3d94 c33e3d48 3d40: c01f3d10 c01f4fd8 00000000 c044e918 00000000 00000000 c01f52c0 c034d570 3d60: c33e3d84 c33e3d70 c022bf84 c25caa00 00000000 c044e918 c33e3dd8 c25c2e00 3d80: c0496d60 bf01763c c33e3db4 c33e3d98 c022b1a0 c01f384c c25caa00 c33e3dd8 3da0: 00000000 c33e3dd8 c33e3dd4 c33e3db8 c022b27c c022b0e8 00000000 bf01763c 3dc0: c0451c80 c33e3dd8 c33e3e34 c33e3dd8 bf016f60 c022b210 5f75636d 746e6f63 3de0: 006c6f72 00000000 00000000 00000000 00000000 00000000 00000000 bf0174bc 3e00: 00000000 00989680 00000000 00000020 c0451c80 c0451c80 bf0174dc c01f5eb0 3e20: c33f0f00 bf0174dc c33e3e44 c33e3e38 c01f72f4 bf016e2c c33e3e74 c33e3e48 3e40: c01f5d88 c01f72e4 00000000 c0451c80 c0451cb4 bf0174dc c01f5eb0 c33f0f00 3e60: c0473100 00000000 c33e3e94 c33e3e78 c01f5f44 c01f5d10 00000000 c33e3e98 3e80: bf0174dc c01f5eb0 c33e3ebc c33e3e98 c01f5534 c01f5ec0 c303c038 c3061c30 3ea0: 00003cd8 00098258 bf0174dc c0462ac8 c33e3ecc c33e3ec0 c01f5bec c01f54dc 3ec0: c33e3efc c33e3ed0 c01f4d30 c01f5bdc bf0173a0 c33e2000 00003cd8 00098258 3ee0: bf0174dc c33e2000 c00301a4 bf019000 c33e3f1c c33e3f00 c01f6588 c01f4c8c 3f00: 00003cd8 00098258 00000000 c33e2000 c33e3f2c c33e3f20 c01f777c c01f6524 3f20: c33e3f3c c33e3f30 bf019014 c01f7740 c33e3f7c c33e3f40 c002f3ec bf019010 3f40: 00000000 00003cd8 00098258 bf017518 00000000 00003cd8 00098258 bf017518 3f60: 00000000 c00301a4 c33e2000 00000000 c33e3fa4 c33e3f80 c007b934 c002f3c4 3f80: c00b307c c00b2f48 00003cd8 00000000 00000003 00000080 00000000 c33e3fa8 3fa0: c0030020 c007b8b8 00003cd8 00000000 00098288 00003cd8 00098258 00098240 3fc0: 00003cd8 00000000 00000003 00000080 00098008 00098028 00098288 00000001 3fe0: be892998 be892988 00013d7c 40178740 60000010 00098288 09089041 00200845 Backtrace: [<c0080ba4>] (irq_gc_mask_set_bit+0x0/0x7c) from [<c007f5f8>] (irq_enable+0x48/0x58) r6:c33d4340 r5:c04555bc r4:c04555bc [<c007f5b0>] (irq_enable+0x0/0x58) from [<c007f654>] (irq_startup+0x4c/0x54) r5:c04555bc r4:00000000 [<c007f608>] (irq_startup+0x0/0x54) from [<c007e6e8>] (__setup_irq+0x2f0/0x3cc) r5:c04555bc r4:00000000 [<c007e3f8>] (__setup_irq+0x0/0x3cc) from [<c007e888>] (request_threaded_irq+0xc4/0x110) r8:0000002d r7:c33dc008 r6:00000000 r5:00000001 r4:bf016c98 [<c007e7c4>] (request_threaded_irq+0x0/0x110) from [<bf016b44>] (mcu_spi_probe+0x228/0x37c [mcu]) [<bf01691c>] (mcu_spi_probe+0x0/0x37c [mcu]) from [<c022a698>] (spi_drv_probe+0x20/0x24) [<c022a678>] (spi_drv_probe+0x0/0x24) from [<c01f5d88>] (driver_probe_device+0x88/0x1b0) [<c01f5d00>] (driver_probe_device+0x0/0x1b0) from [<c01f5f8c>] (__device_attach+0x44/0x48) [<c01f5f48>] (__device_attach+0x0/0x48) from [<c01f5210>] (bus_for_each_drv+0x68/0x94) r5:c33e3cf0 r4:00000000 [<c01f51a8>] (bus_for_each_drv+0x0/0x94) from [<c01f6044>] (device_attach+0x88/0xa0) r7:c33e3dd8 r6:c25caa34 r5:c25caa00 r4:c25caa00 [<c01f5fbc>] (device_attach+0x0/0xa0) from [<c01f4ff4>] (bus_probe_device+0x2c/0x4c) r7:c33e3dd8 r6:c044e918 r5:c25caa00 r4:c0496d3c [<c01f4fc8>] (bus_probe_device+0x0/0x4c) from [<c01f3d10>] (device_add+0x4d4/0x648) [<c01f383c>] (device_add+0x0/0x648) from [<c022b1a0>] (spi_add_device+0xc8/0x128) [<c022b0d8>] (spi_add_device+0x0/0x128) from [<c022b27c>] (spi_new_device+0x7c/0xb4) r7:c33e3dd8 r6:00000000 r5:c33e3dd8 r4:c25caa00 [<c022b200>] (spi_new_device+0x0/0xb4) from [<bf016f60>] (mcu_probe+0x144/0x224 [mcu]) r7:c33e3dd8 r6:c0451c80 r5:bf01763c r4:00000000 [<bf016e1c>] (mcu_probe+0x0/0x224 [mcu]) from [<c01f72f4>] (platform_drv_probe+0x20/0x24) [<c01f72d4>] (platform_drv_probe+0x0/0x24) from [<c01f5d88>] (driver_probe_device+0x88/0x1b0) [<c01f5d00>] (driver_probe_device+0x0/0x1b0) from [<c01f5f44>] (__driver_attach+0x94/0x98) [<c01f5eb0>] (__driver_attach+0x0/0x98) from [<c01f5534>] (bus_for_each_dev+0x68/0x94) r7:c01f5eb0 r6:bf0174dc r5:c33e3e98 r4:00000000 [<c01f54cc>] (bus_for_each_dev+0x0/0x94) from [<c01f5bec>] (driver_attach+0x20/0x28) r7:c0462ac8 r6:bf0174dc r5:00098258 r4:00003cd8 [<c01f5bcc>] (driver_attach+0x0/0x28) from [<c01f4d30>] (bus_add_driver+0xb4/0x258) [<c01f4c7c>] (bus_add_driver+0x0/0x258) from [<c01f6588>] (driver_register+0x74/0x158) [<c01f6514>] (driver_register+0x0/0x158) from [<c01f777c>] (platform_driver_register+0x4c/0x60) r7:c33e2000 r6:00000000 r5:00098258 r4:00003cd8 [<c01f7730>] (platform_driver_register+0x0/0x60) from [<bf019014>] (mcu_init+0x14/0x20 [mcu]) [<bf019000>] (mcu_init+0x0/0x20 [mcu]) from [<c002f3ec>] (do_one_initcall+0x38/0x170) [<c002f3b4>] (do_one_initcall+0x0/0x170) from [<c007b934>] (sys_init_module+0x8c/0x1a4) [<c007b8a8>] (sys_init_module+0x0/0x1a4) from [<c0030020>] (ret_fast_syscall+0x0/0x2c) r7:00000080 r6:00000003 r5:00000000 r4:00003cd8 Code: e1844003 e585400c e596300c e5932064 (e7814002) Fix the issue. Cc: <stable@vger.kernel.org> # v3.0.x+ Reported-by: Jon Povey <Jon.Povey@racelogic.co.uk> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio/omap: Fix section warning for omap_mpuio_alloc_gc()Tony Lindgren2012-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make omap_mpuio_alloc_gc() __devinit as omap_gpio_chip_init() is __devinit. Otherwise we get: WARNING: vmlinux.o(.devinit.text+0xa10): Section mismatch in reference from the function omap_gpio_chip_init() to the function .init.text:omap_mpuio_alloc_gc() The function __devinit omap_gpio_chip_init() references a function __init omap_mpuio_alloc_gc(). If omap_mpuio_alloc_gc is only used by omap_gpio_chip_init then annotate omap_mpuio_alloc_gc with a matching annotation. Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | ARM: tegra: export tegra_gpio_{en,dis}ableArnd Bergmann2012-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These two functions are used in drivers that can be modules, so they need to be exported. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alan Ott <alan@signal11.us> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio/gpio-stmpe: Fix the value returned by _get_value routineBhupesh Sharma2012-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The present _get_value routine returns the contents of the GPIO Monitor Pin Status Register(GPMR) starting from the bit whose value is requested to BIT 0 (irrelevant bits are replace by 0). For e.g. if we request the value of GPIO 6 in the earlier implementation the value returned is: BIT6 followed by 6 0's whereas it should just return BIT6. This patch addresses the same. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | GPIO: LPC32xx: Add output reading to GPO P3Roland Stigge2012-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The chip offers the function to detect the current state of output of the GPO P3 pins. Useful for reading GPIO output state in Linux' GPIO API, e.g. via sysfs. Please note that this only reads back the currently programmed output state, not the actual electrical level in terms of a GPI function. Finally, GPO3 is still just an output. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | GPIO: LPC32xx: Fix missing bit selection maskRoland Stigge2012-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing mask to pin bit selection in gpio-lpc32xx.c (#define GPIO3_PIN_IN_SEL) Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio/omap: fix wakeups on level-triggered GPIOsKevin Hilman2012-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While both level- and edge-triggered GPIOs are capable of generating interrupts, only edge-triggered GPIOs are capable of generating a module-level wakeup to the PRCM (c.f. 34xx NDA TRM section 25.5.3.2.) In order to ensure that devices using level-triggered GPIOs as interrupts can also cause wakeups (e.g. from idle), this patch enables edge-triggering for wakeup-enabled, level-triggered GPIOs when a GPIO bank is runtime-suspended (which also happens during idle.) This fixes a problem found in GPMC-connected network cards with GPIO interrupts (e.g. smsc911x on Zoom3, Overo, ...) where network booting with NFSroot was very slow since the GPIO IRQs used by the NIC were not generating PRCM wakeups, and thus not waking the system from idle. NOTE: until v3.3, this boot-time problem was somewhat masked because the UART init prevented WFI during boot until the full serial driver was available. Preventing WFI allowed regular GPIO interrupts to fire and this problem was not seen. After the UART runtime PM cleanups, we no longer avoid WFI during boot, so GPIO IRQs that were not causing wakeups resulted in very slow IRQ response times. Tested on platforms using level-triggered GPIOs for network IRQs using the SMSC911x NIC: 3530/Overo and 3630/Zoom3. Reported-by: Tony Lindgren <tony@atomide.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio/omap: Fix IRQ handling for SPARSE_IRQBenoit Cousson2012-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ. Replace the defines with the proper IRQ base number. Clean some comment style issue. Remove some hidden and ugly cpu_class_is_omap1() inside the gpio header. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
| * | gpio/omap: Add DT support to GPIO driverBenoit Cousson2012-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adapt the GPIO driver to retrieve information from a DT file. Allocate the irq_base dynamically and rename bank->virtual_irq_start to bank->irq_base. Change irq_base type to int instead of u16 to match irq_alloc_descs output. Add documentation for GPIO properties specific to OMAP. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
| * | gpio/omap: Use devm_ API and add request_mem_regionBenoit Cousson2012-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the regular kzalloc and ioremap with the devm_ equivalent to simplify error handling. Add the missing devm_request_mem_region to reserve the region used by the driver. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
| * | gpio/omap: Remove bank->id information and misc cleanupBenoit Cousson2012-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver does not need anymore any id to identify the GPIO instance. Remove every occurence of the bank->id inside the driver. Remove two trailing spaces. Add a dev variable for better readability in probe. Remove unused variable bank->pbase. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
| * | gpiolib: Add comments explaining the _cansleep() WARN_ON()sMark Brown2012-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've seen users getting very confused by the WARN_ON()s for can_sleep GPIOs in the atomic-safe paths, the discoverability of the non-atomic version of the API seems to be hampered by the fact that it's defined in a header file not the .c file where the warnings are. Add a couple of comments next to the warnings to help people on their way. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio: gpiolib: Support for open source/emitter gpiosLaxman Dewangan2012-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding support for the open source gpio on which client can specify the open source property through GPIO flag GPIOF_OPEN_SOURCE at the time of gpio request. The open source pins are normally pulled low and it cannot be driven to output with value of 0 and so when client request for setting the pin to LOW, the gpio will be set to input direction to make pin in tristate and hence PULL-DOWN on pins will make the state to LOW. The open source pin can be driven to HIGH by setting output with value of 1. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio: gpiolib: Support for open drain/collector gpiosLaxman Dewangan2012-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding support for the open drain gpio on which client can specify the open drain property through GPIO flag GPIOF_OPEN_DRAIN at the time of gpio request. The open drain pins are normally pulled high and it cannot be driven to output with value of 1 and so when client request for setting the pin to HIGH, the gpio will be set to input direction to make pin in tristate and hence PULL-UP on pins will make the state to HIGH. The open drain pin can be driven to LOW by setting output with value of 0. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | gpio: constify the data parameter to gpiochip_find()Grant Likely2012-03-02
| | | | | | | | | | | | | | | Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | Merge branch 'irqdomain/next' into gpio/nextGrant Likely2012-02-28
| |\ \
| * \ \ Merge branch 'for_3.4/gpio/runtime-pm-cleanup' of ↵Grant Likely2012-02-22
| |\ \ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into gpio/next
| * | | | gpio/gpio-pl061: No need of thaw and poweroff routines for hibernateViresh Kumar2012-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pl061 uses same routines for suspend/freeze/poweroff and resume/thaw/restore. We are only saving and restoring register values on these routines. During hibernation, in freeze() we take a snapshot of gpio registers. In thaw() we don't actually need to restore these registers, as power was never shut down till now. Similarly, in poweroff() we don't need to take snapshot of these registers again, as it was done during freeze() and by now the image is already saved on disk. This patch passes poweroff() and thaw() routines as NULL to avoid this extra work done. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | Fix circular locking dependency (3.3-rc2)Ming Lei2012-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hi, On Wed, Feb 8, 2012 at 8:41 PM, Felipe Balbi <balbi@ti.com> wrote: > Hi guys, > > I have just triggered the folllowing: > > [   84.860321] ====================================================== > [   84.860321] [ INFO: possible circular locking dependency detected ] > [   84.860321] 3.3.0-rc2-00026-ge4e8a39 #474 Not tainted > [   84.860321] ------------------------------------------------------- > [   84.860321] bash/949 is trying to acquire lock: > [   84.860321]  (sysfs_lock){+.+.+.}, at: [<c0275358>] gpio_value_store+0x24/0xcc > [   84.860321] > [   84.860321] but task is already holding lock: > [   84.860321]  (s_active#22){++++.+}, at: [<c016996c>] sysfs_write_file+0xdc/0x184 > [   84.911468] > [   84.911468] which lock already depends on the new lock. > [   84.911468] > [   84.920043] > [   84.920043] the existing dependency chain (in reverse order) is: > [   84.920043] > [   84.927886] -> #1 (s_active#22){++++.+}: > [   84.927886]        [<c008f640>] check_prevs_add+0xdc/0x150 > [   84.927886]        [<c008fc18>] validate_chain.clone.24+0x564/0x694 > [   84.927886]        [<c0090cdc>] __lock_acquire+0x49c/0x980 > [   84.951660]        [<c0091838>] lock_acquire+0x98/0x100 > [   84.951660]        [<c016a8e8>] sysfs_deactivate+0xb0/0x100 > [   84.962982]        [<c016b1b4>] sysfs_addrm_finish+0x2c/0x6c > [   84.962982]        [<c016b8bc>] sysfs_remove_dir+0x84/0x98 > [   84.962982]        [<c02590d8>] kobject_del+0x10/0x78 > [   84.974670]        [<c02c29e8>] device_del+0x140/0x170 > [   84.974670]        [<c02c2a24>] device_unregister+0xc/0x18 > [   84.985382]        [<c0276894>] gpio_unexport+0xbc/0xdc > [   84.985382]        [<c02768c8>] gpio_free+0x14/0xfc > [   85.001708]        [<c0276a28>] unexport_store+0x78/0x8c > [   85.001708]        [<c02c5af8>] class_attr_store+0x18/0x24 > [   85.007293]        [<c0169990>] sysfs_write_file+0x100/0x184 > [   85.018981]        [<c0109d48>] vfs_write+0xb4/0x148 > [   85.018981]        [<c0109fd0>] sys_write+0x40/0x70 > [   85.018981]        [<c0013cc0>] ret_fast_syscall+0x0/0x3c > [   85.035003] > [   85.035003] -> #0 (sysfs_lock){+.+.+.}: > [   85.035003]        [<c008f54c>] check_prev_add+0x680/0x698 > [   85.035003]        [<c008f640>] check_prevs_add+0xdc/0x150 > [   85.052093]        [<c008fc18>] validate_chain.clone.24+0x564/0x694 > [   85.052093]        [<c0090cdc>] __lock_acquire+0x49c/0x980 > [   85.052093]        [<c0091838>] lock_acquire+0x98/0x100 > [   85.069885]        [<c047e280>] mutex_lock_nested+0x3c/0x2f4 > [   85.069885]        [<c0275358>] gpio_value_store+0x24/0xcc > [   85.069885]        [<c02c18dc>] dev_attr_store+0x18/0x24 > [   85.087158]        [<c0169990>] sysfs_write_file+0x100/0x184 > [   85.087158]        [<c0109d48>] vfs_write+0xb4/0x148 > [   85.098297]        [<c0109fd0>] sys_write+0x40/0x70 > [   85.098297]        [<c0013cc0>] ret_fast_syscall+0x0/0x3c > [   85.109069] > [   85.109069] other info that might help us debug this: > [   85.109069] > [   85.117462]  Possible unsafe locking scenario: > [   85.117462] > [   85.117462]        CPU0                    CPU1 > [   85.128417]        ----                    ---- > [   85.128417]   lock(s_active#22); > [   85.128417]                                lock(sysfs_lock); > [   85.128417]                                lock(s_active#22); > [   85.142486]   lock(sysfs_lock); > [   85.151794] > [   85.151794]  *** DEADLOCK *** > [   85.151794] > [   85.151794] 2 locks held by bash/949: > [   85.158020]  #0:  (&buffer->mutex){+.+.+.}, at: [<c01698b8>] sysfs_write_file+0x28/0x184 > [   85.170349]  #1:  (s_active#22){++++.+}, at: [<c016996c>] sysfs_write_file+0xdc/0x184 > [   85.170349] > [   85.178588] stack backtrace: > [   85.178588] [<c001b824>] (unwind_backtrace+0x0/0xf0) from [<c008de64>] (print_circular_bug+0x100/0x114) > [   85.193023] [<c008de64>] (print_circular_bug+0x100/0x114) from [<c008f54c>] (check_prev_add+0x680/0x698) > [   85.193023] [<c008f54c>] (check_prev_add+0x680/0x698) from [<c008f640>] (check_prevs_add+0xdc/0x150) > [   85.212524] [<c008f640>] (check_prevs_add+0xdc/0x150) from [<c008fc18>] (validate_chain.clone.24+0x564/0x694) > [   85.212524] [<c008fc18>] (validate_chain.clone.24+0x564/0x694) from [<c0090cdc>] (__lock_acquire+0x49c/0x980) > [   85.233306] [<c0090cdc>] (__lock_acquire+0x49c/0x980) from [<c0091838>] (lock_acquire+0x98/0x100) > [   85.233306] [<c0091838>] (lock_acquire+0x98/0x100) from [<c047e280>] (mutex_lock_nested+0x3c/0x2f4) > [   85.242614] [<c047e280>] (mutex_lock_nested+0x3c/0x2f4) from [<c0275358>] (gpio_value_store+0x24/0xcc) > [   85.261840] [<c0275358>] (gpio_value_store+0x24/0xcc) from [<c02c18dc>] (dev_attr_store+0x18/0x24) > [   85.261840] [<c02c18dc>] (dev_attr_store+0x18/0x24) from [<c0169990>] (sysfs_write_file+0x100/0x184) > [   85.271240] [<c0169990>] (sysfs_write_file+0x100/0x184) from [<c0109d48>] (vfs_write+0xb4/0x148) > [   85.290008] [<c0109d48>] (vfs_write+0xb4/0x148) from [<c0109fd0>] (sys_write+0x40/0x70) > [   85.298400] [<c0109fd0>] (sys_write+0x40/0x70) from [<c0013cc0>] (ret_fast_syscall+0x0/0x3c) > -bash: echo: write error: Operation not permitted > > the way to trigger is: > > root@legolas:~# cd /sys/class/gpio/ > root@legolas:/sys/class/gpio# echo 2 > export > root@legolas:/sys/class/gpio# echo 2 > unexport > root@legolas:/sys/class/gpio# echo 2 > export > root@legolas:/sys/class/gpio# cd gpio2/ > root@legolas:/sys/class/gpio/gpio2# echo 1 > value Looks 'sysfs_lock' needn't to be held for unregister, so the patch below may fix the problem. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | gpio: tps65910: Add sleep control supportLaxman Dewangan2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tps65910/tps65911 supports the sleep functionality in some of gpios. If gpio is configured in output mode and sleep is enabled then during device sleep state, the output of gpio becomes LOW regardless of non-sleep output value. Such gpio can be used to control regulator switch such that output of regulator is off in device sleep state. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | gpio: Add a driver for Sodaville GPIO controllerSebastian Andrzej Siewior2012-02-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sodaville has GPIO controller behind the PCI bus. To my suprissed it is not the same as on PXA. The interrupt & gpio chip can be referenced from the device tree like from any other driver. Unfortunately the driver which uses the gpio interrupt has to use irq_of_parse_and_map() instead of platform_get_irq(). The problem is that the platform device (which is created from the device tree) is most likely created before the interrupt chip is registered and therefore irq_of_parse_and_map() fails. In theory the driver works as module. In reality most of the irq functions are not exported to modules and it is possible that _this_ module is unloaded while the provided irqs are still in use. Signed-off-by: Hans J. Koch <hjk@linutronix.de> [torbenh@linutronix.de: make it work after the irq namespace cleanup, add some device tree entries.] Signed-off-by: Torben Hohn <torbenh@linutronix.de> [bigeasy@linutronix.de: convert to generic irq & gpio chip] Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> [grant.likely@secretlab.ca: depend on x86 to avoid irq_domain breakage] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | ARM/mx35/3ds: gpio: add mc9s08dz60 gpio functionwu guoxing2012-01-30
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | we only use the gpio function of mc9s08dz60 mcu chip, so just add the gpio driver, as this mcu will never be used in other board. Signed-off-by: Wu Guoxing <b39297@freescale.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | | Merge tag 'mfd_3.4-1' of ↵Linus Torvalds2012-03-28
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6 Pull MFD changes from Samuel Ortiz: - 4 new drivers: Freescale i.MX on-chip Anatop, Ricoh's RC5T583 and TI's TPS65090 and TPS65217. - New variants support (8420, 8520 ab9540), cleanups and bug fixes for the abx500 and db8500 ST-E chipsets. - Some minor fixes and update for the wm8994 from Mark. - The beginning of a long term TWL cleanup effort coming from the TI folks. - Various fixes and cleanups for the s5m, TPS659xx, pm860x, and MAX8997 drivers. Fix up trivial conflicts due to duplicate patches and header file cleanups (<linux/device.h> removal etc). * tag 'mfd_3.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: (97 commits) gpio/twl: Add DT support to gpio-twl4030 driver gpio/twl: Allocate irq_desc dynamically for SPARSE_IRQ support mfd: Detach twl6040 from the pmic mfd driver mfd: Replace twl-* pr_ macros by the dev_ equivalent and do various cleanups mfd: Micro-optimization on twl4030 IRQ handler mfd: Make twl4030 SIH SPARSE_IRQ capable mfd: Move twl-core IRQ allocation into twl[4030|6030]-irq files mfd: Remove references already defineid in header file from twl-core mfd: Remove unneeded header from twl-core mfd: Make twl-core not depend on pdata->irq_base/end ARM: OMAP2+: board-omap4-*: Do not use anymore TWL6030_IRQ_BASE in board files mfd: Return twl6030_mmc_card_detect IRQ for board setup Revert "mfd: Add platform data for MAX8997 haptic driver" mfd: Add support for TPS65090 mfd: Add some da9052-i2c section annotations mfd: Build rtc5t583 only if I2C config is selected to y. mfd: Add anatop mfd driver mfd: Fix compilation error in tps65910.h mfd: Add 8420 variant to db8500-prcmu mfd: Add 8520 PRCMU variant to db8500-prcmu ...
| * | | | gpio/twl: Add DT support to gpio-twl4030 driverBenoit Cousson2012-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DT support for the I2C GPIO expander inside the twl4030. Note: The pdata parameters still have to be properly adapted using dedicated bindings. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
| * | | | gpio/twl: Allocate irq_desc dynamically for SPARSE_IRQ supportBenoit Cousson2012-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not use the board pdata for irq_base, but allocate them dynamically to allow a proper support of SPARSE_IRQ. Fix an unneeded line wrap. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
| * | | | mfd: Make twl4030 SIH SPARSE_IRQ capableBenoit Cousson2012-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | twl4030 is using a two level irq controllers infrastruture. So far, only the first level was using dynamic irq_desc allocation to be able to have irq_domain support for device tree. There is a need to allocate separate irq_descs for the SIH too to avoid hacking the first level with interrupts from the second level. Add an irq_base parameter to allow the caller to provide the base from pdata or from dynamic allocation. Affect TWL4030_NR_IRQS to the twl-core IRQs only. Moreover that will allow the extraction of the of_node pointer for further Device Tree conversion. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
| * | | | gpio: Support no-irq stmpe modeChris Blair2012-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for boards which have an STMPE GPIO device without the interrupt pin connected. This means that no interrupt can be received but the GPIO pins can still be driven and read. Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Viresh Kumar <viresh.kumar@st.com> Tested-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Chris Blair <chris.blair@stericsson.com> Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* | | | | Merge tag 'drivers2' of ↵Linus Torvalds2012-03-28
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull "ARM: More SoC driver updates" from Olof Johansson: "This branch contains a handful of driver updates, mostly to the LPC32xx platform but also for Samsung EXYNOS and Davinci. It had a few context conflicts against patches already merged through fixes-non-critical. We should have resolved this early during the development cycle by pulling them in as a dependency, instead I did it after the fact this time." * tag 'drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: gpio/samsung: use ioremap() for EXYNOS4 GPIOlib gpio/samsung: add support GPIOlib for EXYNOS5250 ARM: EXYNOS: add support GPIO for EXYNOS5250 ARM: LPC32xx: Ethernet support ARM: LPC32xx: USB Support ARM: davinci: dm644x evm: add support for VPBE display ARM: davinci: dm644x: add support for v4l2 video display ARM: EXYNOS: Hook up JPEG PD to generic PD infrastructure ARM: EXYNOS: Hook up G2D PD to generic PD infrastructure arm: lpc32xx: phy3250: add rtc & touch device ARM: LPC32xx: clock.c: Clock registration fixes ARM: LPC32xx: clock.c: jiffies wrapping ARM: LPC32xx: clock.c: Missing header file ARM: LPC32XX: Remove broken non-static declaration ARM: LPC32xx: clock.c: Fix mutex lock issues ARM: LPC32xx: clock.c: warning fix ARM: LPC32xx: Added lpc32xx_defconfig
| * \ \ \ \ Merge branch 'next/soc-exynos5250-gpio' of ↵Arnd Bergmann2012-03-15
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers * 'next/soc-exynos5250-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (201 commits) gpio/samsung: use ioremap() for EXYNOS4 GPIOlib gpio/samsung: add support GPIOlib for EXYNOS5250 ARM: EXYNOS: add support GPIO for EXYNOS5250 (update to v3.3-rc7) Conflicts: arch/arm/mach-pxa/pxa25x.c arch/arm/mach-pxa/pxa27x.c The dummy clock for the pxa rtc in those files keeps getting added and removed in various trees. Apparently removing is the correct solution. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | gpio/samsung: use ioremap() for EXYNOS4 GPIOlibSangsu Park2012-03-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes to use ioremap() for EXYNOS4210 so that we can drop the static mapping for EXYNOS SoCs. Note: Will be updated for all of Samsung GPIOlibs to use ioremap() next time. Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | gpio/samsung: add support GPIOlib for EXYNOS5250Sangsu Park2012-03-14
| | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds gpio_chips for EXYNOS5250 and replaces exynos4_xxx() with exynos_xxx() and variables to support exynos4 and exynos5 together. In addition, use ioreamp() for base address of gpios. Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | | | | Merge branch 'platforms' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-03-27
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM platform updates from Russell King: "This covers platform stuff for platforms I have a direct interest in (iow, I have the hardware). Essentially: - as we no longer support any other Acorn platforms other than RiscPC anymore, we can collect all that code into mach-rpc. - convert Acorn expansion card stuff to use IRQ allocation functions, and get rid of NO_IRQ from there. - cleanups to the ebsa110 platform to move some private stuff out of its header files. - large amount of SA11x0 updates: - conversion of private DMA implementation to DMA engine support (this actually gives us greater flexibility in drivers over the old API.) - re-worked ucb1x00 updates - convert to genirq, remove sa11x0 dependencies, fix various minor issues - move platform specific sa11x0 framebuffer data into platform files in arch/arm instead of keeping this in the driver itself - update sa11x0 IrDA driver for DMA engine, and allow it to use DMA for SIR transmissions as well as FIR - rework sa1111 support for genirq, and irq allocation - fix sa1111 IRQ support so it works again - use sparse IRQ support After this, I have one more pull request remaining from my current set, which I think is going to be the most problematical as it generates 8 conflicts." Fixed up the trivial conflict in arch/arm/mach-rpc/Makefile as per Russell. * 'platforms' of git://git.linaro.org/people/rmk/linux-arm: (125 commits) ARM: 7343/1: sa11x0: convert to sparse IRQ ARM: 7342/2: sa1100: prepare for sparse irq conversion ARM: 7341/1: input: prepare jornada720 keyboard and ts for sa11x0 sparse irq ARM: 7340/1: rtc: sa1100: include mach/irqs.h instead of asm/irq.h ARM: sa11x0: remove unused DMA controller definitions ARM: sa11x0: remove old SoC private DMA driver USB: sa1111: add hcd .reset method USB: sa1111: add OHCI shutdown methods USB: sa1111: reorganize ohci-sa1111.c USB: sa1111: get rid of nasty printk(KERN_DEBUG "%s: ...", __FILE__) USB: sa1111: sparse and checkpatch cleanups ARM: sa11x0: don't static map sa1111 ARM: sa1111: use dev_err() rather than printk() ARM: sa1111: cleanup sub-device registration and unregistration ARM: sa1111: only setup DMA for DMA capable devices ARM: sa1111: register sa1111 devices with dmabounce in bus notifier ARM: sa1111: move USB interface register definitions to ohci-sa1111.c ARM: sa1111: move PCMCIA interface register definitions to sa1111_generic.c ARM: sa1111: move PS/2 interface register definitions to sa1111p2.c ARM: sa1111: delete unused physical GPIO register definitions ...
| * | | | | | ARM: 7342/2: sa1100: prepare for sparse irq conversionRob Herring2012-03-25
| | |/ / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to convert SA1100 to sparse irq, set .nr_irqs for each machine and explicitly include mach/irqs.h as needed. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | | Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-03-27
|\ \ \ \ \ \ | | |/ / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull "ARM: driver specific updates" from Arnd Bergmann: "These are all specific to some driver. They are typically the platform side of a change in the drivers directory, such as adding a new driver or extending the interface to the platform. In cases where there is no maintainer for the driver, or the maintainer prefers to have the platform changes in the same branch as the driver changes, the patches to the drivers are included as well. A much smaller set of driver updates that depend on other branches getting merged first will be sent later. The new export of tegra_chip_uid conflicts with other changes in fuse.c. In rtc-sa1100.c, the global removal of IRQF_DISABLED conflicts with the cleanup of the interrupt handling of that driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fixed up aforementioned trivial conflicts. * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits) ARM: SAMSUNG: change the name from s3c-sdhci to exynos4-sdhci mmc: sdhci-s3c: add platform data for the second capability ARM: SAMSUNG: support the second capability for samsung-soc ARM: EXYNOS: add support DMA for EXYNOS4X12 SoC ARM: EXYNOS: Add apb_pclk clkdev entry for mdma1 ARM: EXYNOS: Enable MDMA driver regulator: Remove bq24022 regulator driver rtc: sa1100: add OF support pxa: magician/hx4700: Convert to gpio-regulator from bq24022 ARM: OMAP3+: SmartReflex: fix error handling ARM: OMAP3+: SmartReflex: fix the use of debugfs_create_* API ARM: OMAP3+: SmartReflex: micro-optimization for sanity check ARM: OMAP3+: SmartReflex: misc cleanups ARM: OMAP3+: SmartReflex: move late_initcall() closer to its argument ARM: OMAP3+: SmartReflex: add missing platform_set_drvdata() ARM: OMAP3+: hwmod: add SmartReflex IRQs ARM: OMAP3+: SmartReflex: clear ERRCONFIG_VPBOUNDINTST only on a need ARM: OMAP3+: SmartReflex: Fix status masking in ERRCONFIG register ARM: OMAP3+: SmartReflex: Add a shutdown hook ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP ... Conflicts: arch/arm/mach-tegra/Makefile arch/arm/mach-tegra/fuse.c drivers/rtc/rtc-sa1100.c
| * | | | | Merge branch 'depends/irqdomain' into next/driversArnd Bergmann2012-03-05
| |\ \ \ \ \ | | | |_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed in order for the tegra/soc-drivers branch to work. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | Merge tag 'tegra-soc-drivers' of ↵Arnd Bergmann2012-03-04
| |\ \ \ \ \ | | |_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/soc-drivers Tegra SoC driver support. Some device tree conversions, some new drivers. and a fix for an issue introduced in Grant Likely's irq_domain conversion in his tree. Because of that, this branch depends on his branch to build (but not to merge): git://git.secretlab.ca/git/linux-2.6.git irqdomain/next * tag 'tegra-soc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra: (34 commits) ARM: tegra: uncompress.h: Don't depend on kernel headers gpio: tegra: Fix build issue due to irq_domain rework. ARM: tegra: Remove duplicate PMU interrupt inversion code ARM: tegra: Add a simple PMC driver ARM: tegra: dma: not required to move requestor when stopping. ARM: tegra: Fix EMC pdata initialization from registers gpio: tegra: Parameterize the number of banks gpio: tegra: Dynamically allocate IRQ base, and support DT ARM: tegra: Remove use of TEGRA_GPIO_TO_IRQ ARM: tegra: Pass uncompress.h UART selection to DEBUG_LL ARM: tegra: uncompress.h: Choose a UART at runtime ARM: tegra: uncompress.h: Store UART address in a variable ARM: tegra: Introduce define DEBUG_UART_SHIFT ARM: tegra: Support Tegra30 in decompressor UART setup ARM: tegra: Pause DMA when reading transfer count ARM: tegra: emc: device tree support ARM: tegra: emc: convert tegra2_emc to a platform driver ARM: tegra: fuse: add bct strapping reading ARM: tegra: fuse: add functions to access chip revision ARM: tegra: fuse: use apbio dma for register access ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | gpio: tegra: Fix build issue due to irq_domain rework.Stephen Warren2012-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7da5a66 "irq_domain: Remove 'new' irq_domain in favour of the ppc one" changed the set of available irq domain APIs. Update the Tegra GPIO driver to account for those changes, to solve a build break. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | gpio: tegra: Parameterize the number of banksStephen Warren2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra20's GPIO controller has 7 banks, and Tegra30's controller has 8 banks. Allow the number of banks to be configured at run-time by the device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | gpio: tegra: Dynamically allocate IRQ base, and support DTStephen Warren2012-02-06
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhance the driver to dynamically allocate the base IRQ number, and create an IRQ domain for itself. The use of an IRQ domain ensures that any device tree node interrupts properties are correctly parsed. Describe interrupt-related properties in the device tree binding docs, and the contents of "child" node interrupts property. Update tegra*.dtsi to specify the required interrupt-related properties. Finally, remove the definition of TEGRA_GPIO_TO_IRQ; this macro no longer gives correct results since the IRQ numbers for GPIOs are dynamically allocated. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
* | | | | Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-03-27
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull "ARM: global cleanups" from Arnd Bergmann: "Quite a bit of code gets removed, and some stuff moved around, mostly the old samsung s3c24xx stuff. There should be no functional changes in this series otherwise. Some cleanups have dependencies on other arm-soc branches and will be sent in the second round. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fixed up trivial conflicts mainly due to #include's being changes on both sides. * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (121 commits) ep93xx: Remove unnecessary includes of ep93xx-regs.h ep93xx: Move EP93XX_SYSCON defines to SoC private header ep93xx: Move crunch code to mach-ep93xx directory ep93xx: Make syscon access functions private to SoC ep93xx: Configure GPIO ports in core code ep93xx: Move peripheral defines to local SoC header ep93xx: Convert the watchdog driver into a platform device. ep93xx: Use ioremap for backlight driver ep93xx: Move GPIO defines to gpio-ep93xx.h ep93xx: Don't use system controller defines in audio drivers ep93xx: Move PHYS_BASE defines to local SoC header file ARM: EXYNOS: Add clock register addresses for EXYNOS4X12 bus devfreq driver ARM: EXYNOS: add clock registers for exynos4x12-cpufreq PM / devfreq: update the name of EXYNOS clock registers that were omitted PM / devfreq: update the name of EXYNOS clock register ARM: EXYNOS: change the prefix S5P_ to EXYNOS4_ for clock ARM: EXYNOS: use static declaration on regarding clock ARM: EXYNOS: replace clock.c for other new EXYNOS SoCs ARM: OMAP2+: Fix build error after merge ARM: S3C24XX: remove call to s3c24xx_setup_clocks ...
| * \ \ \ \ Merge branch 'ep93xx-for-arm-soc' of git://github.com/RyanMallon/linux-2.6 ↵Arnd Bergmann2012-03-15
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/cleanup * 'ep93xx-for-arm-soc' of git://github.com/RyanMallon/linux-2.6: ep93xx: Remove unnecessary includes of ep93xx-regs.h ep93xx: Move EP93XX_SYSCON defines to SoC private header ep93xx: Move crunch code to mach-ep93xx directory ep93xx: Make syscon access functions private to SoC ep93xx: Configure GPIO ports in core code ep93xx: Move peripheral defines to local SoC header ep93xx: Convert the watchdog driver into a platform device. ep93xx: Use ioremap for backlight driver ep93xx: Move GPIO defines to gpio-ep93xx.h ep93xx: Don't use system controller defines in audio drivers ep93xx: Move PHYS_BASE defines to local SoC header file (update to v3.3-rc7) Conflicts: arch/arm/mach-s3c2440/common.h
| | * | | | | ep93xx: Configure GPIO ports in core codeRyan Mallon2012-03-13
| | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the pinmux setting of the EP93xx GPIOs to the core code. This removes the need for the GPIO driver to have access to the system controller registers. Signed-off-by: Ryan Mallon <rmallon@gmail.com> Cc: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Hartley Sweeten <hsweeten@visionengravers.com>
| * | | | | Merge branch 'depends/omap/gpio/runtime-pm-cleanup' into next/cleanupArnd Bergmann2012-03-02
| |\ \ \ \ \ | | | |_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-omap1/gpio16xx.c drivers/gpio/gpio-omap.c Merge in the runtime-pm-cleanup branch from the gpio tree into next/cleanup, this resolves a nonobvious merge conflict between the two branches. Both branches move parts of the gpio-omap driver into platform code, this takes the superset of both changes. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | gpio/omap: handle set_dataout reg capable IP on restoreNishanth Menon2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO IP revisions such as those used in OMAP4 have a set_dataout while the previous revisions used a single dataout register. Depending on what is available restore the dataout settings to the right register. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | gpio/omap: restore OE only after setting the output levelNishanth Menon2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup the dataout register before restoring OE. This is to make sure that we have valid data in dataout register which would be made available in output pins as soon as OE is enabled. Else, there is risk of unknown data getting out into gpio pins. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | gpio/omap: enable irq at the end of all configuration in restoreNishanth Menon2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup the interrupt enable registers only after we have configured the required edge and required configurations, not before, to prevent spurious events as part of restore routine. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | gpio/omap: save and restore debounce registersNishanth Menon2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO debounce registers need to be saved and restored for proper functioning of driver. Signed-off-by: Nishanth Menon <nm@ti.com> tarun.kanti@ti.com: Debounce context save is moved to _set_gpio_debounce() as part of dynamic context save to remove overhead. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | gpio/omap: remove omap_gpio_save_context overheadTarun Kanti DebBarma2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Context is now saved dynamically in respective functions whenever and whichever registers are modified. This avoid overhead of saving all registers context in the runtime suspend callback. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | gpio/omap: fix incorrect access of debounce moduleTarun Kanti DebBarma2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable debounce clock before writing/reading debounce registers. Disable the clock at the end so that it is synchronized with the pm_runtime_get/put_sync calls. Enable debounce clock per module. This call is mandatory because in omap_gpio_request() when *_runtime_get_sync() is called, _gpio_dbck_enable() within runtime callbck fails to turn on dbck because dbck_enable_mask used within _gpio_dbck_enable() is still not initialized at that point. Therefore we have to enable dbck here. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | gpio/omap: fix debounce clock handlingTarun Kanti DebBarma2012-02-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dbck_enable_mask indicates which all GPIOs within a bank have debounce enabled and dbck is enabled/disabled based upon this. But there is no mechanism to track the dbck state. In order to manage the dbck state we need additional flag and logic so that turning off/on dbck is synchronized with pm_runtime_put/get_sync calls. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-09 21:24:18 -0400