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* x86: remove 32-bit versions of readq()/writeq()Roland Dreier2011-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The presense of a writeq() implementation on 32-bit x86 that splits the 64-bit write into two 32-bit writes turns out to break the mpt2sas driver (and in general is risky for drivers as was discussed in <http://lkml.kernel.org/r/adaab6c1h7c.fsf@cisco.com>). To fix this, revert 2c5643b1c5c7 ("x86: provide readq()/writeq() on 32-bit too") and follow-on cleanups. This unfortunately leads to pushing non-atomic definitions of readq() and write() to various x86-only drivers that in the meantime started using the definitions in the x86 version of <asm/io.h>. However as discussed exhaustively, this is actually the right thing to do, because the right way to split a 64-bit transaction is hardware dependent and therefore belongs in the hardware driver (eg mpt2sas needs a spinlock to make sure no other accesses occur in between the two halves of the access). Build tested on 32- and 64-bit x86 allmodconfig. Link: http://lkml.kernel.org/r/x86-32-writeq-is-broken@mdm.bga.com Acked-by: Hitoshi Mitake <h.mitake@gmail.com> Cc: Kashyap Desai <Kashyap.Desai@lsi.com> Cc: Len Brown <lenb@kernel.org> Cc: Ravi Anand <ravi.anand@qlogic.com> Cc: Vikas Chaudhary <vikas.chaudhary@qlogic.com> Cc: Matthew Garrett <mjg@redhat.com> Cc: Jason Uhlenkott <juhlenko@akamai.com> Acked-by: James Bottomley <James.Bottomley@parallels.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Roland Dreier <roland@purestorage.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* drivercore: revert addition of of_match to struct deviceGrant Likely2011-05-18
| | | | | | | | | | | | | | | Commit b826291c, "drivercore/dt: add a match table pointer to struct device" added an of_match pointer to struct device to cache the of_match_table entry discovered at driver match time. This was unsafe because matching is not an atomic operation with probing a driver. If two or more drivers are attempted to be matched to a driver at the same time, then the cached matching entry pointer could get overwritten. This patch reverts the of_match cache pointer and reworks all users to call of_match_device() directly instead. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* amd64_edac: Erratum #637 workaroundBorislav Petkov2011-04-26
| | | | | | | | | F15h CPUs may report a non-DRAM address when reporting an error address belonging to a CC6 state save area. Add a workaround to detect this condition and compute the actual DRAM address of the error as documented in the Revision Guide for AMD Family 15h Models 00h-0Fh Processors. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Factor in CC6 save areaBorislav Petkov2011-04-26
| | | | | | | | | | F15h and later use a portion of DRAM as a CC6 storage area. BIOS programs D18F1x[17C:140,7C:40] DRAM Base/Limit accordingly by subtracting the storage area from the DRAM limit setting. However, in order for edac to consider that part of DRAM too, we need to include it into the per-node range. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Remove node interleave warningBorislav Petkov2011-04-26
| | | | | | | | | This warning was wrongfully added for a normal condition - intlvsel actually selects the destination node when node interleaving is enabled and it is not a mismatch. For a detailed example, see section 2.8.10.2 "Node Interleaving" in F10h BKDG. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC: Remove debugging output in scrub rate handlingMarkus Trippelsdorf2011-04-21
| | | | | | | | | This patch removes superfluous debugging output in the sysfs scrub rate handler. It also consolidates the error handling in the scrub rate accessors. Signed-off-by: Markus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* Merge branch 'for-linus2' of git://git.profusion.mobi/users/lucas/linux-2.6Linus Torvalds2011-04-07
|\ | | | | | | | | * 'for-linus2' of git://git.profusion.mobi/users/lucas/linux-2.6: Fix common misspellings
| * Fix common misspellingsLucas De Marchi2011-03-31
| | | | | | | | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* | edac/mpc85xx: Limit setting/clearing of HID1[RFXE] to e500v1/v2 coresKumar Gala2011-04-04
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the e500v1/v2 cores have HID1[RXFE] so we should attempt to set or clear this register bit on them. Otherwise we get crashes like: NIP: c0579f84 LR: c006d550 CTR: c0579f84 REGS: ef857ec0 TRAP: 0700 Not tainted (2.6.38.2-00072-gf15ba3c) MSR: 00021002 <ME,CE> CR: 22044022 XER: 00000000 TASK = ef8559c0[1] 'swapper' THREAD: ef856000 CPU: 0 GPR00: c006d538 ef857f70 ef8559c0 00000000 00000004 00000000 00000000 00000000 GPR08: c0590000 c30170a8 00000000 c30170a8 00000001 0fffe000 00000000 00000000 GPR16: 00000000 7ffa0e60 00000000 00000000 7ffb0bd8 7ff3b844 c05be000 00000000 GPR24: 00000000 00000000 c05c28b0 c0579fac 00000000 00029002 00000000 c0579f84 NIP [c0579f84] mpc85xx_mc_clear_rfxe+0x0/0x28 LR [c006d550] on_each_cpu+0x34/0x50 Call Trace: [ef857f70] [c006d538] on_each_cpu+0x1c/0x50 (unreliable) [ef857f90] [c057a070] mpc85xx_mc_init+0xc4/0xdc [ef857fa0] [c0001cd4] do_one_initcall+0x34/0x1a8 [ef857fd0] [c055d9d8] kernel_init+0x17c/0x218 [ef857ff0] [c000cda4] kernel_thread+0x4c/0x68 Instruction dump: 40be0018 3c60c052 3863c70c 4be9baad 3be0ffed 4bd7c99d 80010014 7fe3fb78 83e1000c 38210010 7c0803a6 4e800020 <7c11faa6> 54290024 81290008 3d60c06e Oops: Exception in kernel mode, sig: 4 [#2] ---[ end trace 49ff3b8f93efde1a ]--- Also use the HID1_RFXE define rather than a magic number. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* amd64_edac: Fix potential memleakBorislav Petkov2011-03-29
| | | | | | | | | | We check the pointers together but at least one of them could be invalid due to failed allocation. Since we cannot continue if either of the two allocations has failed, exit early by freeing them both. Cc: <stable@kernel.org> # 38.x Reported-by: Mauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* Merge branch 'for-linus' of ↵Linus Torvalds2011-03-18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (47 commits) doc: CONFIG_UNEVICTABLE_LRU doesn't exist anymore Update cpuset info & webiste for cgroups dcdbas: force SMI to happen when expected arch/arm/Kconfig: remove one to many l's in the word. asm-generic/user.h: Fix spelling in comment drm: fix printk typo 'sracth' Remove one to many n's in a word Documentation/filesystems/romfs.txt: fixing link to genromfs drivers:scsi Change printk typo initate -> initiate serial, pch uart: Remove duplicate inclusion of linux/pci.h header fs/eventpoll.c: fix spelling mm: Fix out-of-date comments which refers non-existent functions drm: Fix printk typo 'failled' coh901318.c: Change initate to initiate. mbox-db5500.c Change initate to initiate. edac: correct i82975x error-info reported edac: correct i82975x mci initialisation edac: correct commented info fs: update comments to point correct document target: remove duplicate include of target/target_core_device.h from drivers/target/target_core_hba.c ... Trivial conflict in fs/eventpoll.c (spelling vs addition)
| * edac: correct i82975x error-info reportedArvind R2011-02-17
| | | | | | | | | | | | | | | | | | | | to edac-core fix the totally wrong info w.r.t page,row,dimm-label previously reported to edac-core by i82975x driver Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| * edac: correct i82975x mci initialisationArvind R2011-02-17
| | | | | | | | | | | | | | | | corrected mtype, and added dev_name,scrubmode initialisers in i82975x struct mem_ctl initialisation Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| * edac: correct commented infoArvind R2011-02-17
| | | | | | | | | | | | | | wrong comments in i82975x driver corrected Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| * Merge branch 'master' into for-nextJiri Kosina2011-02-15
| |\
| * | edac: i82975x author/maintainer email address changeArvind R2011-01-24
| | | | | | | | | | | | | | | | | | | | | edac-i82975x author/maintainer email address change Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| * | Kill off warning: ‘inline’ is not at beginning of declarationJesper Juhl2011-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a bunch of warning: ‘inline’ is not at beginning of declaration messages when building a 'make allyesconfig' kernel with -Wextra. These warnings are trivial to kill, yet rather annoying when building with -Wextra. The more we can cut down on pointless crap like this the better (IMHO). A previous patch to do this for a 'allnoconfig' build has already been merged. This just takes the cleanup a little further. Signed-off-by: Jesper Juhl <jj@chaosbits.net> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds2011-03-17
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (27 commits) arch/tile: support newer binutils assembler shift semantics arch/tile: fix deadlock bugs in rwlock implementation drivers/edac: provide support for tile architecture tile on-chip network driver: sync up with latest fixes arch/tile: support 4KB page size as well as 64KB arch/tile: add some more VMSPLIT options and use consistent naming arch/tile: fix some comments and whitespace arch/tile: export some additional module symbols arch/tile: enhance existing finv_buffer_remote() routine arch/tile: fix two bugs in the backtracer code arch/tile: use extended assembly to inline __mb_incoherent() arch/tile: use a cleaner technique to enable interrupt for cpu_idle() arch/tile: sync up with <arch/sim.h> and <arch/sim_def.h> changes arch/tile: fix reversed test of strict_strtol() return value arch/tile: avoid a simulator warning during bootup arch/tile: export <asm/hardwall.h> to userspace arch/tile: warn and retry if an IPI is not accepted by the target cpu arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcalls arch/tile: fix __ndelay etc to work better arch/tile: bug fix: exec'ed task thought it was still single-stepping ... Fix up trivial conflict in arch/tile/kernel/vmlinux.lds.S (percpu alignment vs section naming convention fix)
| * | | drivers/edac: provide support for tile architectureChris Metcalf2011-03-10
| | |/ | |/| | | | | | | | | | | | | | | | | | | Add tile support for the EDAC driver, which provides unified system error (memory, PCI, etc.) reporting. For now, the TILEPro port reports memory correctable error (CE) only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* | | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds2011-03-17
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (38 commits) amd64_edac: Fix decode_syndrome types amd64_edac: Fix DCT argument type amd64_edac: Fix ranges signedness amd64_edac: Drop local variable amd64_edac: Fix PCI config addressing types amd64_edac: Fix DRAM base macros amd64_edac: Fix node id signedness amd64_edac: Drop redundant declarations amd64_edac: Enable driver on F15h amd64_edac: Adjust ECC symbol size to F15h amd64_edac: Simplify scrubrate setting PCI: Rename CPU PCI id define amd64_edac: Improve DRAM address mapping amd64_edac: Sanitize ->read_dram_ctl_register amd64_edac: Adjust sys_addr to chip select conversion routine to F15h amd64_edac: Beef up early exit reporting amd64_edac: Revamp online spare handling amd64_edac: Fix channel interleave removal amd64_edac: Correct node interleaving removal amd64_edac: Add support for interleaved region swapping ... Fix up trivial conflict in include/linux/pci_ids.h due to AMD_15H_NB_MISC being renamed as AMD_15H_NB_F3 next to the new AMD_15H_NB_LINK entry.
| * | | amd64_edac: Fix decode_syndrome typesBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Those should all be unsigned. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Fix DCT argument typeBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix amd64_debug_display_dimm_sizes() arguments order per convention (pvt is always first). Also, the now second arg denotes the DCT so adjust its type. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Fix ranges signednessBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | The dram ranges make sense only as an unsigned type. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Drop local variableBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Use the macro directly instead Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Fix PCI config addressing typesBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Adjust argument types to the PCI config API's types. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Fix DRAM base macrosBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Return unsigned u8 values only. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Fix node id signednessBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A node id can never be negative since we use it as an index into the DRAM ranges array. This also makes one of the BUG_ON conditions redundant. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Drop redundant declarationsBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Those were moved to the mce_amd.h header. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Enable driver on F15hBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the PCI device ids required for driver registration. Remove pvt->ctl_name and use the family descriptor directly, instead. Then, bump driver version and fixup its format. Finally, enable DRAM ECC decoding on F15h. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Adjust ECC symbol size to F15hBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | F15h has the same ECC symbol size options as F10h revD and later so adjust checks to that. Simplify code a bit. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Simplify scrubrate settingBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Drop per-instance variable and compute min scrubrate dynamically. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Improve DRAM address mappingBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop static tables which map the bits in F2x80 to a chip select size in favor of functions doing the mapping with some bit fiddling. Also, add F15 support. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Sanitize ->read_dram_ctl_registerBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is relevant for F10h and higher, and it has only one callsite so drop its function pointer from the low_ops struct. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Adjust sys_addr to chip select conversion routine to F15hBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | F15h sys_addr to chip select mapping is almost identical to F10h's so reuse that. Rename functions on that path accordingly. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Beef up early exit reportingBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add paranoid checks for the sys address before going off and decoding it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Revamp online spare handlingBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace per-DCT macros with smarter ones, drop hack and look for the spare rank on all chip selects on a channel. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Fix channel interleave removalBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the channel interleave select bit properly. See F2x110[DctSelIntLvAddr] for details. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Correct node interleaving removalBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When node interleaving is enabled, a subset of the addr[14:12] bits has to be removed in order to get the normalized DCT address of the DRAM channel. The actual number of bits to remove is determined by F1x[1, 0][7C:40][IntlvEn]. Do this correctly. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Add support for interleaved region swappingBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On revC3 and revE Fam10h machines and later, non-interleaved graphics framebuffer memory under the 16G mark can be swapped with a region located at the bottom of memory so that the GPU can use the interleaved region and thus two channels. Add support for that. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Unify get_error_addressBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The address bits from MC4_STATUS differ only between K8 and the rest so no need for a per-family method. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Simplify decoding pathBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the struct mce directly instead of copying from it into a custom struct err_regs. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Adjust channel counting to F15hBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The only difference is that F10h used to sport ganged DCTs and F15h doesn't so adjust the F10h routine and reuse it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Cleanup old defines cruftBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Remove unused defines, drop family names from define names. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Cleanup NBSH cruftBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Cleanup NBCFG handlingBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fact whether we are chipkill capable or not does not have any bearing when computing the channel index on a ganged DCT configuration so remove that. Also, simplify debug statements. Finally, remove old error injection leftovers, while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Cleanup NBCTL codeBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove family names from macro names, drop single bit defines and comment their meaning instead. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Cleanup DCT Select Low/High codeBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Shorten macro names, remove family name from macros, fix macro arguments, shorten debug strings. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Cleanup Dram Configuration registers handlingBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Restrict DCT ganged mode check since only Fam10h supports it * Adjust DRAM type detection for BD since it only supports DDR3 * Remove second and thus unneeded DCLR read in k8_early_channel_count() - we do that in read_mc_regs() * Cleanup comments and remove family names from register macros * Remove unused defines There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Cleanup DBAM handlingBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not read DBAM regs twice and simplify code around them. There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | amd64_edac: Replace huge bitmasks with a macroBorislav Petkov2011-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Replace hard to read hex constants with a continuous masks macro. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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