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* dmaengine: add private header fileRussell King - ARM Linux2012-03-13
| | | | | | | | | | | | | | | | Add a local private header file to contain definitions and declarations which should only be used by DMA engine drivers. We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against multiple inclusion. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: move last completed cookie into generic dma_chan structureRussell King - ARM Linux2012-03-13
| | | | | | | | | | | | | | | Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: mv_xor: remove write-only is_complete_cookieRussell King - ARM Linux2012-03-13
| | | | | | | | | | | | | mv_xor's is_complete_cookie is only ever written to, but never read. This is silly, remove the write-only structure member. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/dw_dmac: Remove unused fields in struct dw_dma_slaveViresh Kumar2012-02-22
| | | | | Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/dw_dmac: Add support for DMA_SLAVE_CONFIGViresh Kumar2012-02-22
| | | | | | | | | | | This patch adds support for DMA_SLAVE_CONFIG in dwc DMAC controller. Fields in struct dw_dma_slave for passing similar data are preserved in this patch untill all existing users are fixed. That will be handled later in this patchset. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/dw_dmac: Add 64 bit access width support for slave xfers on mem sideViresh Kumar2012-02-22
| | | | | | | | 64 bit transfers are possible on both sides in slave transfers (memory as well as peripherals). This patch adds support for it memory side 64 bit transfers. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/dw_dmac: Don't handle block interruptsViresh Kumar2012-02-22
| | | | | | | | | | | Block interrupts give interrupt on completion of every LLI, which is actually too much interrupts. This is just not required for current functioning of dw_dmac. So, just don't handle them at all. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/dw_dmac: Use dev_get_platdata() instead of accessing dev directlyViresh Kumar2012-02-22
| | | | | | | | Use already defined function dev_get_platdata() instead of accessing pdev->dev.data. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/dw_dmac: Don't use magic number for total number of channelsViresh Kumar2012-02-22
| | | | | | | | Total number of channels is passed in pdata->nr_channels variable, thus we must not use magic number '7' for total number of channels. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/amba-pl08x: Take flow controller info from DMA_SLAVE_CONFIGViresh Kumar2012-02-22
| | | | | | | | | | Flow controller information is passed now from DMA_SLAVE_CONFIG option. This patch makes changes in pl08x driver to use device_fc from it instead of platform data. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine/dw_dmac: Hibernation support in dw_dmacRajeev KUMAR2012-02-22
| | | | | | | | | | The suspend and resume implementation is through dev_pm_ops in dmac. So in order to support hibernation, freeze, thaw, restore and poweroff features are required. Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: intel_mid_dma: move pm_runtime_putAdrian Hunter2012-02-22
| | | | | | | | | Move pm_runtime_put() to the end of intel_mid_dma_free_chan_resources() because there is no sense in allowing runtime suspend while the driver is still accessing the device. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* dmaengine: intel_mid_dma: fix error status maskAdrian Hunter2012-02-22
| | | | | | | | The error status mask (MASK_ERR) has the same format as the other masks (MASK_TFR, MASK_BLOCK etc) and must be cleared the same way. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* i.MX SDMA: Fix burstsize settingsPhilippe Rétornaz2012-02-02
| | | | | | | | | | | | Commit 6584cb88 (ARM i.MX dma: Fix burstsize settings) fixed the mxcmmc driver but forgot to fix the SDMA driver to handle the correct burtsize. This make the SD card access works again with DMA on i.MX31 boards. Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch> Tested-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* Merge branch 'fixes' into nextVinod Koul2012-02-01
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| * dma: sh_dma: not all SH DMAC implementations support MEMCPYGuennadi Liakhovetski2012-02-01
| | | | | | | | | | | | | | | | | | Add a flag to allow platforms to specify, whether a DMAC instance supports the MEMCPY operation. To avoid regressions, preserve the current default. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | Merge branch 'fixes' into nextVinod Koul2012-01-31
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| * Merge branch fixes of ↵Vinod Koul2012-01-31
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine.git
| | * dmaengine: fix missing 'cnt' in ?: in dmatestDr. David Alan Gilbert2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hi, On the latest tree my compiler has started giving the warning: drivers/dma/dmatest.c:575:28: warning: the omitted middle operand in ?: will always be ?true?, suggest explicit middle operand [-Wparentheses] The following patch fixes the missing middle clause with the same fix that Nicolas Ferre used in the similar clauses. (There seems to have been a race between him fixing that and the extra clause going in a little later). I don't actually know the dmatest code/structures, nor do I own any hardware to test it on (assuming it needs a DMA engine); but this patch builds, the existing code is almost certainly wrong and the fix is the same as the corresponding lines above it. (WTH is x=y?:z legal C anyway?) Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | at_hdmac: bugfix for enabling channel irqNikolaus Voss2012-01-30
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 463894705e4089d0ff69e7d877312d496ac70e5b deleted redundant chan_id and chancnt initialization in dma drivers as this is done in dma_async_device_register(). However, atc_enable_irq() relied on chan_id set before registering the device, what left only channel 0 functional for this driver. This patch introduces atc_enable/disable_chan_irq() as a variant of atc_enable/disable_irq() with the channel as explicit argument. Signed-off-by: Nikolaus Voss <n.voss@weinmann.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma/imx-sdma: convernt to use bit opsRichard Zhao2012-01-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need extra lock, so we use non-atomic bit ops to set/clear bits, merge event_mask0 and event_mask1 into an array, it helps use bit ops. It also fixs the issue: sdmac->event_mask0 = 1 << sdmac->event_id0; sdmac->event_mask1 = 1 << (sdmac->event_id0 - 32); It event_id0 < 32, it shifts negative number. If event_id0 >= 32, it shifts number >= sizeof(int). Both the cases behavior is undefined. Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma/imx-sdma: use num_events to validate event_id0Richard Zhao2012-01-30
| | | | | | | | | | | | | | | | event number is not always 32. use num_events for checking instead. Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma/imx-sdma: move clk_enable out of sdma_request_channelRichard Zhao2012-01-30
| | | | | | | | | | | | | | | | | | | | | | It makes clk_enable/disable pair more readable, and fix one bug: sdma_init calls sdma_request_channel, but seems don't know sdma_request_channel enabled the clock. Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> [fixed typo in commit log] Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma/imx-sdma: call sdma_set_channel_priority after sdma_request_channelRichard Zhao2012-01-30
| | | | | | | | | | | | | | | | | | sdma_request_channel sets the default priority. sdma_alloc_chan_resources should call sdma_set_channel_priority thereafter to over write it. Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma/imx-sdma: use readl_relaxed/writel_relaxed and use writel when necessaryRichard Zhao2012-01-30
| | | | | | | | | | | | | | | | use readl_relaxed/writel_relaxed in most places, and use writel when enable channel, because it needs memory barrier. Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma/imx-sdma: let sdma_run_channel call sdma_enable_channelRichard Zhao2012-01-30
| | | | | | | | | | | | | | | | | | Let all enable channel code call sdma_enable_channel. Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | drivers/dma/amba-pl08x.c: adjust double testJulia Lawall2012-01-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite a duplicated test to test the correct value The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression E; @@ ( * E || ... || E | * E && ... && E ) // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | drivers/dma/pl330.c: add missing iounmapJulia Lawall2012-01-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing iounmap in error handling code, in a case where the function already preforms iounmap on some other execution path. This patch additionally adds calls to clk_disable and clk_put. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; statement S,S1; int ret; @@ e = \(ioremap\|ioremap_nocache\)(...) ... when != iounmap(e) if (<+...e...+>) S ... when any when != iounmap(e) *if (...) { ... when != iounmap(e) return ...; } ... when any iounmap(e); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma: imx-sdma: start transfer in issue_pendingSascha Hauer2012-01-30
| | | | | | | | | | | | | | | | | | The DMA engine API requires that transfers are started in issue_pending instead of tx_submit. Fix this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [corrected change log to DMA engine API insteadof DMA API] Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* | dma: imx-dma: start transfer in issue_pendingSascha Hauer2012-01-30
|/ | | | | | | | | The DMA engine API requires that transfers are started in issue_pending instead of tx_submit. Fix this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [corrected change log to DMA engine API insteadof DMA API] Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2012-01-17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (53 commits) ARM: mach-shmobile: specify CHCLR registers on SH7372 dma: shdma: fix runtime PM: clear channel buffers on reset dma/imx-sdma: save irq flags when use spin_lock in sdma_tx_submit dmaengine/ste_dma40: clear LNK on channel startup dmaengine: intel_mid_dma: remove legacy pm interface ASoC: mxs: correct 'direction' of device_prep_dma_cyclic dmaengine: intel_mid_dma: error path fix dmaengine: intel_mid_dma: locking and freeing fixes mtd: gpmi-nand: move to dma_transfer_direction mtd: fix compile error for gpmi-nand mmc: mxs-mmc: fix the dma_transfer_direction migration dmaengine: add DMA_TRANS_NONE to dma_transfer_direction dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled. dma: mxs-dma: fix a typo in comment DMA: PL330: Remove pm_runtime_xxx calls from pl330 probe/remove video i.MX IPU: Fix display connections i.MX IPU DMA: Fix wrong burstsize settings dmaengine/ste_dma40: allow fixed physical channel ... Fix up conflicts in drivers/dma/{Kconfig,mxs-dma.c,pl330.c} The conflicts looked pretty trivial, but I'll ask people to verify them.
| * dma: shdma: fix runtime PM: clear channel buffers on resetGuennadi Liakhovetski2012-01-06
| | | | | | | | | | | | | | | | | | | | | | On platforms, supporting power domains, if the domain, containing a DMAC instance is powered down, the driver fails to resume correctly. On those platforms DMAC channels have an additional CHCLR register for clearing channel buffers. Using this register during runtime resume fixes the problem. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dma/imx-sdma: save irq flags when use spin_lock in sdma_tx_submitHaitao Zhang2012-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx53_loco: fix deadlock report from sdma_tx_submit() during boot BugLink: http://bugs.launchpad.net/bugs/878701 Adjust to use spin_lock_irqsave()/spin_unlock_irqresotre(), so to make it safe when called from interrupt context. Signed-off-by: Haitao Zhang <haitao.zhang@linaro.org> Signed-off-by: Eric Miao <eric.miao@linaro.org> Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine/ste_dma40: clear LNK on channel startupRabin Vincent2012-01-02
| | | | | | | | | | | | | | | | | | | | | | | | Otherwise if a previously physical channel is used as a logical channel, the LNK may have old values which affect the operation of the logical channel since the LNK register has different semantics between physical and logical channels. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com> Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine: intel_mid_dma: remove legacy pm interfaceKristen Carlson Accardi2012-01-02
| | | | | | | | | | | | | | Drivers should not support both legacy pm and new framework. Signed-off-by: Kristen Carlson Accardi <kristen@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine: intel_mid_dma: error path fixAdrian Hunter2011-12-23
| | | | | | | | | | | | | | Add missing iounmap in error path. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine: intel_mid_dma: locking and freeing fixesAdrian Hunter2011-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | Two issues are fixed: 1. DMA descriptors are reused so when freeing lli structures that are linked to them, the pointer must be nulled. 2. midc_scan_descriptors() must be called with the channel lock held. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine: add DMA_TRANS_NONE to dma_transfer_directionShawn Guo2011-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before dma_transfer_direction was introduced to replace dma_data_direction, some dmaengine device uses DMA_NONE of dma_data_direction for some talk with its client drivers. The mxs-dma and its clients mxs-mmc and gpmi-nand are such case. This patch adds DMA_TRANS_NONE to dma_transfer_direction and migrate the DMA_NONE use in mxs-dma to it. It also fixes the compile warning below. CC drivers/dma/mxs-dma.o drivers/dma/mxs-dma.c: In function ‘mxs_dma_prep_slave_sg’: drivers/dma/mxs-dma.c:420:16: warning: comparison between ‘enum dma_transfer_direction’ and ‘enum dma_data_direction’ Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channelsLothar Waßmann2011-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is how the original Freescale code (unintentionally) worked, because the code path which would have asserted the CLKGATE bit was never actually reached in their code. This fixes the nefarious "DMA timout" bug when multiple DMA channels (e.g. GPMI NAND and MMC) are used at the same time. If a better fix for this problem should be found, the clkgate handling could be reinstated. See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/065228.html Also reverse the order of mxs_dma_disable_chan() and mxs_dma_reset_chan() in mxs_dma_control() because mxs_dma_reset_chan() can only work when the DMA channel is enabled. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safeLothar Waßmann2011-12-23
| | | | | | | | | | | | | | | | Using a static variable for counting the number of CCWs attached to a DMA channel when appending a new descriptor is not multi user safe. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled.Lothar Waßmann2011-12-23
| | | | | | | | | | | | | | | | | | | | There is no need to have the clock enabled all the time the driver is loaded. It will be enabled anyway in mxs_dma_alloc_chan_resources() when a channel is actually going to be used. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dma: mxs-dma: fix a typo in commentLothar Waßmann2011-12-23
| | | | | | | | | | Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * DMA: PL330: Remove pm_runtime_xxx calls from pl330 probe/removeTushar Behera2011-12-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | amba_probe() now calls pm_runtime_get_noresume() and pm_runtime_enable() for the devices before the device probe is called. Hence we don't need to call pm_runtime_get_xxx and pm_runtime_enable() in device probe again. In the same way, since amba_remove() calls the respective pm_runtime functions, those functions need not be called from device remove. This patch fixes following run time error with pl330 driver. dma-pl330 dma-pl330.0: Unbalanced pm_runtime_enable! dma-pl330 dma-pl330.0: failed to get runtime pm Signed-off-by: Giridhar Maruthy <giridhar.maruthy@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * i.MX IPU DMA: Fix wrong burstsize settingsSascha Hauer2011-12-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The burstsize (npb in struct chan_param_mem) is set in ipu_ch_param_set_size() once. The number of allowed pixels in a burst depend on the pixel format and the rotation mode. For 16bit formats 16 pixels are allowed whereas for 32bit formats only 8 pixels are allowed. Set these values correctly in ipu_ch_param_set_size() and do not overwrite them afterwards. We do not support rotation right now, so ignore this case. This patch fixes the wrong burstsize setting of 16 pixels for 32bpp. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine/ste_dma40: allow fixed physical channelNarayanan G2011-12-04
| | | | | | | | | | | | | | | | | | | | | | | | Allow logical channels to specify the physical channel they want to use. This is needed to avoid two peripherals operating on the same physical channel during some special use-cases. (like mmc and usb during a usb mass storage case). Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine/amba-pl08x: Config ccfg and increment phychan_hold if phychan is trueViresh Kumar2011-12-04
| | | | | | | | | | | | | | | | | | | | | | Currently, if plchan->phychan is true, we return immediately from prep_phy_chan(). We must configure txd->ccfg and increment phychan_hold before returning. Otherwise, request line number wouldn't be configured in this txd. Reported-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dmaengine: convert drivers/dma/* to use module_platform_driver()Axel Lin2011-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the drivers in drivers/dma/* to use the module_platform_driver() macro which makes the code smaller and a bit simpler. Cc: Dan Williams <dan.j.williams@intel.com> Cc: Piotr Ziecik <kosmo@semihalf.com> Cc: Rongjun Ying <rongjun.ying@csr.com> Cc: Barry Song <21cnbao@gmail.com> Cc: Pelagicore AB <info@pelagicore.com> Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * IMX/SDMA : save the real count for one DMA transaction.Huang Shijie2011-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we use the SDMA in the UART driver(such as imx6q), we will meet one situation: Assume we set 64 bytes for the RX DMA buffer. The RX DMA buffer has received some data, but not full. An Aging DMA request will be received by the SDMA controller if we enable the IDDMAEN(UCR4[6]) in this case. So the UART driver needs to know the count of the real received bytes, and push them to upper layer. Add two new fields to sdmac, and update the `residue` in sdma_tx_status(). Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dma/ep93xx_dma: prevent ep93xx_dma_tasklet() to reference an empty listMika Westerberg2011-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If dma_terminate_all() is called before the ep93xx_dma_tasklet() gets to run, it tries to access an empty ->active list which results following OOPS: Internal error: Oops - undefined instruction: 0 [#1] CPU: 0 Not tainted (3.2.0-rc1EP-1+ #1008) PC is at 0xc184c868 LR is at ep93xx_dma_tasklet+0xec/0x164 pc : [<c184c868>] lr : [<c012b528>] psr: 00000013 sp : c02b7e70 ip : ffffffff fp : c02b7ea4 r10: 00000100 r9 : 80000013 r8 : c02b7e50 r7 : c02b7e70 r6 : c02b7ea4 r5 : 000000a4 r4 : c02b7e70 r3 : c02b751d r2 : 8ae34598 r1 : c184c6e0 r0 : c02b7ea4 Flags: nzcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: c000717f Table: c0004000 DAC: 00000017 Process swapper (pid: 0, stack limit = 0xc02b6270) Stack: (0xc02b7e70 to 0xc02b8000) 7e60: c02b7ea4 c02b7e70 c0008b64 c02bd5c4 7e80: c02d60e0 00000000 00000000 c02bd44c c02d60e0 00000100 c02b7ec4 c02b7ea8 7ea0: c001c49c c012b44c 00000018 00000001 c02d60e0 c02b6000 c02b7f04 c02b7ec8 7ec0: c001cbc0 c001c3e4 c02b7eec c02b7ed8 00000006 0000000a c02bf674 c02c458c 7ee0: 00000011 00000000 c02b7f7c c0004000 41129200 c02b0c80 c02b7f14 c02b7f08 7f00: c001cdd0 c001cb38 c02b7f34 c02b7f18 c000983c c001cd98 c0009a60 60000013 7f20: fefb0001 c02b7f7c c02b7f44 c02b7f38 c0008190 c0009810 c02b7f9c c02b7f48 7f40: c0008b64 c0008190 c02c2bf8 00000002 c02b7f90 60000013 c02b6000 c02d1504 7f60: c02baa88 c02baa80 c0004000 41129200 c02b0c80 c02b7f9c c02b7fa0 c02b7f90 7f80: c0009a54 c0009a60 60000013 ffffffff c02b7fbc c02b7fa0 c000a03c c0009a40 7fa0: c02b80b0 c02b19dc c02b19d8 c02baa80 c02b7fcc c02b7fc0 c02384e4 c0009fd4 7fc0: c02b7ff4 c02b7fd0 c029d924 c0238494 c029d49c 00000000 00000000 c02b19dc 7fe0: c0007175 c02b803c 00000000 c02b7ff8 c000803c c029d700 00000000 00000000 Backtrace: [<c012b43c>] (ep93xx_dma_tasklet+0x0/0x164) from [<c001c49c>] (tasklet_action+0xc8/0xdc) [<c001c3d4>] (tasklet_action+0x0/0xdc) from [<c001cbc0>] (__do_softirq+0x98/0x154) r7:c02b6000 r6:c02d60e0 r5:00000001 r4:00000018 [<c001cb28>] (__do_softirq+0x0/0x154) from [<c001cdd0>] (irq_exit+0x48/0x50) [<c001cd88>] (irq_exit+0x0/0x50) from [<c000983c>] (handle_IRQ+0x3c/0x8c) [<c0009800>] (handle_IRQ+0x0/0x8c) from [<c0008190>] (asm_do_IRQ+0x10/0x14) r7:c02b7f7c r6:fefb0001 r5:60000013 r4:c0009a60 [<c0008180>] (asm_do_IRQ+0x0/0x14) from [<c0008b64>] (__irq_svc+0x24/0xc0) Exception stack(0xc02b7f48 to 0xc02b7f90) 7f40: c02c2bf8 00000002 c02b7f90 60000013 c02b6000 c02d1504 7f60: c02baa88 c02baa80 c0004000 41129200 c02b0c80 c02b7f9c c02b7fa0 c02b7f90 7f80: c0009a54 c0009a60 60000013 ffffffff [<c0009a30>] (default_idle+0x0/0x34) from [<c000a03c>] (cpu_idle+0x78/0xb0) [<c0009fc4>] (cpu_idle+0x0/0xb0) from [<c02384e4>] (rest_init+0x60/0x78) r7:c02baa80 r6:c02b19d8 r5:c02b19dc r4:c02b80b0 [<c0238484>] (rest_init+0x0/0x78) from [<c029d924>] (start_kernel+0x234/0x278) [<c029d6f0>] (start_kernel+0x0/0x278) from [<c000803c>] (0xc000803c) r5:c02b803c r4:c0007175 Code: 42555300 54535953 643d4d45 65766972 (53007372) To make the code a bit more robust against things like these, we modify ep93xx_dma_get_active() to return NULL in case of empty ->active list and make sure that callers handle this correctly. Reported-by: Rafal Prylowski <prylowski@metasoft.pl> Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
| * dma/ep93xx_dma: fix initialization of M2M control registerRafal Prylowski2011-12-04
| | | | | | | | | | | | | | | | | | | | | | Setting the flags in case of IDE didn't have any effect since the control register is overwritten few lines below. So move these to be after the control register is initialized. Signed-off-by: Rafal Prylowski <prylowski@metasoft.pl> Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>