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path: root/drivers/dma/fsldma.c
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* dmaengine: ack to flags: make use of the unused bits in the 'ack' fieldDan Williams2008-04-17
| | | | | | | | | | | | | | | | | | 'ack' is currently a simple integer that flags whether or not a client is done touching fields in the given descriptor. It is effectively just a single bit of information. Converting this to a flags parameter allows the other bits to be put to use to control completion actions, like dma-unmap, and capture results, like xor-zero-sum == 0. Changes are one of: 1/ convert all open-coded ->ack manipulations to use async_tx_ack and async_tx_test_ack. 2/ set the ack bit at prep time where possible 3/ make drivers store the flags at prep time 4/ add flags to the device_prep_dma_interrupt prototype Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* async_tx: kill ->device_dependency_addedDan Williams2008-04-17
| | | | | | | | | | DMA drivers no longer need to be notified of dependency submission events as async_tx_run_dependencies and async_tx_channel_switch will handle the scheduling and execution of dependent operations. [sfr@canb.auug.org.au: extend this for fsldma] Acked-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* fsldma: Split the MPC83xx event from MPC85xx and refine irq codes.Zhang Wei2008-04-17
| | | | | | | | | | | Split MPC83xx EOCDI event from MPC85xx EOLNI event, which is also need to update cookie and start the next transfer. The DMA channel irq handler function code is refined. The patch is tested on MPC8377MDS board. Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by; Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* fsldma: Remove CONFIG_FSL_DMA_SELFTEST, keep fsl_dma_self_test() running always.Zhang Wei2008-04-17
| | | | | | | | Always enabling the fsl_dma_self_test() to ensure the DMA controller should works well after the driver probed. Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* [POWERPC] fsldma: Use compatiable binding as specKumar Gala2008-03-31
| | | | | | | | | | Documentation/powerpc/booting-without-of.txt specifies the compatiables we should bind to for this driver (elo, eloplus). Use these instead of the extremely specific 'mpc8540' and 'mpc8349' compatiables. Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsldma: Fix the DMA halt when using DMA_INTERRUPT async_tx transfer.Zhang Wei2008-03-18
| | | | | | | | | | | | The DMA_INTERRUPT async_tx is a NULL transfer, thus the BCR(count register) is 0. When the transfer started with a byte count of zero, the DMA controller will triger a PE(programming error) event and halt, not a normal interrupt. I add special codes for PE event and DMA_INTERRUPT async_tx testing. Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* fsldma: Add a completed cookie updated action in DMA finish interrupt.Zhang Wei2008-03-13
| | | | | | | | | | | | | The patch 'fsldma: do not cleanup descriptors in hardirq context' (commit 222ccf9ab838a1ca7163969fabd2cddc10403fb5) removed descriptors cleanup function to tasklet but the completed cookie do not updated. Thus, the DMA controller will get lots of duplicated transfer interrupts. Just make a completed cookie update in interrupt handler. And keep other cleanup jobs in tasklet function. Tested-by: Sebastian Siewior <bigeasy@linutronix.de> Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* fsldma: Add device_prep_dma_interrupt support to fsldma.cZhang Wei2008-03-13
| | | | | | | | | This is a bug that I assigned DMA_INTERRUPT capability to fsldma but missing device_prep_dma_interrupt function. For a bug in dmaengine.c the driver passed BUG_ON() checking. The patch fixes it. Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* fsldma: Fix fsldma.c warning messages when it's compiled under PPC64.Zhang Wei2008-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are warning messages reported by Stephen Rothwell with ARCH=powerpc allmodconfig build: drivers/dma/fsldma.c: In function 'fsl_dma_prep_memcpy': drivers/dma/fsldma.c:439: warning: comparison of distinct pointer types lacks a cast drivers/dma/fsldma.c: In function 'fsl_chan_xfer_ld_queue': drivers/dma/fsldma.c:584: warning: format '%016llx' expects type 'long long unsigned int', but argument 4 has type 'dma_addr_t' drivers/dma/fsldma.c: In function 'fsl_dma_chan_do_interrupt': drivers/dma/fsldma.c:668: warning: format '%x' expects type 'unsigned int', but argument 5 has type 'dma_addr_t' drivers/dma/fsldma.c:684: warning: format '%016llx' expects type 'long long unsigned int', but argument 4 has type 'dma_addr_t' drivers/dma/fsldma.c:684: warning: format '%016llx' expects type 'long long unsigned int', but argument 5 has type 'dma_addr_t' drivers/dma/fsldma.c:701: warning: format '%02x' expects type 'unsigned int', but argument 4 has type 'dma_addr_t' drivers/dma/fsldma.c: In function 'fsl_dma_self_test': drivers/dma/fsldma.c:840: warning: format '%d' expects type 'int', but argument 5 has type 'size_t' drivers/dma/fsldma.c: In function 'of_fsl_dma_probe': drivers/dma/fsldma.c:1010: warning: format '%08x' expects type 'unsigned int', but argument 5 has type 'resource_size_t' This patch fixed the above warning messages. Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* fsldma: do not cleanup descriptors in hardirq contextDan Williams2008-03-04
| | | | | | | | | "Cleaning" descriptors involves calling pending callbacks and clients assume that their callback will only ever happen in softirq context. Delay cleanup to the tasklet. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Zhang Wei <wei.zhang@freescale.com>
* dmaengine: add driver for Freescale MPC85xx DMA controllerZhang Wei2008-03-04
The driver implements DMA engine API for Freescale MPC85xx DMA controller, which could be used by devices in the silicon. The driver supports the Basic mode of Freescale MPC85xx DMA controller. The MPC85xx processors supported include MPC8540/60, MPC8555, MPC8548, MPC8641 and so on. The MPC83xx(MPC8349, MPC8360) are also supported. [kamalesh@linux.vnet.ibm.com: build fix] [dan.j.williams@intel.com: merge mm fixes, rebase on async_tx-2.6.25] Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Acked-by: Kumar Gala <galak@gate.crashing.org> Cc: Shannon Nelson <shannon.nelson@intel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>