| Commit message (Collapse) | Author | Age |
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It removes the use of mach level IO accessor __mxs_setl/clrl, and hence
removes mach header inclusion from clock driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
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Instead of using the static definitions, get clkctrl and digctl base
addresses with mapping from device tree.
Use macro on variable is not nice, but it's done here to save huge
pointless diff stat.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
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Change call clk_get_sys() to of_clk_get() to look up timrot clock from
device tree, so that the clk_register_clkdev() call for timrot can be
saved in clock driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Select CLKSRC_OF and use clocksource_of_init() to initialize timer, so
that the call to mxs_timer_init() in clock driver can be removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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This is a dependency for the mxs/cleanup branch.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This is a dependency for tegra/cleanups
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-critical fixes from Olof Johansson:
"Here is a collection of fixes (and some intermixed cleanups) that were
considered less important and thus not included in the later parts of
the 3.9-rc cycle.
It's a bit all over the map, contents wise. A series of ux500 fixes
and cleanups, a bunch of various fixes for OMAP and tegra, and some
for Freescale i.MX and even Qualcomm MSM.
Note that there's also a patch on this branch to globally turn off
-Wmaybe-uninitialized when building with -Os. It's been posted
several times by Arnd and no dissent was raised, but nobody seemed
interested to pick it up. So here it is, as the topmost patch."
* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits)
Turn off -Wmaybe-uninitialized when building with -Os
ARM: orion5x: include linux/cpu.h
ARM: tegra: call cpu_do_idle from C code
ARM: u300: fix ages old copy/paste bug
ARM: OMAP2+: add dependencies on ARCH_MULTI_V6/V7
ARM: tegra: solve adr range issue with THUMB2_KERNEL enabled
ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled
ARM: tegra: fix build error when THUMB2_KERNEL enabled
ARM: msm: Fix uncompess.h tx underrun check
ARM: vexpress: Remove A9 PMU compatible values for non-A9 platforms
ARM: cpuimx27 and mbimx27: prepend CONFIG_ to Kconfig macro
ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
ARM: mach-imx: mach-imx6q: Fix sparse warnings
ARM: mach-imx: src: Include "common.h
ARM: mach-imx: gpc: Include "common.h"
ARM: mach-imx: avic: Staticize *avic_base
ARM: mach-imx: tzic: Staticize *tzic_base
ARM: mach-imx: clk: Include "clk.h"
ARM: mach-imx: clk-busy: Staticize clk_busy_mux_ops
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git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/fixes-non-critical
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: minor fixes
This branch contains a variety of small build and run-time fixes that
weren't important enough for 3.9.
* Enable CPU errata WARs in secondary reset handler as a preparation
for multi-platform support, and a related fix.
* Don't touch DBLGAR in reset/resume handlers, so enable the code to
run on A15 cores.
* Minor build fixes.
* A fix to the Tegra clock driver.
* Some error-handling fixes.
This branch is based on the previous fixes-for-mmc pull request.
* tag 'tegra-for-3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: powergate: Don't error out if new state == old state
ARM: tegra: Export tegra_powergate_sequence_power_up()
memory: tegra30: Fix build error w/o PM
ARM: tegra: fix ignored return value of regulator_enable
ARM: tegra: fix the logical detection of power on sequence of warm boot CPUs
ARM: tegra: Fix unchecked return value
ARM: tegra: don't unlock MMIO access to DBGLAR
clk: tegra: No 7.1 super clk dividers on Tegra20
ARM: tegra: remove save/restore of CPU diag register
ARM: tegra: add CPU errata WARs to Tegra reset handler
ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Unlike Tegra30, Tegra20 does not have a 7.1 divider for the CPU superclk.
Remove the clocks related to the divider.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
From Tony Lindgren <tony@atomide.com>:
Non critical omap fixes for v3.10 merge window. A big chunk
of these fixes are needed to support omap5 es2 version that includes
PM features while the earlier version es1 did not.
* tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry
Contains an update to 3.9-rc5
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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In the case of some of the ux500 platforms, an Ethernet chip is
placed on an extended bus which is traditionally used as a NAND
flash chip placeholder. The p3_pclk0 clock is used to control it,
so we are required to provide and easy way to access it from the
SMSC911x driver. We do this using an alias provided by this patch.
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The FMSC clock is traditionally used for NAND flash devices when
used on the ux500 series platforms. This patch makes it searchable
during a clock-name search.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management and ACPI updates from Rafael J Wysocki:
- ARM big.LITTLE cpufreq driver from Viresh Kumar.
- exynos5440 cpufreq driver from Amit Daniel Kachhap.
- cpufreq core cleanup and code consolidation from Viresh Kumar and
Stratos Karafotis.
- cpufreq scalability improvement from Nathan Zimmer.
- AMD "frequency sensitivity feedback" powersave bias for the ondemand
cpufreq governor from Jacob Shin.
- cpuidle code consolidation and cleanups from Daniel Lezcano.
- ARM OMAP cpuidle fixes from Santosh Shilimkar and Daniel Lezcano.
- ACPICA fixes and other improvements from Bob Moore, Jung-uk Kim, Lv
Zheng, Yinghai Lu, Tang Chen, Colin Ian King, and Linn Crosetto.
- ACPI core updates related to hotplug from Toshi Kani, Paul Bolle,
Yasuaki Ishimatsu, and Rafael J Wysocki.
- Intel Lynxpoint LPSS (Low-Power Subsystem) support improvements from
Rafael J Wysocki and Andy Shevchenko.
* tag 'pm+acpi-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (192 commits)
cpufreq: Revert incorrect commit 5800043
cpufreq: MAINTAINERS: Add co-maintainer
cpuidle: add maintainer entry
ACPI / thermal: do not always return THERMAL_TREND_RAISING for active trip points
ARM: s3c64xx: cpuidle: use init/exit common routine
cpufreq: pxa2xx: initialize variables
ACPI: video: correct acpi_video_bus_add error processing
SH: cpuidle: use init/exit common routine
ARM: S5pv210: compiling issue, ARM_S5PV210_CPUFREQ needs CONFIG_CPU_FREQ_TABLE=y
ACPI: Fix wrong parameter passed to memblock_reserve
cpuidle: fix comment format
pnp: use %*phC to dump small buffers
isapnp: remove debug leftovers
ARM: imx: cpuidle: use init/exit common routine
ARM: davinci: cpuidle: use init/exit common routine
ARM: kirkwood: cpuidle: use init/exit common routine
ARM: calxeda: cpuidle: use init/exit common routine
ARM: tegra: cpuidle: use init/exit common routine for tegra3
ARM: tegra: cpuidle: use init/exit common routine for tegra2
ARM: OMAP4: cpuidle: use init/exit common routine
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* acpi-lpss:
ACPI / LPSS: make code less confusing for reader
ACPI / LPSS: Add support for exposing LTR registers to user space
ACPI / scan: Add special handler for Intel Lynxpoint LPSS devices
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Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have some
common features that aren't shared with any other platform devices,
including the clock and LTR (Latency Tolerance Reporting) registers.
It is better to handle those features in common code than to bother
device drivers with doing that (I/O functionality-wise the LPSS
devices are generally compatible with other devices that don't
have those special registers and may be handled by the same drivers).
The clock registers of the LPSS devices are now taken care of by
the special clk-x86-lpss driver, but the MMIO mappings used for
accessing those registers can also be used for accessing the LTR
registers on those devices (LTR support for the Lynxpoint LPSS is
going to be added by a subsequent patch). Thus it is convenient
to add a special ACPI scan handler for the Lynxpoint LPSS devices
that will create the MMIO mappings for accessing the clock (and
LTR in the future) registers and will register the LPSS devices'
clocks, so the clk-x86-lpss driver will only need to take care of
the main Lynxpoint LPSS clock.
Introduce a special ACPI scan handler for Intel Lynxpoint LPSS
devices as described above. This also reduces overhead related to
browsing the ACPI namespace in search of the LPSS devices before the
registration of their clocks, removes some LPSS-specific (and
somewhat ugly) code from acpi_platform.c and shrinks the overall code
size slightly.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
Pull trivial tree updates from Jiri Kosina:
"Usual stuff, mostly comment fixes, typo fixes, printk fixes and small
code cleanups"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (45 commits)
mm: Convert print_symbol to %pSR
gfs2: Convert print_symbol to %pSR
m32r: Convert print_symbol to %pSR
iostats.txt: add easy-to-find description for field 6
x86 cmpxchg.h: fix wrong comment
treewide: Fix typo in printk and comments
doc: devicetree: Fix various typos
docbook: fix 8250 naming in device-drivers
pata_pdc2027x: Fix compiler warning
treewide: Fix typo in printks
mei: Fix comments in drivers/misc/mei
treewide: Fix typos in kernel messages
pm44xx: Fix comment for "CONFIG_CPU_IDLE"
doc: Fix typo "CONFIG_CGROUP_CGROUP_MEMCG_SWAP"
mmzone: correct "pags" to "pages" in comment.
kernel-parameters: remove outdated 'noresidual' parameter
Remove spurious _H suffixes from ifdef comments
sound: Remove stray pluses from Kconfig file
radio-shark: Fix printk "CONFIG_LED_CLASS"
doc: put proper reference to CONFIG_MODULE_SIG_ENFORCE
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Correct spelling typo in various drivers.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Pull clock framework update from Michael Turquette:
"The common clock framework changes for 3.10 include many fixes for
existing platforms, as well as adoption of the framework by new
platforms and devices.
Some long-needed fixes to the core framework are here as well as new
features such as improved initialization of clocks from DT as well as
framework reentrancy for nested clock operations."
* tag 'clk-for-linus-3.10' of git://git.linaro.org/people/mturquette/linux: (44 commits)
clk: add clk_ignore_unused option to keep boot clocks on
clk: ux500: fix mismatched types
clk: vexpress: Add separate SP810 driver
clk: si5351: make clk-si5351 depend on CONFIG_OF
clk: export __clk_get_flags for modular clock providers
clk: vt8500: Missing breaks in vtwm_pll_round_rate/_set_rate.
clk: sunxi: Unify oscillator clock
clk: composite: allow fixed rates & fixed dividers
clk: composite: rename 'div' references to 'rate'
clk: add si5351 i2c common clock driver
clk: add device tree fixed-factor-clock binding support
clk: Properly handle notifier return values
clk: ux500: abx500: Define clock tree for ab850x
clk: ux500: Add support for sysctrl clocks
clk: mvebu: Fix valid value range checking for cpu_freq_select
clk: Fixup locking issues for clk_set_parent
clk: Fixup errorhandling for clk_set_parent
clk: Restructure code for __clk_reparent
clk: sunxi: drop an unnecesary kmalloc
clk: sunxi: drop CLK_IGNORE_UNUSED
...
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This is primarily useful when there's a driver that doesn't claim clocks
properly, but the bootloader leaves them on. It's not expected to be used
in normal cases, but for bringup and debug it's very useful to have the
option to not gate unclaimed clocks that are still on.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed up trivial merge issue]
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As reported by Rob Herring[1] there were some mismatched types between
drivers/clk/ux500/clk.h and the corresponding function definitions:
drivers/clk/ux500/clk-prcc.c:145:13: error: conflicting types for 'clk_reg_prcc_pclk'
drivers/clk/ux500/clk-prcc.c:155:13: error: conflicting types for 'clk_reg_prcc_kclk'
[1] http://article.gmane.org/gmane.linux.ports.arm.kernel/232246
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Rob Herring <robherring2@gmail.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
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Factor out the SP810 clocking code into a separate driver,
selecting better (faster) parent at clk_prepare() time.
This is to avoid problems with clocking infrastructure
initialisation order, in particular to avoid dependency
of fixed clock being initialized before SP810. It also
makes vexpress platform OF-based clock initialisation code
unnecessary.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: add .unprepare, FIXME comment, cleaned up code]
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Calling clk-si5351 driver non-OF ready was too early. This patch
makes clk-si5351 depend on CONFIG_OF again, until things get sorted out.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed spelling of Stephen's name]
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The common clock api provides some helpers for clk-providers but does
not export these helpers. This hinders clk-providers to be built as modules.
This patch adds __clk_get_flags() to the list of exported symbols.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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The case of PLL_TYPE_WM8750 in both these functions is missing a break
statement causing a fall-through to the default: case.
Insert the missing break statements.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This commit uses the new fixed-rate support on the composite clock to
unify osc24M_fixed and osc24M clocks, so it matches the actual hardware.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: replace clk_register_gatable_osc with a call to
clk_register_composite]
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The composite clock assumes that any clock implementing the .recalc_rate
callback will also implement .round_rate and .set_rate. This is not
always true; the basic fixed-rate clock will only implement .recalc_rate
and a fixed-divider clock may choose to implement .recalc_rate and
.round_rate but not .set_rate.
Fix this by conditionally registering .round_rate and .set_rate
callbacks based on the rate_ops passed in to clk_composite_register.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Rename all div_hw and div_ops related variables and functions to use
rate_hw, rate_ops, etc. This is to make the rate-change portion of the
composite clk implementation more generic. A patch following this one
will allow for fixed-rate clocks to reuse this infrastructure.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
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This patch adds a common clock driver for Silicon Labs Si5351a/b/c
i2c programmable clock generators. Currently, the driver does not
support VXCO feature of si5351b. Passing platform_data or DT bindings
selectively allows to overwrite stored Si5351 configuration which is
very helpful for clock generators with empty eeprom configuration.
Corresponding device tree binding documentation is also added.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Michal Bachraty <michal.bachraty@streamunlimited.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Add support for DT "fixed-factor-clock" binding to the common fixed
factor clock support.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Notifiers may return NOTIFY_(OK|DONE|STOP|BAD). The CCF uses an
inconsistent mix of checking against NOTIFY_STOP or NOTIFY_BAD.
This inconsistency leaves errors undetected in some cases:
clk_set_parent() calls __clk_speculate_rates(), which stops when it
hits a NOTIFIER_BAD (STOP is ignored), and passes this value back to the
caller.
clk_set_parent() compares this return value against NOTIFY_STOP only,
ignoring NOTIFY_BAD returns.
Use NOTIFY_STOP_MASK to detect a negative notifier return value and
document all four return value options.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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The patch setups the first version of the clock tree for ab850x, which
is used by u8500 platforms. Mainly sysctrl clocks are used.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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The abx500 sysctrl clocks are using the ab8500 sysctrl driver to
modify the clock hardware. Sysctrl clocks are represented by a
ab8500 sysctrl register and with a corresponding bitmask.
The sysctrl clocks are slow path clocks, which means clk_prepare
and clk_unprepare will be used to gate|ungate these clocks.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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cpu_freq_select is used as array subscript, thus the valid value range
is 0 ... ARRAY_SIZE() - 1.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed up trivial merge issues]
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Updating the clock tree topology must be protected with the spinlock
when doing clk_set_parent, otherwise we can not handle the migration
of the enable_count in a safe manner.
While issuing the .set_parent callback to make the clk-hw perform the
switch to the new parent, we can not hold the spinlock since it is must
be allowed to be slow path. This complicates error handling, but is still
possible to achieve.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Fixup the broken feature of allowing reparent of a clk to the
orhpan list and vice verse. When operating on a single-parent
clk, the .set_parent callback for the clk hw is optional to
implement, but for a multi-parent clk it is mandatory.
Moreover improve the errorhandling by verifying the prerequisites
before triggering clk notifiers. This will prevent unnecessary
rollback with ABORT_RATE_CHANGE.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Split __clk_reparent into three pieces, one for doing the actual
reparent for updating the clock tree topology, one for the
COMMON_CLK_DEBUG code and one for doing the rate recalculation.
This patch also makes it possible to hold the spinlock over the
update of the clock tree topology, which could not be done before
when both debugfs updates and clock rate updates was done within
the same function.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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clk_register will copy this information, so we can just use a normal
array and do one less dynamic allocation.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This flag was in place to prevent important clocks from getting gated
while they had no users. Now that the UART driver supports clocks
properly, we can drop this.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patchset adds DT support for all the AXI, AHB, APB0 and APB1
gates present on sunxi SoCs.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Dividers which have CLK_DIVIDER_ONE_BASED set have a redundant state,
being a divider value of zero. Some hardware implementations allow a
zero divider which simply doesn't alter the frequency. I.e. it acts like
a divide by one or bypassing the divider.
This flag is used to handle such HW in the clk-divider model.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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The use common of_clk_init() function simplifies the clock initialization
and adds handling of the DT "fixed-clock".
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed $SUBJECT to reflect correct file path]
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Reentrancy into the clock framework is necessary for clock operations
that result in nested calls to the clk api. A common example is a clock
that is prepared via an i2c transaction, such as a clock inside of a
discrete audio chip or a power management IC. The i2c subsystem itself
will use the clk api resulting in a deadlock:
clk_prepare(audio_clk)
i2c_transfer(..)
clk_prepare(i2c_controller_clk)
The ability to reenter the clock framework prevents this deadlock.
Other use cases exist such as allowing .set_rate callbacks to call
clk_set_parent to achieve the best rate, or to save power in certain
configurations. Yet another example is performing pinctrl operations
from a clk_ops callback. Calls into the pinctrl subsystem may call
clk_{un}prepare on an unrelated clock. Allowing for nested calls to
reenter the clock framework enables both of these use cases.
Reentrancy is implemented by two global pointers that track the owner
currently holding a global lock. One pointer tracks the owner during
sleepable, mutex-protected operations and the other one tracks the owner
during non-interruptible, spinlock-protected operations.
When the clk framework is entered we try to hold the global lock. If it
is held we compare the current task against the current owner; a match
implies a nested call and we reenter. If the values do not match then
we block on the lock until it is released.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
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Create locking helpers for the global mutex and global spinlock. The
definitions of these helpers will be expanded upon in the next patch
which introduces reentrancy into the locking scheme.
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
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Include zynq clk header where init function is declared.
It removes this sparse warning:
drivers/clk/clk-zynq.c:373:13: warning: symbol
'xilinx_zynq_clocks_init' was not declared. Should it be static?
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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During the introduction of the Allwinner SoC platforms, sunxi was
initially meant as a generic name for all the variants of the Allwinner
SoC.
It was ok at the time of the support of only the A10 and A13 that
look pretty much the same; but it's beginning to be troublesome with
the future addition of the Allwinner A31 (sun6i) that is quite
different, and would introduce some weird logic, where sunxi would
actually mean in some case sun4i and sun5i but without sun6i...
Moreover, it makes the compatible strings naming scheme not consistent
with other architectures, where usually for this kind of compability, we
just use the oldest SoC name that has this IP, so let's do just this.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This commit implements the base CPU clocks for sunxi devices. It has
been tested using a slightly modified cpufreq driver from the
linux-sunxi 3.0 tree.
Additionally, document the new bindings introduced by this patch.
Idling:
/ # cat /sys/kernel/debug/clk/clk_summary
clock enable_cnt prepare_cnt rate
---------------------------------------------------------------------
osc32k 0 0 32768
osc24M_fixed 0 0 24000000
osc24M 0 0 24000000
apb1_mux 0 0 24000000
apb1 0 0 24000000
pll1 0 0 60000000
cpu 0 0 60000000
axi 0 0 60000000
ahb 0 0 60000000
apb0 0 0 30000000
dummy 0 0 0
After "yes >/dev/null &":
/ # cat /sys/kernel/debug/clk/clk_summary
clock enable_cnt prepare_cnt rate
---------------------------------------------------------------------
osc32k 0 0 32768
osc24M_fixed 0 0 24000000
osc24M 0 0 24000000
apb1_mux 0 0 24000000
apb1 0 0 24000000
pll1 0 0 1008000000
cpu 0 0 1008000000
axi 0 0 336000000
ahb 0 0 168000000
apb0 0 0 84000000
dummy 0 0 0
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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In clk_reg_prcmu(), clk->hw.init field is assigned with a
reference local to clk_reg_prcmu() function.
This patch replaces references to clk->hw.init with calls
to __clk_get_name when called after clock registration.
This patch applies on top of v3.9-rc4.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: resolved trivial merge issues]
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Not all clocks are required to be decomposed into basic clock
types but at the same time want to use the functionality
provided by these basic clock types instead of duplicating.
For example, Tegra SoC has ~100 clocks which can be decomposed
into Mux -> Div -> Gate clock types making the clock count to
~300. Also, parent change operation can not be performed on gate
clock which forces to use mux clock in driver if want to change
the parent.
Instead aggregate the basic clock types functionality into one
clock and just use this clock for all operations. This clock
type re-uses the functionality of basic clock types and not
limited to basic clock types but any hardware-specific
implementation.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Add a table lookup feature to the mux clock. Also allow arbitrary masks
instead of the width. This will be used by some clocks on Tegra114. Also
adapt the tegra periph clk because it uses struct clk_mux directly.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Return type of function clk_propagate_rate_change is a pointer.
But 0 was being returned. Change it to NULL.
Silences the following warning:
drivers/clk/clk.c:977:24: warning: Using plain integer as NULL pointer
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Pankaj Jangra <jangra.pankaj9@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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