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path: root/drivers/clk/sunxi
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| * clk: sunxi: Support factor clocks with N factor starting not from 0Chen-Yu Tsai2014-07-04
| * clk: sunxi: move "ahb_sdram" to protected clock listChen-Yu Tsai2014-07-04
| * clk: sunxi: register clock gates with clkdevChen-Yu Tsai2014-07-04
* | clk: sunxi: fix devm_ioremap_resource error detection codeHimangi Saraogi2014-07-02
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* clk: sunxi: add PRCM (Power/Reset/Clock Management) clks supportBoris BREZILLON2014-06-11
* clk: sun6i: Protect SDRAM gating bitMaxime Ripard2014-06-11
* clk: sun6i: Protect CPU clockMaxime Ripard2014-06-11
* clk: sunxi: Rework clock protection codeMaxime Ripard2014-06-11
* clk: sunxi: Move the GMAC clock to a file of its ownMaxime Ripard2014-06-11
* clk: sunxi: Move the 24M oscillator to a file of its ownMaxime Ripard2014-06-11
* clk: sunxi: Remove calls to clk_putMaxime Ripard2014-06-11
* clk: sunxi: Implement A31 USB clockMaxime Ripard2014-06-11
* Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds2014-06-07
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| * clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clkHans de Goede2014-05-14
| * clk: sunxi: Implement MMC phase controlEmilio López2014-05-05
| * clk: sunxi: factors: automatic reparenting supportEmilio López2014-05-05
* | clk: sunxi: fix function type for CLK_OF_DECLARERob Herring2014-05-20
* | clk: sunxi: avoid double DT matchingRob Herring2014-05-20
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* clk: sunxi: fix thinko in commentEmilio López2014-03-19
* clk: sunxi: fix some calculationsEmilio López2014-03-19
* clk: sunxi: fix A20 PLL4 calculationEmilio López2014-03-19
* clk: sunxi: Add new clock compatiblesMaxime Ripard2014-02-18
* clk: sunxi: Add Allwinner A20/A31 GMAC clock unitChen-Yu Tsai2014-02-18
* clk: sunxi: Add support for PLL6 on the A31Maxime Ripard2014-02-18
* clk: sunxi: Add USB clock register defintionsRoman Byshko2014-02-18
* clk: sunxi: Add support for USB clock-register reset bitsHans de Goede2014-02-18
* clk: sunxi: get divs parent clock name from parent factor clockChen-Yu Tsai2014-02-02
* clk: sunxi: add names for pll5, pll6 parent clocks to factors_dataChen-Yu Tsai2014-02-02
* clk: sunxi: add clock-output-names dt property supportChen-Yu Tsai2014-02-02
* clk: sunxi: fix overflow when setting up divided factorsEmilio López2014-01-27
* clk: sunxi: Allwinner A20 output clock supportChen-Yu Tsai2013-12-28
* clk: sunxi: support better factor DT nodesEmilio López2013-12-28
* clk: sunxi: mod0 supportEmilio López2013-12-28
* clk: sunxi: add PLL5 and PLL6 supportEmilio López2013-12-28
* clk: sunxi: make factors_clk_setup return the clock it registersEmilio López2013-12-28
* clk: sunxi: add gating support to PLL1Emilio López2013-12-28
* clk: sunxi: clean the magic number of mux parentsEmilio López2013-12-28
* clk: sunxi: register factors clocks behind compositeEmilio López2013-12-28
* Merge tag 'sunxi-clk-for-3.13' of https://github.com/mripard/linux into clk-n...Mike Turquette2013-12-01
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| * drivers: clk: sunxi: Fix memory leakage in clk-sunxi.cVictor N. Ramos Mello2013-11-10
| * clk: sunxi: protect core clocks from accidental shutdownEmilio López2013-11-10
| * clk: sunxi: factors: clear variables before using themEmilio López2013-11-10
| * clk: sunxi: factors: fix off-by-one masksEmilio López2013-11-10
* | clk: sunxi: declare OF clock providerSebastian Hesselbarth2013-09-29
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* clk: sunxi: Fix incorrect placement of __initconstSachin Kamat2013-08-27
* clk: sunxi: Add Allwinner A20 gatesMaxime Ripard2013-08-26
* clk: sunxi: Add A31 clocks supportMaxime Ripard2013-08-26
* clk: sunxi: Allow to specify the divider width from the dividers dataMaxime Ripard2013-08-26
* clk: sunxi: Rename the structure to prepare the addition of sun6iMaxime Ripard2013-08-26
* clk: sunxi: fix initialization of basic clocksEmilio López2013-08-26
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-05 19:38:47 -0400