litmus-rt.git - The LITMUS^RT kernel.

	Commit message (Collapse)	Author	Age
*	drm/i915,agp/intel: Add second set of PCI-IDs for B43	Chris Wilson	2010-09-17
\| \| \| \| \| \| \| \| \| \|	There is a second revision of B43 (a desktop gen4 part) floating around, functionally equivalent to the original B43, so simply add the new PCI-IDs. Bugzilla: https://bugs.freedesktop.org/show_bugs.cgi?id=30221 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
*	intel_agp,i915: Add more sandybridge graphics device ids	Zhenyu Wang	2010-09-07
\| \| \| \| \| \| \| \| \| \|	New pci ids for GT2 and GT2+ on desktop and mobile sandybridge, and graphics device ids for server sandybridge. Also rename original ids string to reflect GT1 version. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
*	agp/intel: use #ifdef idiom for intel-agp.h	Zhenyu Wang	2010-09-07
\| \| \| \| \| \|	Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
*	drm/i915,intel_agp: Add support for Sandybridge D0	Zhenyu Wang	2010-08-22
\| \| \| \| \|	Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
*	agp/intel: Add actual definitions of the Sandybridge PTE caching bits.	Zhenyu Wang	2010-08-01
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*	agp/intel: introduce intel-agp.h header file	Daniel Vetter	2010-04-18
	Intel definitions have spilled into agp.h. Create a header file for them and also include it in efficion-agp.c 'cause it needs a few of them. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>