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* libata: bump versionsJeff Garzik2007-05-21
| | | | Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: disable 64bit dma on sb600Tejun Heo2007-05-21
| | | | | | | SB600 claims it can do 64bit DMA but it can't. Disable it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata-acpi: add ATA_FLAG_ACPI_SATA port flagTejun Heo2007-05-16
| | | | | | | | | | | | Whether a controller needs IDE or SATA ACPI hierarchy is determined by the programming interface of the controller not by whether the controller is SATA or PATA, or it supports slave device or not. This patch adds ATA_FLAG_ACPI_SATA port flags which tells libata-acpi that the port needs SATA ACPI nodes, and sets the flag for ahci and sata_sil24. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* add the ATI SB700 SATA controller device id to AHCI pci tableHenry Su2007-05-11
| | | | | | | | | | | Add the device ID to AHCI pci table for ATI SB700 SATA controller, the subsequent chipset of SB600. Signed-off-by: henry su<henry.su@amd.com> Cc: Jeff Garzik <jeff@garzik.org> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: reimplement suspend/resume support using sdev->manage_start_stopTejun Heo2007-05-11
| | | | | | | | | | | | | | | | | | | | | | | Reimplement suspend/resume support using sdev->manage_start_stop. * Device suspend/resume is now SCSI layer's responsibility and the code is simplified a lot. * DPM is dropped. This also simplifies code a lot. Suspend/resume status is port-wide now. * ata_scsi_device_suspend/resume() and ata_dev_ready() removed. * Resume now has to wait for disk to spin up before proceeding. I couldn't find easy way out as libata is in EH waiting for the disk to be ready and sd is waiting for EH to complete to issue START_STOP. * sdev->manage_start_stop is set to 1 in ata_scsi_slave_config(). This fixes spindown on shutdown and suspend-to-disk. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: improve 0xff status handlingTejun Heo2007-05-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For PATA, 0xff status indicates empty port. For SATA, it depends on how the controller emulates status register. On some controllers, 0xff is used to represent broken link or certain stage during reset. libata currently deals SATA the same. This hasn't caused any problem because problematic situations usually only occur after hotplug or other link disruption events and libata blindly waited for the device to spin up and settle after hotplug giving the link and device whatever time to go through those stages. libata is going to replace unconditional spinup wait with generic timed sequence of resets, so not only getting 0xff handling right for SATA is, well, the right thing to do, it's much more important now. This patch makes the following changes. * Make ata_bus_softreset() return -ENODEV if any of its wait fails due to 0xff status. * Fail soft/hardreset if status wait returns -ENODEV indicating 0xff status while SStatus says the link is online. e.g. Reset fails if status is 0xff after reset when SStatus reports the linke is online. If SCR registers are not available, everything is the same as before. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: add deadline support to prereset and reset methodsTejun Heo2007-05-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add @deadline to prereset and reset methods and make them honor it. ata_wait_ready() which directly takes @deadline is implemented to be used as the wait function. This patch is in preparation for EH timing improvements. * ata_wait_ready() never does busy sleep. It's only used from EH and no wait in EH is that urgent. This function also prints 'be patient' message automatically after 5 secs of waiting if more than 3 secs is remaining till deadline. * ata_bus_post_reset() now fails with error code if any of its wait fails. This is important because earlier reset tries will have shorter timeout than the spec requires. If a device fails to respond before the short timeout, reset should be retried with longer timeout rather than silently ignoring the device. There are three behavior differences. 1. Timeout is applied to both devices at once, not separately. This is more consistent with what the spec says. 2. When a device passes devchk but fails to become ready before deadline. Previouly, post_reset would just succeed and let device classification remove the device. New code fails the reset thus causing reset retry. After a few times, EH will give up disabling the port. 3. When slave device passes devchk but fails to become accessible (TF-wise) after reset. Original code disables dev1 after 30s timeout and continues as if the device doesn't exist, while the patched code fails reset. When this happens, new code fails reset on whole port rather than proceeding with only the primary device. If the failing device is suffering transient problems, new code retries reset which is a better behavior. If the failing device is actually broken, the net effect is identical to it, but not to the other device sharing the channel. In the previous code, reset would have succeeded after 30s thus detecting the working one. In the new code, reset fails and whole port gets disabled. IMO, it's a pathological case anyway (broken device sharing bus with working one) and doesn't really matter. * ata_bus_softreset() is changed to return error code from ata_bus_post_reset(). It used to return 0 unconditionally. * Spin up waiting is to be removed and not converted to honor deadline. * To be on the safe side, deadline is set to 40s for the time being. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: consolidate common port flagsTejun Heo2007-04-28
| | | | | | | Consolidate common port flags into AHCI_FLAG_COMMON. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: convert the remaining SATA drivers to new init modelTejun Heo2007-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | Convert ahci, sata_sil, sata_sil24, sata_svw, sata_qstor, sata_mv, sata_sx4, sata_vsc and sata_inic162x to new init model. Now that host and ap are available during intialization, functions are converted to take either host or ap instead of low level parameters which were inevitable for functions shared between init and other paths. This simplifies code quite a bit. * init_one()'s now follow more consistent init order * ahci_setup_port() and ahci_host_init() collapsed into ahci_init_one() for init order consistency * sata_vsc uses port_info instead of setting fields manually * in sata_svw, k2_board_info converted to port_info (info is now in port flags). port number is honored now. Tested on ICH7/8 AHCI, jmb360, sil3112, 3114, 3124 and 3132. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: add PCI ID for new VIA chipTejun Heo2007-04-28
| | | | | | | | Add PCI ID for new VIA chip. Original patch is from Maarten Vanraes. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Maarten Vanraes <maarten.vanraes@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci.c: remove non-existing SB600 raid id (re-send)Conke Hu2007-04-28
| | | | | | | | | | SB600 RAID and SB600 SATA is the same controller and share the same PCI ID 0x4380. There is no such PCI ID 0x4381. Signed-off-by: Conke Hu <conke.hu@gmail.com> --------- Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: improve AC_ERR_DEV handling for ->post_internal_cmdTejun Heo2007-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ->post_internal_cmd is simplified EH for internal commands. Its primary mission is to stop the controller such that no rogue memory access or other activities occur after the internal command is released. It may provide error diagnostics by setting qc->err_mask but this hasn't been a requirement. To ignore SETXFER failure for CFA devices, libata needs to know whether a command was failed by the device or for any other reason. ie. internal command needs to get AC_ERR_DEV right. This patch makes the following changes to AC_ERR_DEV handling and ->post_internal_cmd semantics to accomodate this need and simplify callback implementation. 1. As long as the correct bits in the result TF registers are set, there is no need to set AC_ERR_DEV explicitly. libata EH core takes care of that for both normal and internal commands. 2. The only requirement for ->post_internal_cmd() is to put the controller into quiescent state. It needs not to set any err_mask. 3. ata_exec_internal_sg() performs minimal error analysis such that AC_ERR_DEV is automatically set as long as result_tf is filled correctly. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: move port_map handling to ahci_save_initial_config()Tejun Heo2007-04-28
| | | | | | | | | | | Move cross checking between port_map and cap.n_ports into ahci_save_initial_config(). After save_initial_config is done, hpriv->port_map is always setup properly. Tested on JMB363, ICH7 and ICH8 (with dummy ports). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: implement ata_save/restore_initial_config()Tejun Heo2007-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several registers which describe how the controller is configured. These registers are sometimes implemented as r/w registers which are configured by firmware and get cleared on controller reset or after suspend/resume cycle. ahci saved and restored those values inside ahci_reset_controller() which is a bit messy and doesn't work over suspend/resume cycle. This patch implements ahci_save/restore_initial_config(). The save function is called during driver initialization and saves cap and port_map to hpriv. The restore function is called after the controller is reset to restore the initial values. Sometimes the initial firmware values are inconsistent and need to be fixed up. This is handled by ahci_save_initial_config(). For this, there are two versions of saved registers. One to write back to the hardware register, the other to use during driver operation. This is necessary to keep ahci's behavior unchanged (write back fixed up port_map while keeping cap as-is). This patch makes ahci save the register values once before the first controller reset, not after it's been reset. Also, the same stored values are used written back after each reset, so the register values are properly recovered after suspend/resume cycle. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci.c: walkaround for SB600 SATA internal error issueConke Hu2007-03-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a HW issue in ATI SB600 SATA that PxSERR.E should not be set on some conditions, for example, when there is no media in SATA CD/DVD drive or media is not ready, AHCI controller fails to execute ATAPI commands and reports PORT_IRQ_TF_ERR, but ATI SB600 SATA controller sets PxSERR.E at the same time, which is not necessary. This patch is just to ignore the INTERNAL ERROR in such case. Without this patch, ahci error handler will report many errors as below: ----------- cut from dmesg ----------- ata9: soft resetting port ata9: SATA link up 1.5 Gbps (SStatus 113 SControl 300) ata9.00: configured for UDMA/33 ata9: EH complete ata9.00: exception Emask 0x40 SAct 0x0 SErr 0x800 action 0x2 ata9.00: (irq_stat 0x40000001) ata9.00: cmd a0/00:00:00:00:20/00:00:00:00:00/a0 tag 0 cdb 0x0 data 0 res 51/24:03:00:00:20/00:00:00:00:00/a0 Emask 0x40 (internal error) ata9: soft resetting port ata9: SATA link up 1.5 Gbps (SStatus 113 SControl 300) ata9.00: configured for UDMA/33 ata9: EH complete ata9.00: exception Emask 0x40 SAct 0x0 SErr 0x800 action 0x2 ata9.00: (irq_stat 0x40000001) ata9.00: cmd a0/01:00:00:00:00/00:00:00:00:00/a0 tag 0 cdb 0x43 data 12 in res 51/24:03:00:00:00/00:00:00:00:00/a0 Emask 0x40 (internal error) -------- end cut --------- Signed-off-by: Conke Hu <conke.hu@amd.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: RAID mode SATA patch for Intel ICH9MJason Gaston2007-03-06
| | | | | | | This patch adds the Intel ICH9M RAID controller DID for SATA support. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: add missing CONFIG_PM in LLDsTejun Heo2007-03-02
| | | | | | | | Add missing #ifdef CONFIG_PM conditionals around all PM related parts in libata LLDs. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: improve spurious SDB FIS handlingTejun Heo2007-03-01
| | | | | | | | | | Spurious SDB FIS during NCQ might not contain spurious completions. It could be spurious TF update or invalid async notification. Treat as HSM violation iff a spurious SDB FIS contains spurious completions; otherwise, just whine once about it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci/pata_jmicron: match class not function numberTejun Heo2007-03-01
| | | | | | | | | | | | | | Make jmiron_ata quirk update pdev->class after programming the device and update ahci and pata_jmicron such that they match class code instead of checking function number manually. For ahci, it matches for vendor and class. For pata_jmicron, it matches vendor, device and class as IDE class isn't as well defined as AHCI class. This makes jmicron device matching more conventional and script friendly. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [libata] bump versionsJeff Garzik2007-02-26
| | | | | | Bump versions based on changes submitted during 2.6.21 merge window. Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: consider SDB FIS containing spurious NCQ completions HSM violation ↵Tejun Heo2007-02-23
| | | | | | | | | | | | | | | | | | (regenerated) SDB FIS containing spurious NCQ completions is a clear protocol violation. Currently, only some Maxtors with early firmware revisions are showing this problem. Those firmwares have other NCQ related problems including buggy NCQ error reporting and occasional lock up after NCQ errors. Consider spurious NCQ completions HSM violation and freeze the port after it. EH will turn off NCQ after this happens several times. Eventually drives which show this behavior should be blacklisted for NCQ. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] remove many unneeded #includes of sched.hTim Schmielau2007-02-14
| | | | | | | | | | | | | | | | | | | | | | | | After Al Viro (finally) succeeded in removing the sched.h #include in module.h recently, it makes sense again to remove other superfluous sched.h includes. There are quite a lot of files which include it but don't actually need anything defined in there. Presumably these includes were once needed for macros that used to live in sched.h, but moved to other header files in the course of cleaning it up. To ease the pain, this time I did not fiddle with any header files and only removed #includes from .c-files, which tend to cause less trouble. Compile tested against 2.6.20-rc2 and 2.6.20-rc2-mm2 (with offsets) on alpha, arm, i386, ia64, mips, powerpc, and x86_64 with allnoconfig, defconfig, allmodconfig, and allyesconfig as well as a few randconfigs on x86_64 and all configs in arch/arm/configs on arm. I also checked that no new warnings were introduced by the patch (actually, some warnings are removed that were emitted by unnecessarily included header files). Signed-off-by: Tim Schmielau <tim@physik3.uni-rostock.de> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* libata: add another IRQ calls (libata drivers)Akira Iguchi2007-02-09
| | | | | | | | | | | | | | | | | | This patch is against each libata driver. Two IRQ calls are added in ata_port_operations. - irq_on() is used to enable interrupts. - irq_ack() is used to acknowledge a device interrupt. In most drivers, ata_irq_on() and ata_irq_ack() are used for irq_on and irq_ack respectively. In some drivers (ex: ahci, sata_sil24) which cannot use them as is, ata_dummy_irq_on() and ata_dummy_irq_ack() are used. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Akira Iguchi <akira2.iguchi@toshiba.co.jp> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: convert to iomapTejun Heo2007-02-09
| | | | | | | | | | | | | | | | Convert libata core layer and LLDs to use iomap. * managed iomap is used. Pointer to pcim_iomap_table() is cached at host->iomap and used through out LLDs. This basically replaces host->mmio_base. * if possible, pcim_iomap_regions() is used Most iomap operation conversions are taken from Jeff Garzik <jgarzik@pobox.com>'s iomap branch. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: update libata LLDs to use devresTejun Heo2007-02-09
| | | | | | | | | | | | | | | | | Update libata LLDs to use devres. Core layer is already converted to support managed LLDs. This patch simplifies initialization and fixes many resource related bugs in init failure and detach path. For example, all converted drivers now handle ata_device_add() failure gracefully without excessive resource rollback code. As most resources are released automatically on driver detach, many drivers don't need or can do with much simpler ->{port|host}_stop(). In general, stop callbacks are need iff port or host needs to be given commands to shut it down. Note that freezing is enough in many cases and ports are automatically frozen before being detached. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: update libata core layer to use devresTejun Heo2007-02-09
| | | | | | | | | | | | | | | | | | | | | | Update libata core layer to use devres. * ata_device_add() acquires all resources in managed mode. * ata_host is allocated as devres associated with ata_host_release. * Port attached status is handled as devres associated with ata_host_attach_release(). * Initialization failure and host removal is handedl by releasing devres group. * Except for ata_scsi_release() removal, LLD interface remains the same. Some functions use hacky is_managed test to support both managed and unmanaged devices. These will go away once all LLDs are updated to use devres. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: implement ata_host_detach()Tejun Heo2007-02-09
| | | | | | | | | | Implement ata_host_detach() which calls ata_port_detach() for each port in the host and export it. ata_port_detach() is now internal and thus un-exported. ata_host_detach() will be used as the 'deregister from libata layer' function after devres conversion. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* libata: handle pci_enable_device() failure while resumingTejun Heo2007-02-09
| | | | | | | | | Handle pci_enable_device() failure while resuming. This patch kills the "ignoring return value of 'pci_enable_device'" warning message and propagates __must_check through ata_pci_device_do_resume(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: Remove jmicron fixupAlan2007-02-09
| | | | | | | | | The AHCI set up is handled properly along with the other bits in the JMICRON quirk. Remove the code whacking it in ahci.c as its un-needed and also blindly fiddles with bits it doesn't own. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* Add pci class code for SATA & AHCI, and replace some magic numbers.Conke Hu2007-02-09
| | | | | Signed-off-by: Conke Hu <conke.hu@amd.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: trivial endianness annotationsAl Viro2007-02-09
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* ahci: port_no should be used when clearing IRQ in ahci_thaw()Tejun Heo2007-01-27
| | | | | | | | | | | | ap->id is logcial port ID which is unique among all ATA ports and doesn't have anything to do with hardware port index. ap->port_no is the hardware port index and thus should be used when clearing IRQ mask in ahci_thaw(). This problem has been spotted by Jeff Garzik <jgarzik@pobox.com>. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: use 0x80 as wait stat value instead of 0xffTejun Heo2007-01-26
| | | | | | | | | | | | | | | | Before hardreset, ahci initialized stat part of received FIS area to 0xff to wait for the first D2H Reg FIS which would change the value to device ready state. This used to work but now libata considers status value of 0xff as device not present making this wait prone to failure. This patch makes ahci use 0x80 for the wait stat value instead of 0xff to fix the above problem. Signed-off-by: Tejun Heo <htejun@gmail.com> drivers/ata/ahci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: fix endianness in spurious interrupt messageTejun Heo2007-01-26
| | | | | | | Fix endianness in spurious interrupt message. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: improve and limit spurious interrupt messages, take#3Tejun Heo2007-01-25
| | | | | | | | | | | | We're still seeing a lot of issues with NCQ implementation in drive firmwares. Sprious FISes during NCQ command phase occur on many drives and some of them seem potentially dangerous (at least to me). Until we find the solution, spurious messages can give us more info. Improve and limit them such that more info can be reported while not disturbing users too much. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: don't enter slumber on power downTejun Heo2007-01-24
| | | | | | | | | | | | | | | | | | | | | | | | Some ATA/ATAPI devices act weirdly after the link is put into slumber mode. Some hang completely requiring physical power removal while others fail to wake up till the link is hardreset a couple of times. The addition of slumber on power down was never driven by real need. It just followed what ahci spec said literally. The spec itself seems faulty in that it doesn't consider devices (not controllers) which don't support link powersaving mode. Theory never matches reality when it comes to dark allys of cheap ATA/ATAPI world. It's just unrealistic to expect vendors to test rarely used link powersaving feature rigorously. This patch makes ahci more friendly to the coldness of reality. This shouldn't have any negative effect - when suspend operation succeeds, we power off the whole machine; otherwise, we wake up everything. I can't see any reason to be so elaborate with powering down the link in the first place. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* ahci: make ULi M5288 ignore interface fatal error bitTejun Heo2007-01-24
| | | | | | | | | | As with JMicron controllers, ULi M5288 sets interface fatal error bit on device error including ATAPI CC. This makes libata hardreset the port on ATAPI CC thus making it impossible to use. Ignore interface fatal error bit on ULi M5288. This fixes bugzilla bug #7837. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [libata] Move some PCI IDs from sata_nv to ahciPeer Chen2006-12-20
| | | | | | | | | The content of memory map io of BAR5 have been change from MCP65 then sata_nv can't work fine on the platform based on MCP65 and MCP67, so move their IDs from sata_nv.c to ahci.c. Signed-off-by: Peer Chen <pchen@nvidia.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: do not mangle saved HOST_CAP while resetting controllerTejun Heo2006-12-16
| | | | | | | | | | | | Do not mangle with HOST_CAP while resetting controller. The code is there for a historical reason. The mangling breaks controller feature detection and 0 PORTS_IMPL workaround code. This problem was spotted by Manoj Kasichainula. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Manoj Kasichainula <manoj@io.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: do not powerdown during initializationTejun Heo2006-12-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ahci_init_controller() calls ahci_deinit_port() to make sure the controller is stopped before initializing the controller. In turn, ahci_deinit_port() invokes ahci_power_down() to power down the port. If the controller supports slumber mode, the link is put into it. Unfortunately, some devices don't implement link powersaving mode properly and show erratic behavior after link is put into slumber mode. For example, HL-DT-ST DVD-RAM GSA-H30N completely locks up on slumber transition and can only be recovered with the *REAL* hard reset - power removal and reapply. Note that this makes the first probing reset different from all others. If the above dvd-ram is hotplugged after ahci is initialized, no problem occurs because ahci is already fully initialized with phy powered up. So, this might also be the reason for other weird AHCI initial probing abnormalities. This patch moves power up/down out of port init/deinit and call them only when needed. Power down is now called only when suspending. As system suspend usually involves powering down 12v for storage devices, this shouldn't cause problem even if the attached device doesn't support slumber mode. However, in partial power management and suspend failure cases, devices might lock up after suspend attempt. I thought about removing transition to slumber mode altogether but ahci spec mandates it before HBA D3 state transition. Blacklisting such devices might be the solution. Signed-off-by: Tejun Heo <htejun@gmail.com>
* [PATCH] ahci: honor PORTS_IMPL on ICH8sTejun Heo2006-12-01
| | | | | | | | | | | | | | | | Some ICH8s use non-linear port mapping. ahci driver didn't use to honor PORTS_IMPL and this made ports after hole nonfunctional. This patch makes ahci mark those ports as dummy and properly initialize all the implemented ports after the dummies. As it's unknown whether other AHCIs implement PORTS_IMPL register properly, new board id board_ahci_pi is added and selectively applied to ICH8s. All other AHCIs continue to use linear mapping regardless of PORTS_IMPL value. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Robin H. Johnson <robbat2@gentoo.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: preserve PORTS_IMPL over host resetsTejun Heo2006-12-01
| | | | | | | | | | Instead of writing 0xf blindly, preserve the content of write-once PORTS_IMPL register over host resets. This patch is taken from Jeff Garzik's AHCI init update patch. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [libata] ahci: Match PCI class code for AHCIJeff Garzik2006-12-01
| | | | Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: update ahci-vt8251 reset sequenceTejun Heo2006-12-01
| | | | | | | | | | | | | | | | | ahci-vt8251 * requires hardreset after PHY status change * doesn't clear BSY on signature FIS after hardreset * needs SError cleared for the port to operate after hardreset This patch implements ahci_vt8251_hardreset() and sets ATA_FLAG_HRST_TO_RESUME to handle the above behaviors. This fixes EH including hotplug on vt8251. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: kill AHCI_FLAG_RESET_NEEDS_CLOTejun Heo2006-12-01
| | | | | | | | | Now that ahci_softreset() is fixed to automatically perform CLO if BSY/DRQ is set on entry, AHCI_FLAG_RESET_NEEDS_CLO is redundant. Kill it. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: ignore PORT_IRQ_IF_ERR on JMB controllersTejun Heo2006-11-29
| | | | | | | | | | | | | | | JMicron AHCI controllers set PORT_IRQ_IF_ERR on device errors. The IRQ status bit indicates interface error or protocol mismatch and ahci driver interprets it into AC_ERR_ATA_BUS. So, whenever an ATAPI device raises check condition, ahci interprets it as ATA bus error and thus resets it which, in turn, raises check condition thus creating a reset loop and rendering the device unuseable. This patch makes JMB controllers ignore PORT_IRQ_IF_ERR when interpreting error condition. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Justin Tsai <justin@jmicron.com>
* [PATCH] ahci: AHCI mode SATA patch for Intel ICH9Jason Gaston2006-11-28
| | | | | | | This patch adds the Intel ICH9 AHCI controller DID's for SATA support. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [libata] Add support for AHCI controllers of MCP67.Peer Chen2006-11-02
| | | | | Signed-off-by: Peer Chen <pchen@nvidia.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: fix status register check in ahci_softresetTejun Heo2006-11-01
| | | | | | | | | | | | | | ahci_softreset() used to use ahci_tf_read() which reads D2H_REG area to check for the Status register. However, this area is zeroed on initialization and not set by initial signature FIS. Replace it with ahci_check_status(). This bug prevented CLO code from being activated whenever BSY and/or DRQ is set prior to softreset. This fix makes AHCI_FLAG_RESET_NEEDS_CLO flag redundant. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ahci: readability tweakAlan Cox2006-10-21
| | | | | Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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