| Commit message (Collapse) | Author | Age |
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Pull arm-soc soc updates from Olof Johansson:
"This is the second batch of SoC updates for the 3.6 merge window,
containing parts that arrived close to the merge window opening and
thus needed to sit in linux-next for a while.
Most contents is updates of Renesas shmobile, with a couple of Samsung
Exynos patches in the mix."
* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
ARM: S3C64XX: Add header file protection macros in pm-core.h
[CPUFREQ] EXYNOS5250: Add support max 1.7GHz for EXYNOS5250
ARM: EXYNOS: Add G2D related clock entries for SMDK4X12
ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file
ARM: shmobile: Fix build problem in pm-sh7372.c for unusual .config
ARM: shmobile: Take cpuidle dependencies into account correctly
ARM: mach-shmobile: sh7377 generic board support via DT
ARM: mach-shmobile: r8a7740 generic board support via DT
ARM: shmobile: sh7372: completely switch over to using pm-rmobile API
ARM: shmobile: ap4evb: switch to using pm-rmobile API
ARM: shmobile: mackerel: switch to using pm-rmobile API
ARM: shmobile: sh7372: add pm-rmobile domain support
ARM: shmobile: r8a7740: add A4LC pm domain support
ARM: shmobile: r8a7740: add A3SP pm domain support
ARM: shmobile: r8a7740: add A4S pm domain support
ARM: shmobile: r8a7740: fixup: MSEL1CR 7bit control
ARM: shmobile: soc-core: add R-mobile PM domain common APIs
ARM: shmobile: sh7372 A3SM CPUIdle support
ARM: shmobile: Use INTCA with sh7372 A3SM power domain
ARM: mach-shmobile: Convert sh_clk_mstp32_register to sh_clk_mstp_register
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From Kukjin Kim <kgene.kim@samsung.com>:
The updating cpufreq for 1.7GHz of exynos5250 has been included in samsung
tree because Rafael thought it was more related in samsung platform and
I agreed. And others are adding G2D clock for exynos4x12 Socs.
* samsung/devel-2:
ARM: S3C64XX: Add header file protection macros in pm-core.h
[CPUFREQ] EXYNOS5250: Add support max 1.7GHz for EXYNOS5250
ARM: EXYNOS: Add G2D related clock entries for SMDK4X12
ARM: EXYNOS: Move G2D clock entries to clock-exynos4210.c file
Originally from
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/devel-samsung-2
but rebased to split out the defconfig changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Adds header file protection macros.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Adds G2D related clock entries for SMDK4X12 boards.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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G2D clock registers are different in EXYNOS4210 and EXYNOS4X12 SoCs.
Hence moving the SoC specific G2D clock entries from common clock file
(clock-exynos4.c) to EXYNOS4210 specific clock file (clock-exynos4210.c).
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Linux 3.5-rc7
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* renesas-sh7377:
ARM: mach-shmobile: sh7377 generic board support via DT
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Add generic DT board support for the sh7377 SoC.
SCIF serial ports and timers are kept as regular
platform devices. Other on-chip and on-board devices
should be configured via the device tree.
At this point there is no interrupt controller support
in place but such code will be added over time when
proper IRQ domain support has been added to INTC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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* renesas-sh7372:
ARM: shmobile: Fix build problem in pm-sh7372.c for unusual .config
ARM: shmobile: Take cpuidle dependencies into account correctly
ARM: shmobile: sh7372: completely switch over to using pm-rmobile API
ARM: shmobile: ap4evb: switch to using pm-rmobile API
ARM: shmobile: mackerel: switch to using pm-rmobile API
ARM: shmobile: sh7372: add pm-rmobile domain support
ARM: shmobile: sh7372 A3SM CPUIdle support
ARM: shmobile: Use INTCA with sh7372 A3SM power domain
ARM: shmobile: use common DMAEngine definitions on sh7372
ARM: shmobile: sh7372: remove unused sh7372_a3sp_init() on !CONFIG_PM
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If neither CONFIG_SUSPEND nor CONFIG_CPU_IDLE is set in the kernel
configuration file, build error occurs in
arch/arm/mach-shmobile/pm-sh7372.c.
Fix it by rearranging #ifdefs in that file to make the
definition of sh7372_suspend_init() depend only on
CONFIG_SUSPEND and the definition of sh7372_cpuidle_init()
depend only on CONFIG_CPU_IDLE.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Magnus Damm <damm@opensource.se>
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The sh7372's cpuidle code uses cpu_suspend() and cpu_resume() in
its implementation of the .enter() callback for deeper C-states, so
make ARCH_SH7372 select ARM_CPU_SUSPEND if CPU_IDLE is set to satisfy
all of the build dependencies (it has to be selected for CONFIG_PM
as well for the system suspend handling).
[rjw: Added the subject and changelog.]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Now, all sh7372 platforms are switched over to use pm-rmobile base PM domain,
and no one is using original sh7372_pm_domain APIs.
We can remove these, switching has been fully completed.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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This patch switches ap4evb platform to use pm-rmobile base common API.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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This patch switches mackerel platform to use pm-rmobile base common API.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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This patch adds pm-rmobile common API base PM domain.
sh7372 CPU/platform will switch to using it from
original implementation
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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* renesas-soc-core:
ARM: shmobile: soc-core: add R-mobile PM domain common APIs
ARM: mach-shmobile: Convert sh_clk_mstp32_register to sh_clk_mstp_register
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Add CPUIdle support for the A3SM power domain on sh7372.
With this in place we can turn off more of the SoC during
run time and save power. Makes use of the recently introduced
sh7372 INTCA A3SM power domain wakeup support.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Convert the sh7372 A3SM power domain code to allow
waking up through INTCA and SYSC instead of only
relying on SYSC for wakeups. This allows us to
enter A3SM more or less regardless of the state
of the rest of the system.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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This patch switch over to use common DMAEngine definitions,
and reduced a waste of code.
It is easy to understand if sh_dmae_pdata / sh_dmae_slave_config
settings are used defined value instead of direct value.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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* renesas-soc-core:
ARM: shmobile: add common DMAEngine definitions
ARM: shmobile: add common extra gpio functions
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767c0f3aed74be56f268709f5347e6c86d52b408
(PM / shmobile: Remove the stay_on flag from SH7372's PM domains)
commit removed sh7372_a3sp_init().
Now, there is no user for it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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* renesas-sh73a0:
ARM: shmobile: use common DMAEngine definitions on sh73a0
ARM: shmobile: sh73a0: add DMAEngine support for MPDMAC
ARM: shmobile: sh73a0: add USB clock support
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This patch switch over to use common DMAEngine definitions,
and reduced a waste of code.
It is easy to understand if sh_dmae_pdata / sh_dmae_slave_config
settings are used defined value instead of direct value.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Current shdmac can support MPDMAC (= sound DMA) on sh73a0.
This support reduce CPU load when sound was playback.
On v2.0 manual, MPDMAC MID/RID number were wrong.
This patch is using the number which seems correct.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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It is required from renesas_usbhs driver.
This patch is based on v2.0 manual.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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* renesas-soc-core:
ARM: shmobile: add common DMAEngine definitions
ARM: shmobile: add common extra gpio functions
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* renesas-r8a7740:
ARM: mach-shmobile: r8a7740 generic board support via DT
ARM: shmobile: r8a7740: add A4LC pm domain support
ARM: shmobile: r8a7740: add A3SP pm domain support
ARM: shmobile: r8a7740: add A4S pm domain support
ARM: shmobile: r8a7740: fixup: MSEL1CR 7bit control
ARM: shmobile: use common DMAEngine definitions on r8a7740
ARM: shmobile: r8a7740: add DMAEngine support for USB
ARM: shmobile: r8a7740: add DMAEngine support for SDHI
ARM: shmobile: r8a7740: add DMAEngine support for FSI
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Add generic DT board support for the r8a7740 SoC.
SCIF serial ports and timers are kept as regular
platform devices. Other on-chip and on-board devices
should be configured via the device tree.
At this point there is no interrupt controller support
in place but such code will be added over time when
proper IRQ domain support has been added to INTC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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This patch adds basic A4LC pm domain support.
Now, below devices can be controled by PM
MERAM, LCDC, VOU, ICBS, SDENC-Link
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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This patch adds basic A3SP pm domain support.
Now, below devices can be controled by PM
DMAC1/2/3, IPMMU, DDM, FLCTL, SYS-HPB, BBIF1, MSIOF1/2,
SCIFA,SCIFB, IIC1, IrDA, USBH, USBDMAC, SDHI0/1/2, TPU,
DREQPAK (Sys), MMCIF, RSPI, SIM, USBF
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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This patch adds basic A4S pm domain support.
Now, below devices can be controled by PM
Common-SHwy, Common-HPB, BSC, MFI, MMFROM, HS-SHwy,
SYS-HPB, INTCA, DBSC, DDRPHY (Logic),
ATAPI, GbEther, AXI-bus
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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MSEL1CR 7bit selects IRQ7 source pin which was
VBUS pin or A21/MSIOF0_RSYNC/MSIOF1_TSYNC pin.
But current pfc-r8a7740 MSEL1CR 7bit setting was wrong.
This patch fix it up
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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* renesas-soc-core:
ARM: shmobile: soc-core: add R-mobile PM domain common APIs
ARM: mach-shmobile: Convert sh_clk_mstp32_register to sh_clk_mstp_register
Conflicts:
arch/arm/mach-shmobile/clock-r8a7740.c
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This patch switch over to use common DMAEngine definitions,
and reduced a waste of code.
It is easy to understand if sh_dmae_pdata / sh_dmae_slave_config
settings are used defined value instead of direct value.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Current shdmac can support USB DMAC on r8a7740.
This support reduce CPU duty when USB access.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Current shdmac can support SDHI DMAC on r8a7740.
This support reduce CPU duty when SDHI access.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Current shdmac can support FSI DMAC on r8a7740.
This support reduce CPU duty when sound was playback.
This patch is based on v1.0 manual
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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* renesas-soc-core:
ARM: shmobile: add common DMAEngine definitions
ARM: shmobile: add common extra gpio functions
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* renesas-soc-core:
ARM: shmobile: soc-core: add R-mobile PM domain common APIs
ARM: mach-shmobile: Convert sh_clk_mstp32_register to sh_clk_mstp_register
ARM: shmobile: add common DMAEngine definitions
ARM: shmobile: add common extra gpio functions
Conflicts:
arch/arm/mach-shmobile/clock-r8a7740.c
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This patch adds Renesas R-mobile series common PM domain APIs.
R-mobile CPU can use/switch this API
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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sh_clk_mstp32_register is deprecated. This convert to sh_clk_mstp_register.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Current shmobile have DMAEngine specific settings on each CPU code,
but SH-ARM DMAC use same value.
This patch adds new dma-register.h header to share definitions
and reduce a waste of code on SH-ARM architecture.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Current gpio frame work doesn't have the method to control
just pull up/down/free, but some SH-ARM boards need such kind of operation.
This patch adds common extra gpio functions for SH-ARM.
But these functions should be replaced by correct
gpio function in the future.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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* renesas-fixes:
ARM: shmobile: r8a7779: Route all interrupts to ARM
ARM: shmobile: kzm9d: use late init machine hook
ARM: shmobile: kzm9g: use late init machine hook
ARM: mach-shmobile: armadillo800eva: Use late init machine hook
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* renesas-sh73a0:
ARM: shmobile: sh73a0: add FSI clock
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This patch is required from FSI sound driver
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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In order to enable FSI-B selection from platform board,
this patch adds its interface to GPIO framework.
This patch is based on v1.0 manual
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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r8a7740 FSI can select its parent clock,
and its selection is dependent on platform board.
In order to enable FSI parent selection from platform board,
this patch adds its interface to clock framework.
This patch is based on v1.0 manual
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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It is required from sh_mobile_ceu_camera driver.
This patch is based on v1.0 manual
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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r8a7740 chip has lasting errata on MERAM buffer, and this patch adds
its work-around on setup-r8a7740.c
It solved CEU/VIO6C/2D-DMAC/VCP1/VPU5F/JPU/DISP memroy access error.
But MERAM driver can't control this issue,
since this work-around requires access to non-MERAM register address.
So, This it will be called as board specific code at this point.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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