aboutsummaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAge
* ARM: mach-mx5/board-mx53_loco: Make UART1 functionalFabio Estevam2011-02-01
| | | | | | | | Fix IOMUX settings for UART1 and make UART1 functional. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mach-mx5: Fix build for mx53_loco and mx53_smdFabio Estevam2011-02-01
| | | | | | | | | | Commit 816ad74 (ARM: i.MX53: Add full iomux support for mx53) renamed some of the pad names. Make the changes accordingly so that mx53_loco and mx53_cmd can build without errors. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* plat-mxc: Provide irq_chip name for GPIO IRQsAlexander Stein2011-02-01
| | | | | Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'imx-board-ifdefs' into imx-for-2.6.39Sascha Hauer2011-01-31
|\
| * ARM i.MX51 efikamx: remove unnecessary CONFIG_SERIAL_IMX ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX51 cpuimx51: remove unnecessary CONFIG_SERIAL_8250 ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX51 mx51-3ds: remove unnecessary CONFIG_KEYBOARD_IMX ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX51 mx51 babbage: remove unnecessary CONFIG_SERIAL_IMX ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX51 mx51 3ds: remove unnecessary CONFIG_SERIAL_IMX ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX31 pcm037 eet: remove unnecessary CONFIG_SPI_IMX ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX27 eukrea mbimx27: remove unnecessary CONFIG_SPI_IMX ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX27 pca100: remove unnecessary CONFIG_SPI_IMX ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX31 mx31ads: remove unnecessary CONFIG_SERIAL_8250 ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX31 mx31ads: remove unnecessary CONFIG_SERIAL_IMX ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX31 mx31ads: remove unnecessary CONFIG_I2C ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX35 pcm043: put usbh1 outside CONFIG_USB_ULPISascha Hauer2011-01-27
| | | | | | | | | | | | | | The usbh1 port of the pcm043 does not use ulpi, so put it outside the corresponding ifdefs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX35 pcm043: remove unnecessary CONFIG_I2C ifdefsSascha Hauer2011-01-27
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mach-mx3/mach-mx31_3ds: Remove unnecessary function for IO mappingFabio Estevam2011-01-28
| | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM i.MX28: remove reserved register definesSascha Hauer2011-01-28
| | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de>
* | ARM i.MX23: remove reserved register definesSascha Hauer2011-01-28
| | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de>
* | ARM i.MX23/28: do not use complicated macros if not necessarySascha Hauer2011-01-28
| | | | | | | | | | | | | | | | | | Get rid of ## preprocessor construct where it only makes the code harder to read. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de>
* | ARM i.MX23/28: deobfuscate gpio initializationSascha Hauer2011-01-28
|/ | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de>
* ARM: mxs: add initial pm supportShawn Guo2011-01-26
| | | | | | | | | This is a very initial pm support and basically does nothing. With this pm support entry, drivers can start testing their own pm functions. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM MXS: Add auart platform support for i.MX28Sascha Hauer2011-01-25
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: Add initial support for IMX27IPCAM boardFabio Estevam2011-01-25
| | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mx5/mx51_3ds: Add watchdog supportDaiane Angolini2011-01-24
| | | | | Signed-off-by: Daiane Angolini <daiane.angolini@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mxs/mx28evk: read fec mac address from ocotpShawn Guo2011-01-21
| | | | | | | | Read fec mac address from ocotp and save it into fec_platform_data mac field for fec driver to use. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mxs: add ocotp read functionShawn Guo2011-01-21
| | | | | Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mx5: Use dummy clock for the keypadFabio Estevam2011-01-21
| | | | | | | Reuse dummy_clk for the imx-keypad device instead of using a dedicated kpp_clk. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX53: Add full iomux support for mx53Dinh Nguyen2011-01-21
| | | | | | | | This iomux file contains all the available pins that are iomux capable. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Introduce VPR200 board.Marc Reilly2011-01-19
| | | | | Signed-off-by: Marc Reilly <marc@cpdesign.com.au> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: mx50_rdp: add i2c bus supportRichard Zhao2011-01-19
| | | | | Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: mx50_rdp: add fec supportRichard Zhao2011-01-19
| | | | | Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX50: Rename devices-mx50.hJason Liu2011-01-19
| | | | | | | | | | | There are devices-imx51.h and devices-imx53.h under arch/arm/mach-mx5 directory. So, had better rename devices-mx50.h to devices-imx50.h to follow the same naming convention with imx51 and imx53 part. Signed-off-by: Jason Liu <r64343@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2011-01-18
|\ | | | | | | | | | | * 'next' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Fix asm/pgtable.h microblaze: Fix missing pagemap.h
| * microblaze: Fix asm/pgtable.hMichal Simek2011-01-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function ptep_test_and_clear_young have had wrong the first argument. It is also necessary to add __HAVE macros for ptep_test_and_clear_young and ptep_get_and_clear functions. Error log: In file included from linux/arch/microblaze/include/asm/pgtable.h:570, from arch/microblaze/mm/pgtable.c:35: include/asm-generic/pgtable.h:23: error: conflicting types for 'ptep_test_and_clear_young' linux/arch/microblaze/include/asm/pgtable.h:449: error: previous definition of 'ptep_test_and_clear_young' was here include/asm-generic/pgtable.h:73: error: redefinition of 'ptep_get_and_clear' linux/arch/microblaze/include/asm/pgtable.h:462: error: previous definition of 'ptep_get_and_clear' was here Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Fix missing pagemap.hMichal Simek2011-01-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing linux/pagemap.h to solve compilation error. Error log: In file included from linux/arch/microblaze/include/asm/tlb.h:17, from mm/pgtable-generic.c:9: include/asm-generic/tlb.h: In function 'tlb_flush_mmu': include/asm-generic/tlb.h:76: error: implicit declaration of function 'release_pages' include/asm-generic/tlb.h: In function 'tlb_remove_page': include/asm-generic/tlb.h:105: error: implicit declaration of function 'page_cache_release' Signed-off-by: Michal Simek <monstr@monstr.eu>
* | Merge branch 'for-linus' of ↵Linus Torvalds2011-01-18
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (25 commits) m68knommu: fix broken setting of irq_chip and handler m68knommu: switch to using -mcpu= flags for ColdFire targets m68knommu: arch/m68knommu/Kconfig whitespace cleanup m68knommu: create optimal separate instruction and data cache for ColdFire m68knommu: support ColdFire caches that do copyback and write-through m68knommu: support version 2 ColdFire split cache m68knommu: make cache push code ColdFire generic m68knommu: clean up ColdFire cache control code m68knommu: move inclusion of ColdFire v4 cache registers m68knommu: merge bit definitions for version 3 ColdFire cache controller m68knommu: create bit definitions for the version 2 ColdFire cache controller m68knommu: remove empty __iounmap() it is no used m68knommu: remove kernel_map() code, it is not used m68knommu: remove do_page_fault(), it is not used m68knommu: use user stack pointer hardware on some ColdFire cores m68knommu: remove command line printing DEBUG m68knommu: remove fasthandler interrupt code m68knommu: move UART addressing to part specific includes m68knommu: fix clock rate value reported for ColdFire 54xx parts m68knommu: move ColdFire CPU names into their headers ...
| * | m68knommu: fix broken setting of irq_chip and handlerGreg Ungerer2011-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compile error, by using correct loop variable: arch/m68knommu/platform/68328/ints.c: In function ‘init_IRQ’: arch/m68knommu/platform/68328/ints.c:182: error: ‘irq’ undeclared (first use in this function) arch/m68knommu/platform/68328/ints.c:182: error: (Each undeclared identifier is reported only once arch/m68knommu/platform/68328/ints.c:182: error: for each function it appears in.) Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: switch to using -mcpu= flags for ColdFire targetsGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | Gcc has deprecated the use of the following ColdFire cpu options: -m5206e, -m528x, -m5307 and -m5407. In there place we should use the equivilent -mcpu= option and setting. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: arch/m68knommu/Kconfig whitespace cleanupPhilippe De Muyter2011-01-05
| | | | | | | | | | | | | | | | | | | | | Replace 8 spaces, or even 7, by TAB at begin of lines. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: create optimal separate instruction and data cache for ColdFireGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create separate functions to deal with instruction and data cache flushing. This way we can optimize them for the vairous cache types and arrangements used across the ColdFire family. For example the unified caches in the version 3 cores means we don't need to flush the instruction cache. For the version 2 cores that do not do data cacheing (or where we choose instruction cache only) we don't need to do any data flushing. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: support ColdFire caches that do copyback and write-throughGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | The version 3 and version 4 ColdFire cache controllers support both write-through and copy-back modes on the data cache. Allow for Kconfig time configuration of this, and set the cache mode appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: support version 2 ColdFire split cacheGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The newer version 2 ColdFire CPU cores support a configurable cache arrangement. The cache memory can be used as all instruction cache, all data cache, or split in half for both instruction and data caching. Support this setup via a Kconfig time menu that allows a kernel builder to choose the arrangement they want to use. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: make cache push code ColdFire genericGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the code to push cache lines is only available to version 4 cores. Version 3 cores may also need to use this if we support copy- back caches on them. Move this code to make it more generic, and useful for all version ColdFire cores. With this in place we can now have a single cache_flush_all() code path that does all the right things on all version cores. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: clean up ColdFire cache control codeGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cache control code for the ColdFire CPU's is a big ugly mess of "#ifdef"ery liberally coated with bit constants. Clean it up. The cache controllers in the various ColdFire parts are actually quite similar. Just differing in some bit flags and options supported. Using the header defines now in place it is pretty easy to factor out the small differences and use common setup and flush/invalidate code. I have preserved the cache setups as they where in the old code (except where obviously wrong - like in the case of the 5249). Following from this it should be easy now to extend the possible setups used on the CACHE controllers that support split cacheing or copy-back or write through options. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: move inclusion of ColdFire v4 cache registersGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move the inclusion of the version 4 cache controller registers so that it is with all the other register bit flag definitions. This makes it consistent with the other version core inclusion points, and means we don't need "#ifdef"ery in odd-ball places for these definitions. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: merge bit definitions for version 3 ColdFire cache controllerGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | All version 3 based ColdFire CPU cores have a similar cache controller. Merge all the exitsing definitions into a single file, and make them similar in style and naming to the existing version 2 and version 4 cache controller definitions. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: create bit definitions for the version 2 ColdFire cache controllerGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | | | | | | | The version 2 ColdFire CPU based cores all contain a similar cache controller unit. Create a set of bit flag definitions for the supporting registers. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: remove empty __iounmap() it is no usedGreg Ungerer2011-01-05
| | | | | | | | | | | | | | | | | | The empty __iounmap() function is not used on m68knommu at all. Signed-off-by: Greg Ungerer <gerg@uclinux.org>