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* Merge branch 'fixes' of ↵Olof Johansson2012-01-29
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: arch/arm/mach-omap2/smartreflex.c: add missing iounmap ARM: OMAP2+: arch/arm/mach-omap2/devices.c: introduce missing kfree ARM: OMAP: fix MMC2 loopback clock handling ARM: OMAP: fix erroneous mmc2 clock change on mmc3 setup ARM: OMAP2+: GPMC: fix device size setup ARM: OMAP2+: timer: Fix crash due to wrong arg to __omap_dm_timer_read_counter ARM: OMAP3: hwmod data: register dss hwmods after dss_core ARM: OMAP2/3: PRM: fix missing plat/irqs.h build breakage ARM: OMAP2+: io: fix compilation breakage on 2420-only configs ARM: OMAP4: hwmod data: Add names for DMIC memory address space ARM: OMAP3: hwmod data: add SYSC_HAS_ENAWAKEUP for dispc ARM: OMAP2+: hwmod data: split omap2/3 dispc hwmod class ARM: OMAP2: fix regulator warnings ARM: OMAP2: fix omap3 touchbook kconfig warning i2c: OMAP: Fix OMAP1 build error
| * Merge branch 'omap_fixes_a_3.3rc' of git://git.pwsan.com/linux-2.6 into fixesTony Lindgren2012-01-26
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| | * ARM: OMAP3: hwmod data: register dss hwmods after dss_coreIlya Yanok2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dss_core has to be initialized before any other DSS hwmod. Currently this is broken as dss_core is listed in chip/revision specific hwmod lists while other DSS hwmods are listed in common list which is registered first. This patch moves DSS hwmods (except for dss_core) to the separate list which is registered last to ensure that dss_core is already registered. This solves the problem with BUG() in L3 interrupt handler on boards with DSS enabled in bootloader. The long-term fix to this is to ensure modules are set up in dependency order in the hwmod core code. CC: Tomi Valkeinen <tomi.valkeinen@ti.com> CC: Archit Taneja <archit@ti.com> CC: Paul Walmsley <paul@pwsan.com> Signed-off-by: Ilya Yanok <yanok@emcraft.com> [paul@pwsan.com: add notes that this is just a temporary workaround until hwmod dependencies are added] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * ARM: OMAP2/3: PRM: fix missing plat/irqs.h build breakagePaul Walmsley2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 22f51371f8c35869ed850f46aa76b6cc2b502110 ("ARM: OMAP3: pm: use prcm chain handler") breaks the build on a 2420-only config, due to a missing include for plat/irqs.h: CC arch/arm/mach-omap2/prm2xxx_3xxx.o arch/arm/mach-omap2/prm2xxx_3xxx.c:41:11: error: 'INT_34XX_PRCM_MPU_IRQ' undeclared here (not in a function) Fix by explicitly including it. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Kevin Hilman <khilman@ti.com>
| | * ARM: OMAP2+: io: fix compilation breakage on 2420-only configsPaul Walmsley2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7b250aff1ce346b6c7bc0329a2350334d1c66525 ("ARM: OMAP: Avoid cpu_is_omapxxxx usage until map_io is done") breaks the build on a 2420-only config on v3.3-rc1: arch/arm/mach-omap2/built-in.o: In function `omap2430_init_early': arch/arm/mach-omap2/io.c:406: undefined reference to `omap2_set_globals_243x' arch/arm/mach-omap2/io.c:410: undefined reference to `omap243x_clockdomains_init' arch/arm/mach-omap2/io.c:411: undefined reference to `omap2430_hwmod_init' Fix by only compiling omap2420_init_early() when CONFIG_SOC_OMAP2420 is selected, and only compiling omap2430_init_early() when CONFIG_SOC_OMAP2430 is selected. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP4: hwmod data: Add names for DMIC memory address spacePeter Ujfalusi2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To be able to get the memory resources by name from the DMIC driver (for MPU and for DMA). Without this patch, functionality that was working in 3.2 breaks in 3.3-rc1. This patch should have gone in as part of the 3.3 merge window, but was inadvertently missed. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> [paul@pwsan.com: added commit message note] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * ARM: OMAP3: hwmod data: add SYSC_HAS_ENAWAKEUP for dispcTomi Valkeinen2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dispc's sysc_flags is missing SYSC_HAS_ENAWAKEUP flag. This seems to cause SYNC_LOST errors from the DSS when the power management is enabled. This patch adds the missing SYSC_HAS_ENAWAKEUP flag. Note that there are other flags missing also (clock activity, DSI's sysc flags), but as they are not critical, they will be fixed in the next merge window. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * ARM: OMAP2+: hwmod data: split omap2/3 dispc hwmod classTomi Valkeinen2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently OMAP2 and 3 share the same omap_hwmod_class and omap_hwmod_class_sysconfig for dispc. However, OMAP3 has sysconfig bits that OMAP2 doesn't have, so we need to split those structs into OMAP2 and OMAP3 specific versions. This patch only splits the structs, without changing the contents. This is a prerequisite for a subsequent fix. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> [paul@pwsan.com: added commit note] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | ARM: OMAP2+: arch/arm/mach-omap2/smartreflex.c: add missing iounmapJulia Lawall2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing iounmap in error handling code, in a case where the function already preforms iounmap on some other execution path. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; statement S,S1; int ret; @@ e = \(ioremap\|ioremap_nocache\)(...) ... when != iounmap(e) if (<+...e...+>) S ... when any when != iounmap(e) *if (...) { ... when != iounmap(e) return ...; } ... when any iounmap(e); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: arch/arm/mach-omap2/devices.c: introduce missing kfreeJulia Lawall2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pdata needs to be freed before leaving the function in an error case. A simplified version of the semantic match that finds the problem is as follows: (http://coccinelle.lip6.fr) // <smpl> @r exists@ local idexpression x; statement S; identifier f1; position p1,p2; expression *ptr != NULL; @@ x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...); ... if (x == NULL) S <... when != x when != if (...) { <+...x...+> } x->f1 ...> ( return \(0\|<+...x...+>\|ptr\); | return@p2 ...; ) @script:python@ p1 << r.p1; p2 << r.p2; @@ print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP: fix MMC2 loopback clock handlingGrazvydas Ignotas2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently MMC2 setup code can only enable loopback clock and relies on reset value for boards that need to have it disabled. This causes a problem with certain bootloaders that always enable that clock, resulting with unwanted bootloader dependencies. Fix this by making it disable the clock if board data says so. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP: fix erroneous mmc2 clock change on mmc3 setupGrazvydas Ignotas2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hsmmc23_before_set_reg() can set MMCSDIO2ADPCLKISEL bit, which enables internal clock for MMC2. Currently this function is also called by code handling MMC3, and if .internal_clock is set in platform data (by default it currently is), it will set MMCSDIO2ADPCLKISEL for MMC2 instead of MMC3 (MMC3 doesn't have such bit so nothing actually needs to be done). This breaks 2nd SD slot on pandora. Fix this by changing hsmmc23_before_set_reg() to only handle MMC2. Note that this removes .remux() call for MMC3, but no board currently needs it and it's also not called for MMC4 and MMC5. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: GPMC: fix device size setupYegor Yefremov2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | following statement can only change device size from 8-bit(0) to 16-bit(1), but not vice versa: regval |= GPMC_CONFIG1_DEVICESIZE(wval); so as this field has 1 reserved bit, that could be used in future, just clear both bits and then OR with the desired value Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Cc: stable@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2+: timer: Fix crash due to wrong arg to __omap_dm_timer_read_counterVaibhav Hiremath2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2f0778af (ARM: 7205/2: sched_clock: allow sched_clock to be selected at runtime) had a typo for the case when CONFIG_OMAP_32K_TIMER is not set. In dmtimer_read_sched_clock(), wrong argument was getting passed to __omap_dm_timer_read_counter() function call; instead of "&clksrc", we were passing "clksrc.io_base", which results into kernel crash. To reproduce kernel crash, just disable the CONFIG_OMAP_32K_TIMER config option (and DEBUG_LL) and build/boot the kernel. This will use dmtimer as a kernel clocksource and lead to kernel crash during boot - [ 0.000000] OMAP clocksource: GPTIMER2 at 26000000 Hz [ 0.000000] sched_clock: 32 bits at 26MHz, resolution 38ns, wraps every 165191ms [ 0.000000] Unable to handle kernel paging request at virtual address 00030ef1 [ 0.000000] pgd = c0004000 [ 0.000000] [00030ef1] *pgd=00000000 [ 0.000000] Internal error: Oops: 5 [#1] SMP [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 Not tainted (3.3.0-rc1-11574-g0c76665-dirty #3) [ 0.000000] PC is at dmtimer_read_sched_clock+0x18/0x4c [ 0.000000] LR is at update_sched_clock+0x10/0x84 [ 0.000000] pc : [<c00243b8>] lr : [<c0018684>] psr: 200001d3 [ 0.000000] sp : c0641f38 ip : c0641e18 fp : 0000000a [ 0.000000] r10: 151c3303 r9 : 00000026 r8 : 76276259 [ 0.000000] r7 : 00028547 r6 : c065ac80 r5 : 431bde82 r4 : c0655968 [ 0.000000] r3 : 00030ef1 r2 : fb032000 r1 : 00000028 r0 : 00000001 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2: fix regulator warningsFelipe Contreras2012-01-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | warning: (MACH_OMAP_ZOOM2 && MACH_OMAP_ZOOM3 && MACH_OMAP_4430SDP && MACH_OMAP4_PANDA && TPS6105X) selects REGULATOR_FIXED_VOLTAGE which has unmet direct dependencies (REGULATOR) Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | ARM: OMAP2: fix omap3 touchbook kconfig warningFelipe Contreras2012-01-20
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | warning: (MACH_OMAP3_TOUCHBOOK && DRM_RADEON_KMS && DRM_I915 && STUB_POULSBO && FB_BACKLIGHT && USB_APPLEDISPLAY && FB_OLPC_DCON && ASUS_LAPTOP && SONY_LAPTOP && THINKPAD_ACPI && EEEPC_LAPTOP && ACPI_ASUS && ACPI_CMPC && SAMSUNG_Q10) selects BACKLIGHT_CLASS_DEVICE which has unmet direct dependencies (HAS_IOMEM && BACKLIGHT_LCD_SUPPORT) A lot of boards need BACKLIGHT_CLASS_DEVICE for the framebuffers to work, but it's not *needed* for the device itself. It might be nice to enable it by default somewhoe if graphics stuff is enabled, but that's another story. Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branch 'fixes' of git://gitorious.org/linux-davinci/linux-davinci into ↵Olof Johansson2012-01-29
|\ \ | | | | | | | | | | | | | | | | | | | | | fixes * 'fixes' of git://gitorious.org/linux-davinci/linux-davinci: ARM: davinci: update mdio bus name ARM: davinci: DA850: remove non-existing pll1_sysclk4-7 clocks
| * | ARM: davinci: update mdio bus nameSekhar Nori2012-01-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 5a05a8200a4359ef2bfe9094c137dee35cfdd516 ("davinci_emac: use an unique MDIO bus name") introduced during the v3.3 merge window updated the davinci mdio bus name to make it unique. Update the bus name in board files which use DaVinci MDIO bus to match the new name. Without this PHY is not detected with error like: PHY 0:01 not found net eth0: could not connect to phy 0:01 Tested on DM365 and DA850 EVMs. Cc: Florian Fainelli <florian@openwrt.org> Cc: David S. Miller <davem@davemloft.net> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * | ARM: davinci: DA850: remove non-existing pll1_sysclk4-7 clocksBas van den Berg2012-01-20
| |/ | | | | | | | | | | | | | | | | DA850: sysclk4-7 only exist for pll0. for pll1 sysclk1-3 exist. Remove the non-existing clocks. Signed-off-by: Bas van den Berg <b.van.den.berg.nl@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* | Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2012-01-28
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: (31 commits) ARM: 7304/1: ioremap: fix boundary check when reusing static mapping ARM: 7301/1: Rename the T() macro to TUSER() to avoid namespace conflicts ARM: 7299/1: ftrace: clear zero bit in reported IPs for Thumb-2 ARM: 7298/1: realview: fix mapping of MPCore private memory region PCMCIA: fix sa1111 oops on remove ARM: 7288/1: mach-sa1100: add missing module_init() call ARM: 7297/1: smp_twd: make sure timer is stopped before registering it ARM: 7296/1: proc-v7.S: remove HARVARD_CACHE preprocessor guards ARM: 7295/1: cortex-a7: move proc_info out of !CONFIG_ARM_LPAE block ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMP ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundary ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes MFD: ucb1x00-ts: fix resume failure MFD: ucb1x00-core: fix gpiolib direction_output handling MFD: ucb1x00-core: fix missing restore of io output data on resume MFD: mcp-core: fix mcp_priv() to be more type safe MFD: mcp-core: fix complaints from the genirq layer Revert "ARM: sa11x0: Implement autoloading of codec and codec pdata for mcp bus." Revert "ARM: sa1100: Refactor mcp-sa11x0 to use platform resources." ... Fix up conflict due to arch/arm/mach-mx5/Kconfig having been merged into mach-imx5 (commit 784a90c0a7d8: "ARM i.MX: Merge i.MX5 support into mach-imx"), but the ARM_L1_CACHE_SHIFT_6 entry was moved to be driven by the CPU_V7 logic from it in the old location in rmk's branch (commit a092f2b15399: "ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs").
| * | ARM: 7304/1: ioremap: fix boundary check when reusing static mappingPawel Moll2012-01-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 576d2f2525612ecb5af029a76f21f22a3b82563d "ARM: add generic ioremap optimization by reusing static mappings" ioremap() is trying to reuse existing static mapping when possible. The condition checking boundaries of the requested and existing mappings didn't take in-page offset into consideration though, which lead to obscure and hard to debug problems when requested mapping crossed end of the static one. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Merge branch 'sa11x0-mcp-fixes' into fixesRussell King2012-01-26
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| | * | Revert "ARM: sa11x0: Implement autoloading of codec and codec pdata for mcp ↵Russell King2012-01-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bus." This reverts commit 5dd7bf59e0e8563265b3e5b33276099ef628fcc7. Conflicts: scripts/mod/file2alias.c This change is wrong on many levels. First and foremost, it causes a regression. On boot on Assabet, which this patch gives a codec id of 'ucb1x00', it gives: ucb1x00 ID not found: 1005 0x1005 is a valid ID for the UCB1300 device. Secondly, this patch is way over the top in terms of complexity. The only device which has been seen to be connected with this MCP code is the UCB1x00 (UCB1200, UCB1300 etc) devices, and they all use the same driver. Adding a match table, requiring the codec string to match the hardware ID read out of the ID register, etc is completely over the top when we can just read the hardware ID register.
| | * | Revert "ARM: sa1100: Refactor mcp-sa11x0 to use platform resources."Russell King2012-01-20
| | |/ | | | | | | | | | | | | | | | This reverts commit af9081ae64b941d32239b947882cd59ba855c5db. This revert is necessary to revert 5dd7bf59e0e8563265b3e5b33276099ef628fcc7.
| * | ARM: 7301/1: Rename the T() macro to TUSER() to avoid namespace conflictsCatalin Marinas2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | This macro is used to generate unprivileged accesses (LDRT/STRT) to user space. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7299/1: ftrace: clear zero bit in reported IPs for Thumb-2Rabin Vincent2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dynamic ftrace ops startup test currently fails on Thumb-2 kernels: Testing tracer function: PASSED Testing dynamic ftrace: PASSED Testing dynamic ftrace ops #1: (0 0 0 0 0) FAILED! This is because while the addresses in the mcount records do not have the zero bit set, the IP reported by the mcount call does have it set (because it is copied from the LR). This mismatch causes the ops filtering in ftrace_ops_list_func() to not call the relevant tracers. Fix this by clearing the zero bit before adjusting the LR for the mcount instruction size. Also, combine the mov+sub into a single sub instruction. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7298/1: realview: fix mapping of MPCore private memory regionMarc Zyngier2012-01-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 0536bdf33faf (ARM: move iotable mappings within the vmalloc region), the RealView PB11MP cannot boot anymore. This is caused by the way the mappings are described on this platform (define replaced by hex values for clarity): { /* GIC CPU interface mapping */ .virtual = IO_ADDRESS(0x1F000100), .pfn = __phys_to_pfn(0x1F000100), .length = SZ_4K, .type = MT_DEVICE, }, { /* GIC distributor mapping */ .virtual = IO_ADDRESS(0x1F001000), .pfn = __phys_to_pfn(0x1F001000), .length = SZ_4K, .type = MT_DEVICE, } The first mapping ends up reserving two pages, and clashes with the second one, which triggers a BUG_ON in vm_area_add_early(). In order to solve this problem, treat the MPCore private memory region (containing the SCU, the GIC and the TWD) as a single region, as described in the TRM: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/CACGDJJC.html The EB11MP is converted the same way, even if it manages to avoid the problem. Tested on both PB11MP and EB11MP. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7288/1: mach-sa1100: add missing module_init() callLinus Walleij2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Jornada SSP driver is supposed to be initialized by a module_init() call, but it was missed at some merge point. Since the driver mostly pass calls through it magically works anyway, but needs to be rectified. Cc: Kristoffer Ericson <kristoffer.ericson@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7297/1: smp_twd: make sure timer is stopped before registering itMarc Zyngier2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On secondary CPUs, the Timer Control Register is not reset to a sane value before the timer is registered, and the TRM doesn't seem to indicate any reset value either. In some cases, the kernel will take an interrupt too early, depending on what junk was present in the registers at reset time. The fix is to set the Timer Control Register to 0 before registering the clock_event_device and enabling the interrupt. Problem seen on VE (Cortex A5) and Tegra. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7296/1: proc-v7.S: remove HARVARD_CACHE preprocessor guardsWill Deacon2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On v7, we use the same cache maintenance instructions for data lines as for unified lines. This was not the case for v6, where HARVARD_CACHE was defined to indicate the L1 cache topology. This patch removes the erroneous compile-time check for HARVARD_CACHE in proc-v7.S, ensuring that we perform I-side invalidation at boot. Reported-and-Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: stable <stable@vger.kernel.org> Acked-by: Catalin Marinas <Catalin.Marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7295/1: cortex-a7: move proc_info out of !CONFIG_ARM_LPAE blockWill Deacon2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The merging of commits 1b6ba46b ("ARM: LPAE: MMU setup for the 3-level page table format") and b4244738 ("ARM: 7202/1: Add Cortex-A7 proc info") during the merge window ended up putting the Cortex-A7 proc_info into a code block guarded by !CONFIG_ARM_LPAE. This makes Cortex-A7 platforms unbootable when LPAE is enabled. This patch moves the proc_info structure for Cortex-A7 outside of the guarded block. Cc: Pawel Moll <pawel.moll@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMPWill Deacon2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It turns out that the logical CPU mapping is useful even when !CONFIG_SMP for manipulation of devices like interrupt and power controllers when running a UP kernel on a CPU other than 0. This can happen when kexecing a UP image from an SMP kernel. In the future, multi-cluster systems running AMP configurations will require something similar for mapping cluster IDs, so it makes sense to decouple this logic in preparation for this support. Acked-by: Yang Bai <hamo.by@gmail.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reported-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUsWill Deacon2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To ensure correct alignment of cacheline-aligned data, the maximum cacheline size needs to be known at compile time. Since Cortex-A8 and Cortex-A15 have 64-byte cachelines (and it is likely that there will be future ARMv7 implementations with the same line size) then it makes sense to assume that CPU_V7 implies a 64-byte L1 cacheline size. For CPUs with smaller caches, this will result in some harmless padding but will help with single zImage work and avoid hitting subtle bugs with misaligned data structures. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundaryWill Deacon2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The exception fixup table is currently aligned to a 32-byte boundary. Whilst this won't cause any problems, the exception_table_entry structures contain only a pair of unsigned longs, so 4-byte alignment is all that is required. If the table was walked from start to end, cacheline alignment may bring some performance benefits, but since a binary search is used, the access pattern is random and will not benefit from a stricter alignment. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytesWill Deacon2012-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linker script assumes a cacheline size of 32 bytes when aligning the .data..cacheline_aligned and .data..percpu sections. This patch updates the script to use L1_CACHE_BYTES, which should be set to 64 on platforms that require it. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7277/1: setup.c: Fix build warning by removing unneeded header fileFabio Estevam2012-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following build warning: CC arch/arm/kernel/setup.o In file included from arch/arm/kernel/setup.c:39: arch/arm/include/asm/elf.h:102:1: warning: "vmcore_elf64_check_arch" redefined In file included from arch/arm/kernel/setup.c:24: include/linux/crash_dump.h:30:1: warning: this is the location of the previous definition Since commit 93a72052 (crash_dump: export is_kdump_kernel to modules, consolidate elfcorehdr_addr, setup_elfcorehdr and saved_max_pfn) the inclusion of <linux/crash_dump.h> is no longer needed. Remove the inclusion of <linux/crash_dump.h> and the build warning is fixed. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 7279/1: standardize /proc/iomem "Kernel code" nameKees Cook2012-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | All other ports use "Kernel code" to identify the Kernel text segment in /proc/iomem. Change the ARM resources to do the same. Signed-off-by: Kees Cook <keescook@chromium.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: fix rcu stalls on SMP platformsRussell King2012-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can stall RCU processing on SMP platforms if a CPU sits in its idle loop for a long time. This happens because we don't call irq_enter() and irq_exit() around generic_smp_call_function_interrupt() and friends. Add the necessary calls, and remove the one from within ipi_timer(), so that they're all in a common place. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: vexpress: fix two section mismatch warningsRussell King2012-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | WARNING: vmlinux.o(.text+0x1bc9c): Section mismatch in reference from the function ct_ca9x4_init_cpu_map() to the function .init.text:scu_get_core_count() The function ct_ca9x4_init_cpu_map() references the function __init scu_get_core_count(). WARNING: vmlinux.o(.text+0x1bce8): Section mismatch in reference from the function ct_ca9x4_init_cpu_map() to the function .init.text:set_smp_cross_call() The function ct_ca9x4_init_cpu_map() references the function __init set_smp_cross_call(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: fix a section mismatch warning with our use of memblockRussell King2012-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 716a3dc2008 (ARM: Add arm_memblock_steal() to allocate memory away from the kernel) added a function which calls memblock_alloc(). This causes a section conflict: WARNING: vmlinux.o(.text+0xc614): Section mismatch in reference from the function arm_memblock_steal() to the function .init.text:memblock_alloc() The function arm_memblock_steal() references the function __init memblock_alloc(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: sa11x0: fix section mismatch in cpu-sa1100.cRussell King2012-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | WARNING: arch/arm/mach-sa1100/built-in.o(.data+0x11b8): Section mismatch in reference from the variable sa1100_driver to the function .init.text:sa1100_cpu_init() The variable sa1100_driver references the function __init sa1100_cpu_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: sa11x0: fix collie build errorRussell King2012-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | f408c985cefc (GPIO: sa1100: implement proper gpiolib gpio_to_irq conversion) made gpio_to_irq() a function. This breaks collie where it's used to initialize some static data. Fix that by moving the initialization to the init code. arch/arm/mach-sa1100/collie.c:139: error: initializer element is not constant arch/arm/mach-sa1100/collie.c:139: error: (near initialization for 'collie_power_resource[0].start') arch/arm/mach-sa1100/collie.c:140: error: initializer element is not constant arch/arm/mach-sa1100/collie.c:140: error: (near initialization for 'collie_power_resource[0].end') Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | Revert "RTC: sa1100: support sa1100, pxa and mmp soc families"Russell King2012-01-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 7cea00657dd4daef66ad95e976d5d67ed94cb97e. The sa1100 cleanups fatally broke the SA1100 RTC driver - the first hint that something is wrong are these compiler warnings: drivers/rtc/rtc-sa1100.c:42:1: warning: "RCNR" redefined In file included from arch/arm/mach-sa1100/include/mach/hardware.h:73, from drivers/rtc/rtc-sa1100.c:35: arch/arm/mach-sa1100/include/mach/SA-1100.h:877:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:43:1: warning: "RTAR" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:876:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:44:1: warning: "RTSR" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:879:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:45:1: warning: "RTTR" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:878:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:47:1: warning: "RTSR_HZE" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:891:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:48:1: warning: "RTSR_ALE" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:890:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:49:1: warning: "RTSR_HZ" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:889:1: warning: this is the location of the previous definition drivers/rtc/rtc-sa1100.c:50:1: warning: "RTSR_AL" redefined arch/arm/mach-sa1100/include/mach/SA-1100.h:888:1: warning: this is the location of the previous definition and the second problem, which is far more severe, are the different register layouts, resulting in the wrong registers being read on SA11x0 platforms. This patch adds: #define RCNR 0x00 /* RTC Count Register */ #define RTAR 0x04 /* RTC Alarm Register */ #define RTSR 0x08 /* RTC Status Register */ #define RTTR 0x0c /* RTC Timer Trim Register */ but the SA11x0 registers are: #define RTAR __REG(0x90010000) /* RTC Alarm Reg. */ #define RCNR __REG(0x90010004) /* RTC CouNt Reg. */ #define RTTR __REG(0x90010008) /* RTC Trim Reg. */ #define RTSR __REG(0x90010010) /* RTC Status Reg. */
| * | Revert "ARM: pxa: add dummy clock for sa1100-rtc"Russell King2012-01-19
| | | | | | | | | | | | | | | | | | | | | This reverts commit 7557c175f60d8d40baf16b22caf79beadef8f081. This revert is necessary to revert the broken "RTC: sa1100: support sa1100, pxa and mmp soc families" change.
| * | Revert "ARM: sa1100: clean up of the clock support"Russell King2012-01-19
| | | | | | | | | | | | | | | | | | | | | This reverts commit edf3ff5bac2582b57de4e7c6569fee5d7c1c0a42. This revert is necessary to revert the broken "RTC: sa1100: support sa1100, pxa and mmp soc families" change.
* | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2012-01-28
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc arm-soc fixes for 3.3-rc: AT91 needed reset fixes which resulted in some minor code refactoring, it also adds a feature-removal for one of their platforms for 3.4. The USB patches have been acked by Greg K-H. i.MX and ux500 both have some minor fixes, nothing controversial. * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: arch/arm/mach-imx/mach-mx53_ard.c: add missing iounmap ARM: imx: iomux-v1.h: Fix build error due to __init annotation ARM: at91: Fix at91sam9g45 and at91cap9 reset ARM: at91: make rstc soc independent ARM: at91: introduce AT91_SAM9_ALT_RESET to select the at91sam9 alternative reset ARM: at91: merge at91cap9_ddrsdr.h in at91sam9_ddrsdr.h ARM: at91: fix cap9 ddrsdr register ARM/USB: at91/ohci-at91: rename vbus_pin_inverted to vbus_pin_active_low USB: at91: fix clk_get error handling ARM: at91: removal of CAP9 SoC family ARM: at91: fix at91rm9200 soc subtype handling mach-ux500: no MMC_CAP_SD_HIGHSPEED on Snowball mach-ux500: enable ARM errata 764369 mach-ux500: do not override outer.inv_all mach-ux500: musb: now musb is always in OTG mode ARM: imx6: add missing twd_clk for imx6q clock
| * \ \ Merge branch 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6 into ↵Olof Johansson2012-01-27
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixes * 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6: arch/arm/mach-imx/mach-mx53_ard.c: add missing iounmap ARM: imx: iomux-v1.h: Fix build error due to __init annotation
| | * | | arch/arm/mach-imx/mach-mx53_ard.c: add missing iounmapJulia Lawall2012-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing iounmap in error handling code, in a case where the function already preforms iounmap on some other execution path. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; statement S,S1; int ret; @@ e = \(ioremap\|ioremap_nocache\)(...) ... when != iounmap(e) if (<+...e...+>) S ... when any when != iounmap(e) *if (...) { ... when != iounmap(e) return ...; } ... when any iounmap(e); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | ARM: imx: iomux-v1.h: Fix build error due to __init annotationFabio Estevam2012-01-26
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following build error found when building imx_v4_v5_defconfig: CC arch/arm/mach-imx/mach-imx27ipcam.o In file included from arch/arm/plat-mxc/include/mach/iomux-mx27.h:23, from arch/arm/mach-imx/mach-imx27ipcam.c:22: arch/arm/plat-mxc/include/mach/iomux-v1.h:99: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'imx_iomuxv1_init' Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | Merge branch 'fixes-for-arm-soc' of ↵Olof Johansson2012-01-27
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes * 'fixes-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: mach-ux500: no MMC_CAP_SD_HIGHSPEED on Snowball mach-ux500: enable ARM errata 764369 mach-ux500: do not override outer.inv_all mach-ux500: musb: now musb is always in OTG mode
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-13 06:14:18 -0400