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* sh: Move over to dynamically allocated FPU context.Paul Mundt2010-01-12
| | | | | | | | | | | | | | | | | | | | | This follows the x86 xstate changes and implements a task_xstate slab cache that is dynamically sized to match one of hard FP/soft FP/FPU-less. This also tidies up and consolidates some of the SH-2A/SH-4 FPU fragmentation. Now fpu state restorers are commonly defined, with the init_fpu()/fpu_init() mess reworked to follow the x86 convention. The fpu_init() register initialization has been replaced by xstate setup followed by writing out to hardware via the standard restore path. As init_fpu() now performs a slab allocation a secondary lighterweight restorer is also introduced for the context switch. In the future the DSP state will be rolled in here, too. More work remains for math emulation and the SH-5 FPU, which presently uses its own special (UP-only) interfaces. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use SLAB_PANIC for thread_info slab cache.Paul Mundt2010-01-12
| | | | | | | Presently this has a BUG_ON() for failure cases, as powerpc does. Switch this over to a SLAB_PANIC instead. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Always provide thread_info allocators.Paul Mundt2010-01-12
| | | | | | | | Presently the thread_info allocators are special cased, depending on THREAD_SHIFT < PAGE_SHIFT. This provides a sensible definition for them regardless of configuration, in preparation for extended CPU state. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move start_thread() out of line.Paul Mundt2010-01-12
| | | | | | | start_thread() will become a bit heavier with the xstate freeing to be added in, so move it out-of-line in preparation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh_bios detection.Paul Mundt2010-01-12
| | | | | | | | | | This adds some VBR sanity checks in the sh_bios code to ensure that the BIOS VBR is in range before blindly trapping in to it. This permits boards with varying boot loader configurations to always leave support for sh-bios enabled and it will just be disabled at run-time if not found. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Split out the unaligned counters and user bits.Paul Mundt2010-01-12
| | | | | | | | This splits out the unaligned access counters and userspace bits in to their own generic interface, which will allow them to be wired up on sh64 too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Consolidate the sh_bios earlyprintk code.Paul Mundt2010-01-12
| | | | | | | | | | | | Now that the sh-sci earlyprintk is taken care of by the sh-sci driver directly, there's no longer any reason for having a split-out early_printk framework. sh_bios is the only other thing that uses it, so we just migrate the leftovers in to there. As it's possible to have multiple early_param()'s for the same string, there's not much point in having this split out anymore anyways, particularly since the sh_bios dependencies are still special-cased within sh-sci itself. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off more unused sh_bios callbacks.Paul Mundt2010-01-12
| | | | | | | sh_bios_char_out() is not used by anything in-tree these days, so just get rid of it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh64: Fix up early serial fixmap.Paul Mundt2010-01-12
| | | | | | | | This was conditionalized on CONFIG_EARLY_PRINTK, which has subsequently gone away. Now that the serial driver always supports the early console, make sure we always establish the mapping. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tidy up the sh bios VBR handling.Paul Mundt2010-01-12
| | | | | | | | | This moves the VBR handling out of the main trap handling code and in to the sh-bios helper code. A couple of accessors are added in order to permit other kernel code to get at the VBR value for state save/restore paths. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: default to sparseirq.Paul Mundt2010-01-11
| | | | | | | | | | | As SH has a very sparse IRQ map by default, all new CPUs and boards benefit from using sparseirq by default. Despite this, there are still a few stragglers (mostly due to using a fixed IRQ range for their FPGA IRQ mappings), and these still need to be converted over one by one. As these are now in the minority, and we do not want to encourage this sort of brain-damage in newer board ports, we force sparseirq on. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: mach-se: Convert SE7343 FPGA to dynamic IRQ allocation.Paul Mundt2010-01-11
| | | | | | | | | This gets rid of the arbitrary set of vectors used by the SE7722 FPGA interrupt controller and switches over to a completely dynamic set. No assumptions regarding a contiguous range are made, and the platform resources themselves need to be filled in lazily. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: consolidate atomic_cmpxchg()/atomic_add_unless() definitions.Paul Mundt2010-01-08
| | | | | | | | | | | The LL/SC and IRQ versions were using generic stubs while the GRB version was just reimplementing what it already had for the standard cmpxchg() code. As we have optimized cmpxchg() implementations that are decoupled from the atomic code, simply falling back on the generic wrapper does the right thing. With this in place the GRB case is unaffected while the LL/SC case gets to use its optimized cmpxchg(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up nommu build for out-of-line pgtable changes.Paul Mundt2010-01-06
| | | | | | | pgtable_cache_init() has been moved out-of-line, so we also need a dummy definition for it on nommu to fix up the build. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Drop down to a single quicklist.Paul Mundt2010-01-04
| | | | | | | | | | We previously had 2 quicklists, one for the PGD case and one for PTEs. Now that the PGD/PMD cases are handled through slab caches due to the multi-level configurability, only the PTE quicklist remains. As such, reduce NR_QUICK to its appropriate size and bump down the PTE quicklist index. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'sh/pgtable' of git://github.com/mfleming/linux-2.6Paul Mundt2010-01-04
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| * sh: Move page table allocation out of lineMatt Fleming2010-01-01
| | | | | | | | | | | | | | | | | | | | We also switched away from quicklists and instead moved to slab caches. After benchmarking both implementations the difference is negligible. The slab caches suit us better though because the size of a pgd table is just 4 entries when we're using a 3-level page table layout and quicklists always deal with pages. Signed-off-by: Matt Fleming <matt@console-pimps.org>
| * sh: Optimise flush_dcache_page() on SH4Matt Fleming2010-01-01
| | | | | | | | | | | | | | If the page is not mapped into any process's address space then aliases cannot exist in the cache. So reduce the amount of flushing we perform. Signed-off-by: Matt Fleming <matt@console-pimps.org>
| * sh: Correct the PTRS_PER_PMD and PMD_SHIFT valuesMatt Fleming2010-01-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous expressions were wrong which made free_pmd_range() explode when using anything other than 4KB pages (which is why 8KB and 64KB pages were disabled with the 3-level page table layout). The problem was that pmd_offset() was returning an index of non-zero when it should have been returning 0. This non-zero offset was used to calculate the address of the pmd table to free in free_pmd_range(), which ended up trying to free an object that was not aligned on a page boundary. Now 3-level page tables should work with 4KB, 8KB and 64KB pages. Signed-off-by: Matt Fleming <matt@console-pimps.org>
| * sh: Remove unused functionsMatt Fleming2009-12-31
| | | | | | | | | | | | | | Apply some TLC to the SH64 header files and remove some functions that are not used anymore. Signed-off-by: Matt Fleming <matt@console-pimps.org>
* | Merge branch 'sh/stable-updates'Paul Mundt2010-01-04
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| * sh: update defconfigs.Paul Mundt2010-01-04
| | | | | | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Don't default enable PMB support.Paul Mundt2010-01-03
| | | | | | | | | | | | | | | | | | This has the adverse effect of converting many 29bit configs to 32bit mode, while this is a change that needs to be done manually for each platform. Turn it off by default in order to cut down on spurious bug reports. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Disable PMB for SH4AL-DSP CPUs.Paul Mundt2010-01-03
| | | | | | | | | | | | | | | | | | While the PMB is available on SH-4A parts, SH4AL-DSP parts exclude it altogether. As such, explicitly disable PMB support for these parts. If this changes in the future for newer subtypes, this will have to be made more fine-grained. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Only provide a PCLK definition for legacy CPG CPUs.Paul Mundt2009-12-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As CPUs are migrated over to more fully-featured clock frameworks of their own and off of the legacy CPG code, they no longer have any real need for defining the PCLK value. The PCLK define in itself is already fairly misleading, as many boards get their input clocks from different sources, making this value fairly arbitrary anyways. Outside of the legacy CPG clock framework, the only place where this value is used is for deriving CLOCK_TICK_RATE, which we set back to the legacy PIT value that it was before the PCLK definitions were added in the first place. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * Merge branch 'release' of ↵Linus Torvalds2009-12-24
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6: (34 commits) classmate-laptop: add support for Classmate PC ACPI devices hp-wmi: Fix two memleaks acer-wmi, msi-wmi: Remove needless DMI MODULE_ALIAS dell-wmi: do not keep driver loaded on unsupported boxes wmi: Free the allocated acpi objects through wmi_get_event_data drivers/platform/x86/acerhdf.c: check BIOS information whether it begins with string of table acerhdf: add new BIOS versions acerhdf: limit modalias matching to supported toshiba_acpi: convert to seq_file asus_acpi: convert to seq_file ACPI: do not select ACPI_DOCK from ATA_ACPI sony-laptop: enumerate rfkill devices using SN06 sony-laptop: rfkill support for newer models ACPI: fix OSC regression that caused aer and pciehp not to load MAINTAINERS: add maintainer for msi-wmi driver fujitu-laptop: fix tests of acpi_evaluate_integer() return value arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c: avoid cross-CPU interrupts by using smp_call_function_any() ACPI: processor: remove _PDC object list from struct acpi_processor ACPI: processor: change acpi_processor_set_pdc() interface ACPI: processor: open code acpi_processor_cleanup_pdc ...
| | * Merge branch 'misc-2.6.33' into releaseLen Brown2009-12-24
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| | | * arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c: avoid cross-CPU interrupts by ↵Andrew Morton2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | using smp_call_function_any() Presently acpi-cpufreq will perform the MSR read on the first CPU in the mask. That's inefficient if that CPU differs from the current CPU. Because we have to perform a cross-CPU call, but we could have run the rdmsr on the current CPU. So switch to using the new smp_call_function_any(), which will perform the call on the current CPU if that CPU is present in the mask (it is). Cc: "Zhang, Yanmin" <yanmin_zhang@linux.intel.com> Cc: Dave Jones <davej@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Jaswinder Singh Rajput <jaswinder@kernel.org> Cc: Len Brown <len.brown@intel.com> Cc: Mike Galbraith <efault@gmx.de> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Cc: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Len Brown <len.brown@intel.com>
| | * | Merge branch 'pdc' into releaseLen Brown2009-12-24
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| | | * | ACPI: processor: unify arch_acpi_processor_cleanup_pdcAlex Chiang2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The x86 and ia64 implementations of the function in $subject are exactly the same. Also, since the arch-specific implementations of setting _PDC have been completely hollowed out, remove the empty shells. Cc: Tony Luck <tony.luck@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Len Brown <len.brown@intel.com>
| | | * | ACPI: processor: finish unifying arch_acpi_processor_init_pdc()Alex Chiang2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only thing arch-specific about calling _PDC is what bits get set in the input obj_list buffer. There's no need for several levels of indirection to twiddle those bits. Additionally, since we're just messing around with a buffer, we can simplify the interface; no need to pass around the entire struct acpi_processor * just to get at the buffer. Cc: Tony Luck <tony.luck@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Len Brown <len.brown@intel.com>
| | | * | ACPI: processor: factor out common _PDC settingsAlex Chiang2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both x86 and ia64 initialize _PDC with mostly common bit settings. Factor out the common settings and leave the arch-specific ones alone. Cc: Tony Luck <tony.luck@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Len Brown <len.brown@intel.com>
| | | * | ACPI: processor: unify arch_acpi_processor_init_pdcAlex Chiang2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The x86 and ia64 implementations of arch_acpi_processor_init_pdc() are almost exactly the same. The only difference is in what bits they set in obj_list buffer. Combine the boilerplate memory management code, and leave the arch-specific bit twiddling in separate implementations. Cc: Tony Luck <tony.luck@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Len Brown <len.brown@intel.com>
| | | * | ACPI: processor: introduce arch_has_acpi_pdcAlex Chiang2009-12-22
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch dependent helper function that tells us if we should attempt to evaluate _PDC on this machine or not. The x86 implementation assumes that the CPUs in the machine must be homogeneous, and that you cannot mix CPUs of different vendors. Cc: Tony Luck <tony.luck@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * | | Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2009-12-24
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: VIDEO: cyberpro: pci_request_regions needs a persistent name ARM: dma-isa: request cascade channel after registering it ARM: footbridge: trim down old ISA rtc setup ARM: fix PAGE_KERNEL ARM: Fix wrong shared bit for CPU write buffer bug test ARM: 5857/1: ARM: dmabounce: fix build ARM: 5856/1: Fix bug of uart0 platfrom data for nuc900 ARM: 5855/1: putc support for nuc900 ARM: 5854/1: fix compiling error for NUC900 ARM: 5849/1: ARMv7: fix Oprofile events count ARM: add missing include to nwflash.c ARM: Kill CONFIG_CPU_32 ARM: Convert VFP/Crunch/XscaleCP thread_release() to exit_thread() ARM: 5853/1: ARM: Fix build break on ARM v6 and v7
| | * | | ARM: dma-isa: request cascade channel after registering itRussell King2009-12-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't request the cascade channel before it's been registered, so move it afterwards. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: footbridge: trim down old ISA rtc setupRussell King2009-12-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a "start_kernel(): bug: interrupts were enabled early". rtc_cmos now takes care of initializing the ISA RTC and reading the current time and date from it; there's no need to repeat that here, thereby causing interrupts to be enabled too early. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: fix PAGE_KERNELRussell King2009-12-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PAGE_KERNEL should not be executable; any area marked executable can be prefetched into the instruction cache. We don't want vmalloc areas to be read in this way. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: Fix wrong shared bit for CPU write buffer bug testRussell King2009-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is unpredictable to have the same memory mapped using different shared bit settings for ARMv6 and ARMv7 CPUs. Fix this for the CPU write buffer bug test. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 5857/1: ARM: dmabounce: fix buildMike Rapoport2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f74f7e57ae9fa12b2951ae62ce3557799b318399 (ARM: use flush_kernel_dcache_area() for dmabounce) has broken dmabounce build: CC arch/arm/common/dmabounce.o arch/arm/common/dmabounce.c: In function 'unmap_single': arch/arm/common/dmabounce.c:315: error: implicit declaration of function '__cpuc_flush_kernel_dcache_area' make[2]: *** [arch/arm/common/dmabounce.o] Error 1 Fix it. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 5856/1: Fix bug of uart0 platfrom data for nuc900wanzongshun2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix bug of uart0 platfrom data for nuc900 Signed-off-by: lijie <eltshanli@gmail.com> Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 5855/1: putc support for nuc900wanzongshun2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | putc support for nuc900 Signed-off-by: lijie <eltshanli@gmail.com> Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 5854/1: fix compiling error for NUC900wanzongshun2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix compiling error for NUC900 Signed-off-by: lijie <eltshanli@gmail.com> Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 5849/1: ARMv7: fix Oprofile events countJean PIHET2009-12-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Oprofile ARMv7 the PMNC_D bit was set to lower the PMU IRQs and so to decrease the risk of errata #628216 from appearing. The effect of setting the PMNC_D bit is that the CCNT counter is divided by 64, making the program counter events count inaccurate. The new OMAP3 r4 cores should have that errata fixed. The PMNC_D bit should not be set, this patch fixes it. Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: Kill CONFIG_CPU_32Russell King2009-12-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 26-bit ARM support was removed a long time ago, and this symbol has been defined to be 'y' ever since. As it's never disabled anymore, we can kill it without any side effects. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: Convert VFP/Crunch/XscaleCP thread_release() to exit_thread()Russell King2009-12-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids races in the VFP code where the dead thread may have state on another CPU. By moving this code to exit_thread(), we will be running as the thread, and therefore be running on the current CPU. This means that we can ensure that the only local state is accessed in the thread notifiers. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | ARM: 5853/1: ARM: Fix build break on ARM v6 and v7Anand Gadiyar2009-12-18
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2c9b9c849 added an argument to __cpuc_flush_dcache_page and renamed it. Update a caller of the old function to fix this build error: CC arch/arm/mm/copypage-v6.o arch/arm/mm/copypage-v6.c: In function 'v6_copy_user_highpage_nonaliasing': arch/arm/mm/copypage-v6.c:51: error: implicit declaration of function '__cpuc_flush_dcache_page' make[1]: *** [arch/arm/mm/copypage-v6.o] Error 1 make: *** [arch/arm/mm] Error 2 Reported-by: Jinsung Yang <jsgood.yang@samsung.com> Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branches 'sh/g3-prep' and 'sh/stable-updates'Paul Mundt2009-12-24
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| * | | Merge branch 'sh/g3-prep' into sh/for-2.6.33Paul Mundt2009-12-24
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| | * | Revert "x86, ucode-amd: Ensure ucode update on suspend/resume after CPU ↵Linus Torvalds2009-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | off/online cycle" This reverts commit 9f15226e75583547aaf542c6be4bdac1060dd425. It's just wrong, and broke resume for Rafael even on a non-AMD CPU. As Rafael says: "... it causes microcode_init_cpu() to be called during resume even for CPUs for which there's no microcode to apply. That, in turn, results in executing request_firmware() (on Intel CPUs at least) which doesn't work at this stage of resume (we have device interrupts disabled, I/O devices are still suspended and so on). If I'm not mistaken, the "if (uci->valid)" logic means "if that CPU is known to us" , so before commit 9f15226e755 microcode_resume_cpu() was called for all CPUs already in the system during suspend, which was the right thing to do. The commit changed it so that the CPUs without microcode to apply are now treated as "unknown", which is not quite right. The problem this commit attempted to solve has to be handled differently." Bisected-and -requested-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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