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* Merge tag 'tegra-for-3.7-dt' of ↵Olof Johansson2012-09-16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt From Stephen Warren: ARM: tegra: device tree changes This branch adds two main features to Tegra boards, simply by amending device tree files: regulator support and the ability to turn off system power when executing "shutdown". As part of these changes, the board file for Cardhu is split into two versions, since different revisions have different hardware in some areas, especially related to regulators. * tag 'tegra-for-3.7-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: dt: tegra: configure power off for some boards ARM: dt: tegra: whistler: add regulators ARM: dt: tegra: paz00: add regulators ARM: dt: tegra: ventana: add regulators ARM: dt: tegra: seaboard: add regulators ARM: tegra: cardhu: add dt entry for fixed regulators ARM: dt: tegra: cardhu: split dts file for support multiple board versions ARM: dt: tegra: cardhu: add entry for PMIC TPS65911. Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: dt: tegra: configure power off for some boardsStephen Warren2012-09-11
| | | | | | | | | | | | | | | | For Seaboard, Ventana, and Cardhu, add DT property to tell the regulator that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: dt: tegra: whistler: add regulatorsStephen Warren2012-09-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Whistler uses a Maxim 8907 regulator. Instantiate this. The voltage settings were derived from the schematic. The only exception is the BBAT voltage; the schematic says 1.2v, but the HW can't go that low, so use the HW default of 2.4v instead. Almost all regulators list all driven supply signal names in their regulator-names property. The exception is nvvdd_sv3, which is in turn named 12 more different names on the schematic, so these were omitted for brevity. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: dt: tegra: paz00: add regulatorsStephen Warren2012-09-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this. Three data sources were used for the data encoded here: * The HW defaults, as extracted from real HW. * The schematic, which specifies a voltage for each rail in the signal names. * The AC100 kernel used by the Ubuntu port: repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git branch chromeos-ac100-3.0 file arch/arm/mach-tegra/board-paz00-power.c For many rails, the constraints in that tree specified differing min and max voltages. In all cases, the min value was ignored, since there's no need currently to vary any of the voltages at run-time. DVFS might change this in the future. In most cases these sources all matched. Differences are: sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max of 1.3v, but this higher voltage was only applied to HW by DVFS code, which isn't currently supported in mainline. sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max of 1.125v, but this higher voltage was only applied to HW by DVFS code, which isn't currently supported in mainline. ldo3: The HW default is on. marvin24's kernel didn't specify always-on, but since the board wasn't marked as having fully constrained regulators, the rail was not turned off, so the difference had no effect. The rail is needed for USB. ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However, since this regulator is used for the same purpose as on other boards that require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT VDAC on Tegra, and so in practice is unlikely to be used, even though it is actaully hooked up in HW. Portions based on work by Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Marc Dietrich <marvin24@gmx.de> # v2 Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
| * ARM: dt: tegra: ventana: add regulatorsStephen Warren2012-09-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ventana uses a TPS6586x regulator. Instantiate this, and hook up a couple of fixed GPIO-controlled regulators too. The data was chosen to match the PMIC HW defaults, with the following exception: ldo6: The HW default is 2.85v. The schematics are unlabelled. Internal research indicates that 1.8v is correct. Our downstream kernel also uses 1.8v. Portions based on work by Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: dt: tegra: seaboard: add regulatorsStephen Warren2012-09-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seaboard uses a TPS6586x regulator. Instantiate this, and hook up a couple of fixed GPIO-controlled regulators too. Two data sources were used for the data encoded here: * The HW defaults, as extracted from real HW. * The schematic, which specifies a voltage for each LDO rail. In most cases these sources matched. The only differences is: ldo6: The HW default on Springbank is 2.85v. The HW default on Seaboard is 1.8v. The schematics for both Springbank and Seaboard match at 2.85v. However, internal research indicates that the schematics are incorrectly labelled, and 1.8v is correct. The ChromeOS kernel also uses 1.8v. Note that these settings don't entirely match those in the ChromeOS kernel found at the URL below. However, the selected values generally cause no behavior change in the kernel, and so were picked to avoid regressions. repo http://git.chromium.org/chromiumos/third_party/kernel.git branch chromeos-3.2 file arch/arm/mach-tegra/board-seaboard-power.c Portions based on work by Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: cardhu: add dt entry for fixed regulatorsLaxman Dewangan2012-09-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cadhu have multiple power rails which are controlled by GPIOs. Add support of these power rail control through fixed regulators. Add entry for all fixed regulators for cardhu-a02 and a04. The details are taken from downstream kernel. Some points on this change are: * Add the tps65910-LDO5 entry and make it always ON to supply power to SDMMC. Once the sd driver support regulator handling, this flag will be remove. * Dropping registration of rail vdd_sdmmc1 as the gpio is used by sdhci power-gpio. This need to fix in sdhci driver and then need to add the registration mechanism. Just removing power-gpio and adding fixed regulator with this gpio is causing the sd access to fail because first probe call of this regulator fails due to non-available of parent and so it calls gpio_free() which disable the pins in gpio mode make pin output to LOW causes power to OFF. In probe retry, it got success and it powered-on but it again need to do again numeration of card here. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: dt: tegra: cardhu: split dts file for support multiple board versionsLaxman Dewangan2012-09-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is multiple version of cardhu starting from A01 to A07. Cardhu A01 and A03 are not supported. Cardhu A02 will have different sets of GPIOs for fixed regulator compare to cardhu A04. The Cardhu A05, A06, A07 are compatibe with A04. Based on cardhu version, the related dts file need to be chosen like for cardhu A02, use tegra30-cardhu-a02.dts, cardhu A04 and more, use tegra30-cardhu-a04.dts. This patch create the DTS file A02 and A04 and convert tegra30-cardhu.dts as dts include file. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: dt: tegra: cardhu: add entry for PMIC TPS65911.Laxman Dewangan2012-09-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra30 based platform "cardhu" have the power management IC TPS65911 for the regulator. Adding DT entry for this device. Data are chosen from downstream kernel and making the voltage output as require by default for device to operate. The default interrupt line is HIGH from PMIC device and so inverting the interrupt detection line of PMU interrupt through configuring PMC. In this patch, do not registering LDO5 because the input supply for this rail is different for different version of cardhu i..e A02 and A04. The registration will be done once the dts file for cardhu A02 and A04 are added in follow on patches. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | Merge tag 'msm-dt-for-3.7' of ↵Olof Johansson2012-09-16
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/dt From David Brown: These patches migrate both the 8660 and 8960 targets on msm to be devicetree only. This also sets most of the frame in place necessary to build both targets into the same image. There's a couple of cleanups in here that are kept in this series because they are intimately tied to the changes necessary to support the devicetree conversions. By Stephen Boyd via David Brown * tag 'msm-dt-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm: ARM: msm: Remove non-DT targets from 8960 ARM: msm: Add DT support for 8960 ARM: msm: Move io mapping prototypes to common.h ARM: msm: Rename board-msm8x60 to signify its DT only status ARM: msm: Make 8660 a DT only target ARM: msm: Move 8660 to DT timer ARM: msm: Add DT support to msm_timer ARM: msm: Allow timer.c to compile on multiple targets ARM: msm: Don't touch GIC registers outside of GIC code ARM: msm: Add msm8660-surf.dts to Makefile.boot ARM: msm: Add handle_irq handler for 8660 DT machine Resolved trivial context conflict in arch/arm/mach-msm/io.c and a remove/change conflict in arch/arm/mach-msm/board-msm8x60.c. Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: msm: Remove non-DT targets from 8960Stephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | Remove the non-DT targets supported by 8960. This makes 8960 a device tree only target. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Add DT support for 8960Stephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support to boot 8960 with device tree. For now just support a basic machine with a uart device. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [davidb@codeaurora.org: Remove leading zeros] Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Move io mapping prototypes to common.hStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidate the handful of iomapping functions into common.h so that board files don't need to include mach/msm_iomap.h if they don't need static virtual mapping addresses. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Rename board-msm8x60 to signify its DT only statusStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | Rename this file to signify that this board is only supported via devicetree. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Make 8660 a DT only targetStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | We don't plan to support anything besides devicetree on these targets so remove all other machine support. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Move 8660 to DT timerStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the timer entry and point the machine descriptor to the device tree based msm timer. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [davidb@codeaurora.org: Remove leading zeros] Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Add DT support to msm_timerStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to setup the MSM timer via information obtained from the devicetree. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [davidb@codeaurora.org: Remove leading zeros] Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Allow timer.c to compile on multiple targetsStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer code relies on #defines from mach/iomap.h, cpu_is_*() checks, and a global irq #define. All this makes this file impossible to compile in a mult-target build. Therefore, make a sys_timer struct for each SoC so that machine descriptors can reference the correct timer. Then go through and replace all the defines with raw values that are passed to a common initialization function. This paves the way to adding DT support to this code as well as allows us to compile this file on multiple targets at the same time. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Don't touch GIC registers outside of GIC codeStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSM code has some antiquated register writes to set up the PPIs to be edge triggered. Now that we have the percpu irq interface we don't need this code so let's remove it and update the percpu irq user (msm_timer) to set the irq type. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Add msm8660-surf.dts to Makefile.bootStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | Add this entry to the Makefile so that we can build the dtb automatically with 'make dtbs'. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | ARM: msm: Add handle_irq handler for 8660 DT machineStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 041f777 (ARM: msm: convert SMP platforms to CONFIG_MULTI_IRQ_HANDLER, 2011-09-06) forgot to add the .handle_irq for the DT machine record. Add it so we get interrupts instead of panics on DT enabled bootloaders. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
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*-. \ \ Merge branches 'msm/fixes-non-critical' and 'msm/cleanup' into next/dtOlof Johansson2012-09-16
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merging in fixes and cleanup as prereqs to simplify merge conflicts. * msm/fixes-non-critical: ARM: msm: Fix early debug uart mapping on some memory configs ARM: msm: io: Change the default static iomappings to be shared ARM: msm: io: Remove 7x30 iomap region from 7x00 ARM: msm: Remove call to missing FPGA init on 8660 * msm/cleanup: ARM: msm: Remove uncompiled board-msm7x27 ARM: msm: Remove unused acpuclock-arm11 ARM: msm: dma: use list_move_tail instead of list_del/list_add_tail ARM: msm: Fix sparse warnings due to incorrect type ARM: msm: Remove unused idle.c ARM: msm: clock-pcom: Mark functions static ARM: msm: Remove msm_hw_reset_hook Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: msm: Remove uncompiled board-msm7x27Stephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board file has never been compiled. Let's just remove it along with the one Kconfig reference to it in io.c. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | | ARM: msm: Remove unused acpuclock-arm11Stephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is dead code that isn't initialized or setup (although it is compiled). Remove it and the data structures it references. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | | ARM: msm: dma: use list_move_tail instead of list_del/list_add_tailWei Yongjun2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using list_move_tail() instead of list_del() + list_add_tail(). spatch with a semantic match is used to found this problem. (http://coccinelle.lip6.fr/) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | | ARM: msm: Fix sparse warnings due to incorrect typeStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-msm/timer.c:153:3: warning: incorrect type in initializer (different address spaces) arch/arm/mach-msm/timer.c:153:3: expected void const [noderef] <asn:3>*__vpp_verify arch/arm/mach-msm/timer.c:153:3: got struct clock_event_device [noderef] <asn:3>**<noident> arch/arm/mach-msm/timer.c:153:38: warning: incorrect type in assignment (different address spaces) arch/arm/mach-msm/timer.c:153:38: expected struct clock_event_device [noderef] <asn:3>*<noident> arch/arm/mach-msm/timer.c:153:38: got struct clock_event_device *evt arch/arm/mach-msm/timer.c:191:22: warning: incorrect type in assignment (different address spaces) arch/arm/mach-msm/timer.c:191:22: expected struct clock_event_device [noderef] <asn:3>**static [toplevel] percpu_evt arch/arm/mach-msm/timer.c:191:22: got struct clock_event_device *[noderef] <asn:3>*<noident> arch/arm/mach-msm/timer.c:196:4: warning: incorrect type in initializer (different address spaces) arch/arm/mach-msm/timer.c:196:4: expected void const [noderef] <asn:3>*__vpp_verify arch/arm/mach-msm/timer.c:196:4: got struct clock_event_device [noderef] <asn:3>**<noident> arch/arm/mach-msm/timer.c:196:39: warning: incorrect type in assignment (different address spaces) arch/arm/mach-msm/timer.c:196:39: expected struct clock_event_device [noderef] <asn:3>*<noident> arch/arm/mach-msm/timer.c:196:39: got struct clock_event_device *ce arch/arm/mach-msm/timer.c:198:24: warning: incorrect type in argument 4 (different address spaces) arch/arm/mach-msm/timer.c:198:24: expected void [noderef] <asn:3>*percpu_dev_id arch/arm/mach-msm/timer.c:198:24: got struct clock_event_device [noderef] <asn:3>**static [toplevel] percpu_evt Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | | ARM: msm: Remove unused idle.cStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Forcing arm_pm_idle to be msm_idle() doesn't make sense in configurations that don't have CONFIG_MSM7X00A_IDLE=y (i.e. any targets that aren't 7x00a). Furthermore, that config doesn't even exist, so this entire file is dead code. Just remove it so we can use the default idle support on MSM. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | | ARM: msm: clock-pcom: Mark functions staticStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are only used within clock-pcom.c, therefore mark them as static. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | | ARM: msm: Remove msm_hw_reset_hookStephen Boyd2012-09-13
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reset hook is never assigned and is dead code. Remove it so we have one less header file in the mach directory. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | ARM: msm: Fix early debug uart mapping on some memory configsStephen Boyd2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The uart mapping runs into the space allocated for lowmem on some 8960 boards when we have more than 512Mb of memory. We were getting lucky before and our mapping wasn't part of DDR. Move the mapping up into the vmalloc area which will always be outside of the lowmem mapping regardless of how much lowmem actually exists. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | ARM: msm: io: Change the default static iomappings to be sharedRohit Vaswani2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With 3.4 kernel the static iomappings can be shared with the ioremap mappings. If ioremap is called with an address for which a static mapping already exists, then that mapping should be used instead of creating a new one. However, the MT_DEVICE_NONSHARED flag prevents this. Hence, get rid of this flag. Some targets (7X00) that require the static iomappings to be NONSHARED use the MSM_DEVICE_TYPE and MSM_CHIP_DEVICE_TYPE macros. Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | ARM: msm: io: Remove 7x30 iomap region from 7x00Rohit Vaswani2012-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is redundant code. Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | ARM: msm: Remove call to missing FPGA init on 8660David Brown2012-09-13
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A previous patch[1] added code to initialize an FPGA register on the 8660 "SURF" development platform. Since this development platform is not widely available, and there is now a more available device "the Dragonboard" based on the same core SOC, this change was dropped. However, the DT code kept a lingering call to this FPGA init function. Remove it. [1] https://lkml.org/lkml/2011/8/12/357 Signed-off-by: David Brown <davidb@codeaurora.org>
* | | Merge tag 'imx-clk-dt-lookup' of ↵Olof Johansson2012-09-13
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt It replaces the clk_register_clkdev in imx6q clock driver with DT lookup. It depends on Mike's clk-3.7 branch. * tag 'imx-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: imx6q: replace clk_register_clkdev with clock DT lookup Resolved context add/remove conflict in arch/arm/boot/dts/imx6q.dtsi
| * | | ARM: imx6q: replace clk_register_clkdev with clock DT lookupShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It really becomes an maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx6q client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | | | Merge tag 'imx-dt-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Olof Johansson2012-09-13
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/dt - All imx53 board files are removed by the equal device tree support - The efikamx board files are removed to ease device tree migration - Remove dummy pinctrl state by setting up pinctrl in device tree * tag 'imx-dt-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6: (28 commits) ARM: imx6q-sabrelite: Rename 'pinctrl_gpio_hog' ARM: imx51: decouple device tree boot from board files ARM: imx51: build in pinctrl support ARM: dts: imx51-babbage: add pinctrl settings ARM: imx53: remove unneeded files and functions ARM: imx53: support device tree boot only ARM: imx53: decouple device tree boot from board files ARM: imx53: build in pinctrl support ARM: dts: imx53-smd: add pinctrl settings ARM: dts: imx53-evk: add pinctrl settings ARM: dts: imx53-ard: add pinctrl settings ARM: dts: imx53-qsb: add pinctrl settings ARM: imx6q: remove dummy pinctrl state ARM: dts: imx6q-sabresd: add pinctrl settings ARM: dts: imx6q-arm2: add pinctrl for uart and enet ARM: dts: imx6q-sabrelite: add pinctrl for usdhc and enet ARM: dts: imx6q: sort iomuxc sub-nodes in name ARM: dts: imx6q: name iomuxc sub-nodes following pin function ARM: dts: imx6q: improve indentation for fsl,pins ARM: efikamx: remove Genesi Efika MX platform files from the tree ... Resolved trivial context conflict in arch/arm/boot/dts/imx51-babbage.dts
| * | | | ARM: imx6q-sabrelite: Rename 'pinctrl_gpio_hog'Fabio Estevam2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pinctrl_gpio_hog' is used to setup the pin functions, and it is not neccesarily used only for GPIO pins, so remove 'gpio' from its name to describe a more generic term. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: imx51: decouple device tree boot from board filesShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now, imx51 device tree kernel calls pinctrl to set up pins. The function used to hook up non-DT pin setup is not needed for DT boot any more. Remove it from DT image. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: imx51: build in pinctrl supportShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the imx51 DT board having pinctrl setup define in device tree, it's time to remove dummy pinctrl state and build in the real imx51 pinctrl support. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: dts: imx51-babbage: add pinctrl settingsShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl settings for the exsiting devices in imx51-babbage.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: imx53: remove unneeded files and functionsShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now imx53 is a device tree only platform, so the files and functions used only by non-DT kernel can be removed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: imx53: support device tree boot onlyShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With device tree kernel provides the equal support as those imx53 board files, it's time to remove the board files and get imx53 support device tree only. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: imx53: decouple device tree boot from board filesShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now, imx53 device tree kernel calls pinctrl to set up pins. The functions used to hook up non-DT pin setup is not needed for DT boot any more. Remove them from DT image. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: imx53: build in pinctrl supportShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As all imx53 boards booting from device tree have pinctrl set up in dts, it's time to remove the dummy pinctrl state and build in the real imx53 pinctrl support. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: dts: imx53-smd: add pinctrl settingsShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl settings for the exsiting devices in imx53-smd.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: dts: imx53-evk: add pinctrl settingsShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl settings for the exsiting devices in imx53-evk.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: dts: imx53-ard: add pinctrl settingsShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl settings for the exsiting devices in imx53-ard.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: dts: imx53-qsb: add pinctrl settingsShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl settings for existing devices in imx53-qsb.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: imx6q: remove dummy pinctrl stateShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As all imx6q boards have pinctrl set up in device tree, it's time to remove the dummy pinctrl state. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | ARM: dts: imx6q-sabresd: add pinctrl settingsShawn Guo2012-09-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl settings for existing devices in imx6q-sabresd.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-15 09:35:04 -0500