aboutsummaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAge
* OMAP2PLUS:DSS2: add opt_clock_available in pdataSemwal, Sumit2011-03-11
| | | | | | | | | | | Provide a function in pdata to allow dss submodules to check if a given clock is available on a platform as an optional clock. Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> (based on implementation from Senthil) Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2/3/4: DSS2: Enable Display SubSystem as modulesSamreen2011-03-11
| | | | | | | | | Enabling all the display interface options to be built as module And enabling all the display panels to be built as modules. Signed-off-by: Samreen <samreen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Have separate irq handlers for DISPC and DSIarchit taneja2011-03-11
| | | | | | | | | | | | | | | | | | | | | | | Currently, the core DSS platform device requests for an irq line for OMAP2 and OMAP3. Make DISPC and DSI platform devices request for a shared IRQ line. On OMAP3, the logical OR of DSI and DISPC interrupt lines goes to the MPU. There is a register DSS_IRQSTATUS which tells if the interrupt came from DISPC or DSI. On OMAP2, there is no DSI, only DISPC interrupts goto the MPU. There is no DSS_IRQSTATUS register. Hence, it makes more sense to have separate irq handlers corresponding to the DSS sub modules instead of having a common handler. Since on OMAP3 the logical OR of the lines goes to MPU, the irq line is shared among the IRQ handlers. The hwmod irq info has been removed for DSS to DISPC and DSI for OMAP2 and OMAP3 hwmod databases. The Probes of DISPC and DSI now request for irq handlers. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP4: DSS2: Add hwmod device names for OMAP4.Mayuresh Janorkar2011-03-11
| | | | | | | | | Add hwmod device names for OMAP4; this enables device build for omap4 dss hwmod IPs. Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Mayuresh Janorkar <mayur@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP4: DSS2: clocks: Add ick as dummy clockSumit Semwal2011-03-11
| | | | | | | | | | | | DSS code uses ick as one of the clocks in clk_get/clk_put. OMAP4 clock database doesn't have ick for DSS, so adding ick as dummy clock. This is needed for backward compatibility with OMAP2/3. Once pm_runtime* APIs get introduced in DSS, this will be revisited. Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2PLUS: clocks: Align DSS clock names and rolesSumit Semwal2011-03-11
| | | | | | | | | | | | | | | | Currently, clock database has <dev, clock-name> tuples for DSS2. Because of this, the clock names are different across different OMAP platforms. This patch aligns the DSS2 clock names and roles across OMAP 2420, 2430, 3xxx, 44xx platforms in the clock databases, hwmod databases for opt-clocks, and DSS clock handling. This ensures that clk_get/put/enable/disable APIs in DSS can use uniform role names. Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2, 3: DSS2: DSI: create platform_driver, move init, exit to driverSenthilvadivu Guruswamy2011-03-11
| | | | | | | | | | | | | | | | Hwmod adaptation design requires each of the DSS HW IP to be a platform driver. So a platform_driver for DSI is created and init exit methods are moved from core.c to its driver probe,remove. pdev member has to be maintained by its own drivers. Also, vdds_dsi regulator handling is copied to dsi.c, since vdds_dsi regulator is needed by dpi_init() too. Board files are updated accordingly to add 2 instances of vdds_dsi regulator. DSI platform driver is registered from inside omap_dss_probe, in the order desired. Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2, 3: DSS2: VENC: create platform_driver, move init, exit to driverSenthilvadivu Guruswamy2011-03-11
| | | | | | | | | | | | | | Hwmod adaptation design requires each of the DSS HW IP to be a platform driver. So a platform_driver for VENC is created and init exit methods are moved from core.c to its driver probe,remove. pdev member has to be maintained by its own drivers. Also, venc_vdda_dac reading is moved to venc.c. VENC platform driver is registered from inside omap_dss_probe, in the order desired. Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2, 3: DSS2: Move clocks from core driver to dss driverSenthilvadivu Guruswamy2011-03-11
| | | | | | | | | | | | | | | | | | | All clock management is moved to dss platform driver. clk_get/put APIs use dss device instead of core platform device. Hwmod adaptation design requires each of the DSS HW IP to be a platform driver. So the device name is changed from omapdss to omapdss_dss in 2420, 2430, 3xxx clock database files. Now the core driver "omapdss" only takes care of panel registration with the custom bus. core driver also uses the clk_enable() / clk_disable() APIs exposed by DSS for clock management. DSS driver would do clock management of clocks needed by DISPC, RFBI, DSI, VENC TODO: The clock content would be adapted to omap_hwmod in a seperate series. Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2,3: DSS2: Build omap_device for each DSS HWIPSenthilvadivu Guruswamy2011-03-11
| | | | | | | | | Looks up the hwmod database for each of the given DSS HW IP and builds omap_device which inturn does the platform device register for each of DSS HW IP Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: 3430SDP: Remove unused vdda_dac supplyTomi Valkeinen2011-03-11
| | | | | | | Remove extra vdda_dac supply definition. It was a leftover from conflict resolution. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* Merge branch 'for_2.6.39/pm-misc' of ↵Tony Lindgren2011-03-10
|\ | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| * OMAP3: PM: Clear the SCTLR C bit in asm code to prevent data cache allocationSantosh Shilimkar2011-03-10
| | | | | | | | | | | | | | | | | | | | | | On the newer ARM processors like CortexA8, CortexA9, the caches can be speculatively loaded while they are getting flushed. Clear the SCTLR C bit to prevent further data cache allocation as part of cache clean routine Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Remove un-necessary cp15 registers form low power cpu contextSantosh Shilimkar2011-03-10
| | | | | | | | | | | | | | | | | | | | | | The current code saves few un-necessary registers which are read-only or write-only, unused CP15 registers. Remove them and keep only necessary CP15 registers part of low power context save/restore. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Allow the cache clean when L1 is lost.Santosh Shilimkar2011-03-10
| | | | | | | | | | | | | | | | | | | | | | When L1 cache is suppose to be lost, it needs to be cleaned before entrering to the low power mode. While at this, also fix few comments and remove un-necessary clean_l2 lable. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Fix the MMU on sequence in the asm codeSantosh Shilimkar2011-03-10
| | | | | | | | | | | | | | | | Add necessary barriers after enabling MMU. Also use the sane way to load pc and jump to it instead of executing ldma first up. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Use ARMv7 supported instructions instead of legacy CP15 onesSantosh Shilimkar2011-03-10
| | | | | | | | | | | | | | | | | | On ARMv7 dsb, dmb instructions are supported and can be used directly instead of their cp15 equivalnet. Also remove the opcodes for smc and use the available instruction directly in OMAP3 low power asm code Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP2+: smartreflex: remove SR debug directory in omap_sr_remove()Anand S Sawant2011-03-09
| | | | | | | | | | | | | | | | | | | | | | omap_sr_probe() creates the smartreflex debug directory and its underlying nvalue debug directory. These directories are removed in omap_sr_remove(). Basic smartreflex functionality tested on OMAP3630 Zoom3 & OMAP4430 SDP Signed-off-by: Anand S Sawant <sawant@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap3: Thumb-2 compatibility for sleep34xx.SDave Martin2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Build unconditionally as ARM for correct interoperation with OMAP firmware. * Fix an out-of-range ADR when building for ARM. * Remove deprecated PC-relative stores. * Add the required ENDPROC() directive for each ENTRY(). * .align before data words. * Handle non-interworking return from v7_flush_dcache_all. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap3: Thumb-2 compatibility for sram34xx.SDave Martin2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Build unconditionally as ARM for correct interoperation with OMAP firmware. * Remove deprecated PC-relative stores * Add the required ENDPROC() directive for each ENTRY(). * .align before data words Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap3: Remove hand-encoded SMC instructionsDave Martin2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For various reasons, Linux now only officially supports being built with tools which are new enough to understand the SMC instruction. Replacing the hand-encoded instructions when the mnemonic also allows for correct assembly in Thumb-2 (otherwise, the result is random data in the middle of the code). The Makefile already ensures that this file is built with a high enough gcc -march= flag (armv7-a). Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap4: Convert END() to ENDPROC() for correct linkage with ↵Dave Martin2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_THUMB2_KERNEL Code marked with ENTRY() also needs a matching ENDPROC() directive, in order to ensure that the type and instruction set of the symbol are correctly annotated. ENDPROC() tags the affected symbol as a function symbol, which will ensure that link-time fixups don't accidentally switch to the wrong instruction set. Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap4: Provide do_wfi() for Thumb-2Dave Martin2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | For CONFIG_THUMB2_KERNEL, the existing definition of do_wfi() will insert invalid code into the instruction stream. Any assembler which can assemble Thumb-2 is guaranteed to accept the "wfi" mnemonic, so for the Thumb-2 case, just use the mnemonic. The ARM case is left as-is. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Initialize IVA only if availableSanjeev Premi2011-03-09
| | | | | | | | | | | | | | | | | | | | IVA device is not present in many OMAP3 variants. This patch ensures that initialization is tied to the presence of IVA on the device. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Set/clear T2 bit for Smartreflex on TWLThara Gopinath2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. Since almost all platforms use I2C_SR on omap3, omap3_twl_init by default expects that OMAP's I2C_SR is plugged in to TWL's I2C and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, the board files are expected to call omap3_twl_set_sr_bit(false) to ensure that I2C_SR path is not set for voltage control and prevent the default behavior of omap3_twl_init. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Kevin Hilman <khilman@ti.com>
| * omap3: cpuidle: Add description field to each C-state.Santosh Shilimkar2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a description field to each idle C-state. This helps to give better data with PowerTop and one don't have to refer to the code to link what Cx means from system point of view while analysing PowerTop data. No functional change. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * omap3: pm: Use exported set_cr() instead of a custom one.Santosh Shilimkar2011-03-09
| | | | | | | | | | | | | | | | | | | | | | Remove the custom restore_control_register() and use the exported set_cr() instead to set the system control register(SCTRL) value. No functional change. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP2/3: PM: remove unnecessary wakeup/sleep dependency clearPaul Walmsley2011-03-09
| | | | | | | | | | | | | | | | | | | | | | The OMAP2 and OMAP3 PM code clears clockdomain wakeup and sleep dependencies. This is unnecessary after commit 6f7f63cc9adf3192e6fcac4e8bed5cc10fd924aa ("OMAP clockdomain: initialize clockdomain registers when the clockdomain layer starts") which clears these dependencies during clockdomain init. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP2+: remove unused UART base addresses from omap_globalsKevin Hilman2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that omap_hwmod + omap_device is used for OMAP UART device and driver code, we no longer need the UART physical addresses in omap_globals. Note that the #defines for the base addresses are still left in <plat/serial.h> since they are used by DEBUG_LL and uncompress code. Build tested for OMAP1 (omap1_defconfig) and OMAP2+ (omap2plus_defconfig) Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP: PM: SmartReflex: fix potential NULL dereferenceVasiliy Kulikov2011-03-09
| | | | | | | | | | | | | | | | kzalloc() may fail, if so return -ENOMEM. Also Walter Harms suggested to use kasprintf() instead of kzalloc+strcpy+strcat. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: beagle xm: enable up to 800MHz OPPNishanth Menon2011-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMP3630 silicon can enable higher frequencies only depending on the board characteristics meeting the recommended standards, and has to be selectively toggled. Beagle XM uses 3730 variant and the board design allows enabling 800MHz and 1GHz OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz safely. For the moment, we tweak the default table to allow for 800Mhz OPP usage. Reported-by: Koen Kooi <koen@beagleboard.org> Tested-by: Koen Kooi <koen@beagleboard.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3|4: OPP: make omapx_opp_init non-staticMenon, Nishanth2011-03-09
| | | | | | | | | | | | | | | | | | | | | | omap3 and omap4 opp_init should be made non-static to allow for platform specific opp table tweaking. making these static conflicts with the definition in pm.h(global) as well. we include pm.h as well to ensure that there are no such prototype conflicts with actual implementation in the future. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3630: PM: don't warn the user with a trace in case of PM34XX_ERRATUMRicardo Salveti de Araujo2011-03-09
| | | | | | | | | | | | | | | | | | | | In case in user has a OMAP3630 < ES1.2 the kernel should warn the user about the ERRATUM, but using pr_warn instead of WARN_ON is already enough, as there is nothing else the user can do besides changing the board. Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@canonical.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * Merge branch 's5p-fixes-for-linus' of ↵Linus Torvalds2011-03-07
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung * 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: S3C64XX: Update regulator names for debugfs compatiblity on SMDK6410 ARM: S3C64XX: Fix build with WM1190 disabled and WM1192 enabled on SMDK6410 ARM: S3C64XX: Reduce output of s3c64xx_dma_init1() ARM: S3C64XX: Tone down SDHCI debugging ARM: S3C64XX: Add clock for i2c1 ARM: S3C64XX: Staticise non-exported GPIO to interrupt functions ARM: SAMSUNG: Include devs.h in dev-uart.c to prototype devices ARM: S3C64XX: Fix keypad setup to configure correct number of rows ARM: S3C2440: Fix usage gpio bank j pin definitions on GTA02 ARM: S5P64X0: Fix number of GPIO lines in Bank F ARM: S3C2440: Select missing S3C_DEV_USB_HOST on GTA02
| | * ARM: S3C64XX: Update regulator names for debugfs compatiblity on SMDK6410Mark Brown2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The debugfs support added to the regulator API (which has been merged in during this merge window) creates directories for regulators named after the display names for the regulators so replace / as a separator for multiple supplies with + in the SMDK6410 machine. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Fix build with WM1190 disabled and WM1192 enabled on SMDK6410Mark Brown2011-03-04
| | | | | | | | | | | | | | | | | | | | | Avoid relying on implicit inclusion of machine.h Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Reduce output of s3c64xx_dma_init1()Ben Dooks2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce the logging output of s3c64xx_dma_init1() as it is not useful for normal bootup (and we get an overall indication of the registration of the PL180 DMA block). This removes the following output from the log: s3c64xx_dma_init1: registering DMA 0 (e0808100) s3c64xx_dma_init1: registering DMA 1 (e0808120) s3c64xx_dma_init1: registering DMA 2 (e0808140) s3c64xx_dma_init1: registering DMA 3 (e0808160) s3c64xx_dma_init1: registering DMA 4 (e0808180) s3c64xx_dma_init1: registering DMA 5 (e08081a0) s3c64xx_dma_init1: registering DMA 6 (e08081c0) s3c64xx_dma_init1: registering DMA 7 (e08081e0) Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Tone down SDHCI debuggingMark Brown2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC core calls s3c6400_setup_sdhcp_cfg_card() very frequently, causing the log message in there at KERN_INFO to be displayed a lot which is slow and overly chatty. Convert the message into a pr_debug() to tone this down. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Add clock for i2c1Ben Dooks2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | The clock for i2c1 has been missing for a while, add it to the list of clocks for the system and ensure it is initialised at startup. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Staticise non-exported GPIO to interrupt functionsMark Brown2011-03-04
| | | | | | | | | | | | | | | | | | | | | No need to put these in the global namespace and sparse gets upset. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: SAMSUNG: Include devs.h in dev-uart.c to prototype devicesMark Brown2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | Ensures that the declaration agrees with the definition and makes sparse happy. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C64XX: Fix keypad setup to configure correct number of rowsBen Dooks2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The call to s3c_gpio_cfgrange_nopull() takes a size and base but this looks like it is trying to do base and end. This means it is configuring too many GPIOs and on the case of the Cragganmore means we're seeing an overflow of the ROW pins causing problems with the keyboard driver. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C2440: Fix usage gpio bank j pin definitions on GTA02Lars-Peter Clausen2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gta02 header file still uses the old S3C2410_GPJx defines instead of the S3C2410_GPJ(x) macro. Since the S3C2410_GPJx defines have already been removed this causes the following build failure: sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_set_spk': sound/soc/samsung/neo1973_wm8753.c:259: error: 'S3C2440_GPJ2' undeclared (first use in this function) sound/soc/samsung/neo1973_wm8753.c:259: error: (Each undeclared identifier is reported only once sound/soc/samsung/neo1973_wm8753.c:259: error: for each function it appears in.) sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_get_spk': sound/soc/samsung/neo1973_wm8753.c:267: error: 'S3C2440_GPJ2' undeclared (first use in this function) sound/soc/samsung/neo1973_wm8753.c: In function 'lm4853_event': sound/soc/samsung/neo1973_wm8753.c:276: error: 'S3C2440_GPJ1' undeclared (first use in this function) sound/soc/samsung/neo1973_wm8753.c: At top level: sound/soc/samsung/neo1973_wm8753.c:439: error: 'S3C2440_GPJ2' undeclared here (not in a function) sound/soc/samsung/neo1973_wm8753.c:440: error: 'S3C2440_GPJ1' undeclared here (not in a function) This patches fixes the issue by doing a s,S3C2410_GPJ([\d]+),S3C2410_GPJ(\1),g on the file. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S5P64X0: Fix number of GPIO lines in Bank FBanajit Goswami2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the number of total GPIO lines for Bank F for Samsung S5P6440 and S5P6450 SoCs from 2 to 16. This is necessary as the GPIO lines from 0 to 13 are reserved and only lines 14 and 15 are used. As during initialization, the line number starts at 0, putting 2 does not solve the intended purpose. Signed-off-by: Banajit Goswami <banajit.g@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * ARM: S3C2440: Select missing S3C_DEV_USB_HOST on GTA02Lars-Peter Clausen2011-03-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gta02 mach file references the ohci device. So we need to select S3C_DEV_USB_HOST to have the device available. This fixes the following linker errors: arch/arm/mach-s3c2440/built-in.o: In function 'gta02_machine_init': mach-gta02.c:(.init.text+0x370): undefined reference to 's3c_ohci_set_platdata' arch/arm/mach-s3c2440/built-in.o:(.init.data+0xac): undefined reference to 's3c_device_ohci' Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-03-07
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: davinci: cpufreq: fix section mismatch warning DaVinci: fix compilation warnings in <mach/clkdev.h> davinci: tnetv107x: fix register indexing for GPIOs numbers > 31 davinci: da8xx/omap-l1x: add platform device for davinci-pcm-audio ARM: pxa/tosa: register wm9712 codec device ARM: pxa: enable pxa-pcm-audio on pxa210/pxa25x platform ARM: pxa/colibri: don't register pxa2xx-pcmcia nodes on non-colibri platforms ARM: pxa/tosa: drop setting LED trigger name, as it's unsupported now ARM: 6762/1: Update number of VIC for S5P6442 and S5PC100 ARM: 6761/1: Update number of VIC for S5PV210 ARM: 6768/1: hw_breakpoint: ensure debug logic is powered up on v7 cores ARM: 6767/1: ptrace: fix register indexing in GETHBPREGS request ARM: 6765/1: remove obsolete comment from asm/mach/arch.h ARM: 6757/1: fix tlb.h induced linux/swap.h build failure
| | * \ Merge branch 'davinci-fixes' of ↵Russell King2011-03-01
| | |\ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci into fixes
| | | * | davinci: cpufreq: fix section mismatch warningAxel Lin2011-02-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix below section mismatch warning: WARNING: vmlinux.o(.data+0x673c): Section mismatch in reference from the variable davinci_driver to the function .init.text:davinci_cpu_init() The variable davinci_driver references the function __init davinci_cpu_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console, Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | DaVinci: fix compilation warnings in <mach/clkdev.h>Sergei Shtylyov2011-02-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6d803ba736abb5e122dede70a4720e4843dd6df4 (ARM: 6483/1: arm & sh: factorised duplicated clkdev.c) caused the following warnings: In file included from /home/headless/src/kernel.org/linux-davinci/arch/arm/ include/asm/clkdev.h:17, from include/linux/clkdev.h:15, from arch/arm/mach-davinci/clock.h:71, from arch/arm/mach-davinci/common.c:22: arch/arm/mach-davinci/include/mach/clkdev.h:4: warning: `struct clk' declared inside parameter list arch/arm/mach-davinci/include/mach/clkdev.h:4: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/mach-davinci/include/mach/clkdev.h:9: warning: `struct clk' declared inside parameter list Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | davinci: tnetv107x: fix register indexing for GPIOs numbers > 31Hirosh Dabui2011-02-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix a bug in the register indexing for GPIOs numbers > 31 to get the relevant hardware registers of tnetv107x to control the GPIOs. In the structure tnetv107x_gpio_regs: struct tnetv107x_gpio_regs { u32 idver; u32 data_in[3]; u32 data_out[3]; u32 direction[3]; u32 enable[3]; }; The GPIO hardware register addresses of tnetv107x are stored. The chip implements 3 registers of each entity to serve 96 GPIOs, each register provides a subset of 32 GPIOs. The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and gpio_reg_clear_bit. The bug implied the use of macros to access the relevant hardware register e.g. the driver code used the macro like this: 'gpio_reg_clear_bit(&reg->data_out, gpio)' But it has to be used like this: 'gpio_reg_clear_bit(reg->data_out, gpio)'. The different results are shown here: - &reg->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes) - reg->data_out + 1 (it will increment only the size of data_out i.e. only 4 bytes) Acked-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Hirosh Dabui <hirosh.dabui@snom.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-24 06:44:09 -0500