| Commit message (Collapse) | Author | Age |
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git://git.kernel.org/pub/scm/linux/kernel/git/rric/oprofile into perf/core
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With this patch the OProfile Basic Mode Sampling support for System z
is enhanced with a counter file system. That way hardware sampling
can be configured using the user space tools with only little
modifications.
With the patch by default new cpu_types (s390/z10, s390/z196) are
returned in order to indicate that we are running a CPU which provides
the hardware sampling facility. Existing user space tools will
complain about an unknown cpu type. In order to be compatible with
existing user space tools the `cpu_type' module parameter has been
added. Setting the parameter to `timer' will force the module to
return `timer' as cpu_type. The module will still try to use hardware
sampling if available and the hwsampling virtual filesystem will be
also be available for configuration. So this has a different effect
than using the generic oprofile module parameter `timer=1'.
If the basic mode sampling is enabled on the machine and the
cpu_type=timer parameter is not used the kernel module will provide
the following virtual filesystem:
/dev/oprofile/0/enabled
/dev/oprofile/0/event
/dev/oprofile/0/count
/dev/oprofile/0/unit_mask
/dev/oprofile/0/kernel
/dev/oprofile/0/user
In the counter file system only the values of 'enabled', 'count',
'kernel', and 'user' are evaluated by the kernel module. Everything
else must contain fixed values.
The 'event' value only supports a single event - HWSAMPLING with value
0.
The 'count' value specifies the hardware sampling rate as it is passed
to the CPU measurement facility.
The 'kernel' and 'user' flags can now be used to filter for samples
when using hardware sampling.
Additionally also the following file will be created:
/dev/oprofile/timer/enabled
This will always be the inverted value of /dev/oprofile/0/enabled. 0
is not accepted without hardware sampling.
Signed-off-by: Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
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Removing remainings of oprofile_timer_exit() completly.
Signed-off-by: Robert Richter <robert.richter@amd.com>
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KVM needs to know perf capability to decide which PMU it can expose to a
guest.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1320929850-10480-8-git-send-email-gleb@redhat.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Implement the disabling of arch events as a quirk so that we can print
a message along with it. This creates some visibility into the problem
space and could allow us to work on adding more work-around like the
AAJ80 one.
Requested-by: Ingo Molnar <mingo@elte.hu>
Cc: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/n/tip-wcja2z48wklzu1b0nkz0a5y7@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Intel CPUs report non-available architectural events in cpuid leaf
0AH.EBX. Use it to disable events that are not available according
to CPU.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1320929850-10480-7-git-send-email-gleb@redhat.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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WARNING: arch/x86/kernel/built-in.o(.text+0x4c71): Section mismatch in
reference from the function arch_jump_label_transform_static() to the
function .init.text:text_poke_early()
The function arch_jump_label_transform_static() references
the function __init text_poke_early().
This is often because arch_jump_label_transform_static lacks a __init
annotation or the annotation of text_poke_early is wrong.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Jason Baron <jbaron@redhat.com>
Link: http://lkml.kernel.org/n/tip-9lefe89mrvurrwpqw5h8xm8z@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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This avoids a scheduling failure for cases like:
cycles, cycles, instructions, instructions (on Core2)
Which would end up being programmed like:
PMC0, PMC1, FP-instructions, fail
Because all events will have the same weight.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/n/tip-8tnwb92asqj7xajqqoty4gel@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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The current x86 event scheduler fails to resolve scheduling problems
of certain combinations of events and constraints. This happens if the
counter mask of such an event is not a subset of any other counter
mask of a constraint with an equal or higher weight, e.g. constraints
of the AMD family 15h pmu:
counter mask weight
amd_f15_PMC30 0x09 2 <--- overlapping counters
amd_f15_PMC20 0x07 3
amd_f15_PMC53 0x38 3
The scheduler does not find then an existing solution. Here is an
example:
event code counter failure possible solution
0x02E PMC[3,0] 0 3
0x043 PMC[2:0] 1 0
0x045 PMC[2:0] 2 1
0x046 PMC[2:0] FAIL 2
The event scheduler may not select the correct counter in the first
cycle because it needs to know which subsequent events will be
scheduled. It may fail to schedule the events then.
To solve this, we now save the scheduler state of events with
overlapping counter counstraints. If we fail to schedule the events
we rollback to those states and try to use another free counter.
Constraints with overlapping counters are marked with a new introduced
overlap flag. We set the overlap flag for such constraints to give the
scheduler a hint which events to select for counter rescheduling. The
EVENT_CONSTRAINT_OVERLAP() macro can be used for this.
Care must be taken as the rescheduling algorithm is O(n!) which will
increase scheduling cycles for an over-commited system dramatically.
The number of such EVENT_CONSTRAINT_OVERLAP() macros and its counter
masks must be kept at a minimum. Thus, the current stack is limited to
2 states to limit the number of loops the algorithm takes in the worst
case.
On systems with no overlapping-counter constraints, this
implementation does not increase the loop count compared to the
previous algorithm.
V2:
* Renamed redo -> overlap.
* Reimplementation using perf scheduling helper functions.
V3:
* Added WARN_ON_ONCE() if out of save states.
* Changed function interface of perf_sched_restore_state() to use bool
as return value.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/1321616122-1533-3-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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This patch introduces x86 perf scheduler code helper functions. We
need this to later add more complex functionality to support
overlapping counter constraints (next patch).
The algorithm is modified so that the range of weight values is now
generated from the constraints. There shouldn't be other functional
changes.
With the helper functions the scheduler is controlled. There are
functions to initialize, traverse the event list, find unused counters
etc. The scheduler keeps its own state.
V3:
* Added macro for_each_set_bit_cont().
* Changed functions interfaces of perf_sched_find_counter() and
perf_sched_next_event() to use bool as return value.
* Added some comments to make code better understandable.
V4:
* Fix broken event assignment if weight of the first event is not
wmin (perf_sched_init()).
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/1321616122-1533-2-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Merge reason: Add these cherry-picked commits so that future changes
on perf/core don't conflict.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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On AMD family 10h we see firmware bug messages like the following:
[Firmware Bug]: cpu 6, try to use APIC500 (LVT offset 0) for vector 0x10400, but the register is already in use for vector 0xf9 on another cpu
[Firmware Bug]: cpu 6, IBS interrupt offset 0 not available (MSRC001103A=0x0000000000000100)
[Firmware Bug]: using offset 1 for IBS interrupts
[Firmware Bug]: workaround enabled for IBS LVT offset
perf: AMD IBS detected (0x00000007)
We always see this, since the offsets are not assigned by the BIOS for
this family. Force LVT offset assignment in this case. If the OS
assignment fails, fallback to BIOS settings and try to setup this.
The fallback to BIOS settings weakens the family check since
force_ibs_eilvt_setup() may fail e.g. in case of virtual machines.
But setup may still succeed if BIOS offsets are correct.
Other families don't have a workaround implemented that assigns LVT
offsets. It's ok, to drop calling force_ibs_eilvt_setup() for that
families.
With the patch the [Firmware Bug] messages vanish. We see now:
IBS: LVT offset 1 assigned
perf: AMD IBS detected (0x00000007)
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20111109162225.GO12451@erda.amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Cc: Stephane Eranian <eranian@google.com>
Cc: stable@kernel.org
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Now that the core offcore support is fixed up (thanks Stephane) and we
have sane generic events utilizing them, re-enable the raw access to
the feature as well.
Note that it doesn't matter if you use event 0x1b7 or 0x1bb to specify
an offcore event, either one works and neither guarantees you'll end
up on a particular offcore MSR.
Based on original patch from: Vince Weaver <vweaver1@eecs.utk.edu>.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Vince Weaver <vweaver1@eecs.utk.edu>.
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/alpine.DEB.2.00.1108031200390.703@cl320.eecs.utk.edu
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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People (Linus) objected to using -ENOSPC to signal not having enough
resources on the PMU to satisfy the request. Use -EINVAL.
Requested-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/n/tip-xv8geaz2zpbjhlx0svmpp28n@git.kernel.org
[ merged to newer kernel, fixed up MIPS impact ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Masami spotted that we always try to decode the instruction stream as
64bit instructions when running a 64bit kernel, this doesn't work for
ia32-compat proglets.
Use TIF_IA32 to detect if we need to use the 32bit instruction
decoder.
Reported-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: stable@kernel.org
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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* 'rmobile-fixes-for-linus' of git://github.com/pmundt/linux-sh:
ARM: mach-shmobile: cpuidle single/global and last_state fixes
ARM: mach-shmobile: move helper macro PORTCR to sh_pfc.h
ARM: mach-shmobile: move helper macro PORT_xx to sh_pfc.h
ARM: mach-shmobile: move helper macro PORT_DATA_xx to sh_pfc.h
ARM: mach-shmobile: ap4evb: remove white space from end of line
ARM: mach-shmobile: clock-sh7372: remove un-necessary index
ARM: mach-shmobile: kota2: add comment out separator
ARM: mach-shmobile: sh73a0: add MMC data pin pull-up
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The following commits break cpuidle on SH-Mobile ARM:
46bcfad cpuidle: Single/Global registration of idle states
e978aa7 cpuidle: Move dev->last_residency update to driver enter routine; remove dev->last_state
This patch remedies these issues by up-porting the SH-Mobile
code to fit with the above introduced framework changes.
It is worth noting that the new code becomes significantly cleaner,
so these framework changes are very welcome. At the same time this
breakage could probably have been avoided by grepping for "last_state"
and "cpuidle_register_driver".
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch moves PORT_xx helper macro to sh_pfc.h,
and it expects CPU_ALL_PORT() macro for each CPU
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch move PORT_DATA_xx helper macro to sh_pfc.h.
and pfc-sh7372.c used it
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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it is not necessary to have sh7372_xxxx index on static variable
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds MMC data pin pull-up option for pfc-sh73a0.c,
and select it on ag5evm board.
The MMC read/write will be error without this patch.
Cc: Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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* 'sh-fixes-for-linus' of git://github.com/pmundt/linux-sh:
mailmap: Fix up some renesas attributions
sh: clkfwk: Kill off remaining debugfs cruft.
drivers: sh: Kill off dead pathname for runtime PM stub.
drivers: sh: Generalize runtime PM platform stub.
sh: Wire up process_vm syscalls.
sh: clkfwk: add clk_rate_mult_range_round()
serial: sh-sci: Fix up SH-2A SCIF support.
sh: Fix cached/uncaced address calculation in 29bit mode
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The runtime PM platform support stub in use by ARM-based SH/R-Mobile
platforms contains nothing that's specifically ARM-related and instead of
wholly generic to anything using the clock framework.
The recent runtime PM changes interact rather badly with the lazy
disabling of clocks late in the boot process through the clock framework,
leading to situations where the runtime suspend/resume paths are entered
without a clock being actively driven due to having been lazily gated
off.
In order to correct this we can trivially tie in the aforementioned stub
as a general fallback for all SH platforms that don't presently have
their own runtime PM implementations (the corner case being SH-based
SH-Mobile platforms, which have their own stub through the hwblk API --
which in turn has bitrotted and will be subsequently adapted to use the
same stub as everyone else), regardless of whether the platforms choose
to define power domains of their own or not.
This fixes up regressions for clock framework users who also build in
runtime PM support without any specific power domains of their own, which
was previously causing the serial console to be lost when warring with
lazy clock disabling.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This fixes up support for SH-2(A) SCIFs by introducing a new regtype. As
expected, it's close to the SH-4A SCIF with fifodata, but still different
enough to warrant its own type.
Fixes up a number of FIFO overflows and similar for both SH7203/SH7264.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Tested-by: Federico Fuga <fuga@studiofuga.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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In the case of 29bit mode, CAC/UNCAC_ADDR does not return a right address.
This revises this problem by using P1SEGADDR and P2SEGADDR in 29bit mode.
Reported-by: Yutaro Ebihara <ebiharaml@si-linux.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Cc: stable@kernel.org
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm/imx: fix imx6q mmc error when mounting rootfs
arm/imx: fix AUTO_ZRELADDR selection
arm/imx: fix the references to ARCH_MX3
ARM: mx51/53: set pwm clock parent to ipg_perclk
arm/tegra: enable headphone detection gpio on seaboard
arm/dt: Fix ventana SDHCI power-gpios
arm/tegra: Don't create duplicate gpio and pinmux devices
ARM: at91: Fix USBA gadget registration
atmel/spi: fix missing probe
at91/yl-9200: Fix section mismatch
at91: vmalloc fix missing AT91_VIRT_BASE define
ARM: at91: usart: drop static map regs for dbgu
ARM: picoxcell: add extra temp register to addruart
ARM: msm: fix compilation flags for MSM_SCM
arm/mxs: fix mmc device adding for mach-mx28evk
ARM: mxc: Remove test_for_ltirq
ARM:i.MX: fix build error in clock-mx51-mx53.c
ARM:i.MX: fix build error in tzic/avic.c
ARM: mxc: fix local timer interrupt handling
msm: boards: Fix fallout from removal of machine_desc in fixup
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into fixes
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639da5ee3 (ARM: add an extra temp register to the low level debugging
addruart macro) didn't include picoxcell as it hadn't been merged at the
time. Fix up the compile breakage by adding the extra temp parameter.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
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git://git.pengutronix.de/git/imx/linux-2.6 into fixes
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The following error is seen in some case when mounting rootfs from
SD/MMC cards.
Waiting for root device /dev/mmcblk0p1...
mmc1: host does not support reading read-only switch. assuming write-enable.
mmc1: new high speed SDHC card at address b368
mmcblk0: mmc1:b368 SDC 3.74 GiB
mmcblk0: p1
mmc1: Timeout waiting for hardware interrupt.
mmcblk0: error -110 transferring data, sector 3678224, nr 40, cmd response 0x900, card status 0xc00
end_request: I/O error, dev mmcblk0, sector 3678225
Buffer I/O error on device mmcblk0p1, logical block 458754
lost page write due to I/O error on mmcblk0p1
This patch fixes the problem by lowering the usdhc clock and correcting
watermark configuration.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Chris Ball <cjb@laptop.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The AUTO_ZRELADDR selection for ARCH_IMX_V4_V5 and ARCH_MX5 should
really be mutually exclusive to ZBOOT_ROM just like what ARCH_IMX_V6_V7
does.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The config symbol ARCH_MX3 has been removed by commit 'a89cf59
arm/imx: merge i.MX3 and i.MX6', and it should not be referenced
any more.
The patch also change ARCH_MX* to SOC_IMX* for other platforms.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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into fixes
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CONFIG_MSM_SCM uses the smc instruction, which with some
toolchains requires a ".arch_extension" directive.
Cc: David Brown <davidb@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: David Brown <davidb@codeaurora.org>
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After 0744a3ee (ARM: platform fixups: remove mdesc argument to
fixup function, 2010-12-20) the fixup functions introduced in
9e775ad (ARM: 7012/1: Set proper TEXT_OFFSET for newer MSMs,
2011-08-12) cause warnings like:
arch/arm/mach-msm/board-msm8x60.c:85: warning: initialization
from incompatible pointer type
Fix them by removing the machine_desc argument from the fixup
functions.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into fixes
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Enable the headphone detection gpio on tegra platform.
Signed-off-by: Yufeng Shen <miletus@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Ventana uses the same SDHCI GPIOs as Seaboard; PI6 (70) is the power GPIO
for the SD port, and there is no power GPIO for the MMC chip.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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*_pinmux_init() register the GPIO and pinmux devices so that they're ready
before any other device needs them.
*_pinmux_init() are also called by board-dt.c in order to set up the GPIO
and pinmux configurations. In this case, if we register the devices, they
end up being probed once due to this registration, and a second time due
to a device-tree node (or vice-versa). The second probe fails since the
memory regions are already requested. Besides, we don't actually want the
duplicated devices.
To avoid this duplicate registration, modify *_pinmux_init() to check
whether it's running on a DT machine. If not, register the pinmux devices.
If so, don't register them.
Finally, modify board-dt.c to call the *_pinmux_init() after all devices have
been instantiated from device-tree. This allows the GPIO and pinmux devices
to be instantiated and initialized before calling functions to configure the
hardware.
This has one disadvantage: The pinmux and GPIO initialization now happens
after /all/ devices are instantiated, rather than after just gpio and
pinmux but before anything else. So the correct HW configuration is not
in place when e.g. the SD/MMC device is probed. Long-term, this should be
solved by doing both:
a) Initializing the HW state from DT nodes during GPIO and pinmux device
probe.
b) Using the deferred driver probe mechanism, so that drivers can defer
their probe until after the gpio and pinmux drivers have probed.
v2: s/int is_dt/bool is_dt/
v3: Use of_machine_is_compatible inside *_pinmux_init() rather than passing
an explicit parameter into the function from outside.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Since 193ab2a6070039e7ee2b9b9bebea754a7c52fd1b, various AT91 boards don't
register USBA adapters anymore due to depending on a now non-existing
symbol. Fix the symbol name.
Signed-off-by: Jochen Friedrich <jochen@scram.de>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
CC: stable@kernel.org
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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