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* [PATCH] x86_64: actively synchronize vmalloc area when registering certain ↵Jan Beulich2006-03-25
| | | | | | | | | | | | | | | | | | | | | | | callbacks While the modular aspect of the respective i386 patch doesn't apply to x86-64 (as the top level page directory entry is shared between modules and the base kernel), handlers registered with register_die_notifier() are still under similar constraints for touching ioremap()ed or vmalloc()ed memory. The likelihood of this problem becoming visible is of course significantly lower, as the assigned virtual addresses would have to cross a 2**39 byte boundary. This is because the callback gets invoked (a) in the page fault path before the top level page table propagation gets carried out (hence a fault to propagate the top level page table entry/entries mapping to module's code/data would nest infinitly) and (b) in the NMI path, where nested faults must absolutely not happen, since otherwise the IRET from the nested fault re-enables NMIs, potentially resulting in nested NMI occurences. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Use cpu_relax in poll loop in GART IOMMUAndi Kleen2006-03-25
| | | | | | | | The code waits for the GART to clear the TLB flush bit. Use cpu_relax in this time to allow hypervisors to yield the CPU in this time. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Report local APIC ID when initializing CPUAndi Kleen2006-03-25
| | | | | | | Makes some debugging easier. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Don't need to read PIT in timer handler when PM timer is usedAndi Kleen2006-03-25
| | | | | | | | | | The PM timer path through main_timer_handler doesn't need the delay variable because it figures it out in a different way. Don't try to read it from the PIT. With stopped PIT timer it is even useless. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: cleanup allocating logical cpu numbers in x86_64Ashok Raj2006-03-25
| | | | | | | | | | | | | | | Minor cleanup to lend better for physical CPU hotplug. Earlier way of using num_processors as index doesnt fit if CPUs come and go. This makes the code little bit better to read, and helps physical hotplug use the same functions as boot. Reserving CPU0 for BSP is too late to be done in smp_prepare_boot_cpu(). Since logical assignments from MADT is already done via setup_arch()->acpi_boot_init()->parse lapic Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: save FPU context slightly laterJan Beulich2006-03-25
| | | | | | | | | | | | Touching of the floating point state in a kernel debugger must be NMI-safe, specifically math_state_restore() must be able to deal with being called out of an NMI context. In order to do that reliably, the context switch code must take care to not leave a window open where the current task's TS_USEDFPU flag and CR0.TS could get out of sync. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: eliminate set_debug()Jan Beulich2006-03-25
| | | | | | | | | | For consistency and to have only a single place of definition, replace set_debug() uses with set_debugreg(), and eliminate the definition of thj former. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: disallow multi-byte hardware execution breakpointsJan Beulich2006-03-25
| | | | | | | | | While AMD formally permits multi-byte execution breakpoints, Intel disallows 8-byte as much as 2- or 4-byte ones. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: cpu_pda array to macro followup correctionJan Beulich2006-03-25
| | | | | | | | | Fix one place where the previous change of cpu_pda from being an array to being a macro was not properly carried out. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Rename struct node in x86-64 NUMA code to struct bootnodeAndi Kleen2006-03-25
| | | | | | | | | | | It conflicts with the struct node in node.h Actually the x86-64 version was there first, but .. Suggested by Jan Beulich Cc: jbeulich@novell.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86-64: Use -mtune=generic for generic kernelsAndi Kleen2006-03-25
| | | | | | | | | | | | | The upcomming gcc 4.2 got a new option -mtune=generic to tune code for both common AMD and Intel CPUs. Use this option when available for generic kernels. On x86-64 it is used with CONFIG_GENERIC_CPU. On i386 it is enabled with CONFIG_X86_GENERIC. It won't affect the base line CPU support in any ways and also not the minimum supported CPU. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Use correct PUD for memory hotaddJan Beulich2006-03-25
| | | | | | | | | Memory >39bits has a different PUD. Cc: "Tolentino, Matthew E" <matthew.e.tolentino@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Update defconfigAndi Kleen2006-03-25
| | | | | Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreqLinus Torvalds2006-03-25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] kzalloc conversion for gx-suspmod [CPUFREQ] Whitespace cleanup [CPUFREQ] Mark longhaul driver as broken. [PATCH] cpufreq: fix section mismatch warnings [CPUFREQ] Fix the p4-clockmod N60 errata workaround. [CPUFREQ] Fix handling for CPU hotplug [CPUFREQ] powernow-k8: Let cpufreq driver handle affected CPUs [CPUFREQ] Lots of whitespace & CodingStyle cleanup. [CPUFREQ] Remove duplicate cpuinfo struct [CPUFREQ] Silence powernow-k8 warning on k7's.
| * [CPUFREQ] kzalloc conversion for gx-suspmodDave Jones2006-03-11
| | | | | | | | Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] Whitespace cleanupDave Jones2006-03-11
| | | | | | | | Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] Mark longhaul driver as broken.Dave Jones2006-03-11
| | | | | | | | | | | | | | | | | | This seems to work for a short period of time, but when used in conjunction with a userspace governor that changes the frequency regularly, it's only a matter of time before everything just locks up. Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] Fix the p4-clockmod N60 errata workaround.Pallipadi, Venkatesh2006-03-10
| | | | | | | | | | | | | | Fix the code to disable freqs less than 2GHz in N60 errata. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] powernow-k8: Let cpufreq driver handle affected CPUsDave Jones2006-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | powernow-k8: Let cpufreq driver handle affected CPUs Let the cpufreq driver manage AMD Dual-Core CPUs being tied together. Since cpufreq driver's affected CPUs data, cpufreq_policy->cpus, already knows about which cores are tied together, powernow driver does not have keep its internal data for every core. (even a pointer.. it will never be called on) Telling cpufreq driver about cpu_core_map at init time is sufficient. Signed-off-by: Jacob Shin <jacob.shin@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] Lots of whitespace & CodingStyle cleanup.Dave Jones2006-02-28
| | | | | | | | Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] Remove duplicate cpuinfo structDave Jones2006-02-28
| | | | | | | | | | | | | | We already have one of these declared, so use it, instead of declaring a second one for no good reason. Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] Silence powernow-k8 warning on k7's.Dave Jones2006-02-28
| | | | | | | | Signed-off-by: Dave Jones <davej@redhat.com>
* | Merge branch 'release' of ↵Linus Torvalds2006-03-25
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] New IA64 core/thread detection patch [IA64] Increase max node count on SN platforms [IA64] Increase max node count on SN platforms [IA64] Increase max node count on SN platforms [IA64] Increase max node count on SN platforms [IA64] Tollhouse HP: IA64 arch changes [IA64] cleanup dig_irq_init [IA64] MCA recovery: kernel context recovery table IA64: Use early_parm to handle mvec_name and nomca [IA64] move patchlist and machvec into init section [IA64] add init declaration - nolwsys [IA64] add init declaration - gate page functions [IA64] add init declaration to memory initialization functions [IA64] add init declaration to cpu initialization functions [IA64] add __init declaration to mca functions [IA64] Ignore disabled Local SAPIC Affinity Structure in SRAT [IA64] sn_check_intr: use ia64_get_irr() [IA64] fix ia64 is_hugepage_only_range
| * | [IA64] New IA64 core/thread detection patchFenghua Yu2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IPF SDM 2.2 changes definition of PAL_LOGICAL_TO_PHYSICAL to add proc_number=-1 to get core/thread mapping info on the running processer. Based on this change, we had better to update existing core/thread detection in IA64 kernel correspondingly. The attached patch implements this change. It simplifies detection code and eliminates potential race condition. It also runs a bit faster and has better scalability especially when cores and threads number grows up in one package. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Increase max node count on SN platformsJack Steiner2006-03-24
| | | | | | | | | | | | | | | | | | | | | Update configuration files with new CONFIG option. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Increase max node count on SN platformsJack Steiner2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | Node number are kept in the cpu_to_node_map which is currently defined as u8. Change to u16 to accomodate larger node numbers. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Increase max node count on SN platformsJack Steiner2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support in IA64 acpi for platforms that support more than 256 nodes. Currently, ACPI is limited to 256 nodes because the proximity domain number is 8-bits. Long term, we expect to use ACPI3.0 to support >256 nodes. This patch is an interim solution that works with platforms that pass the high order bits of the proximity domain in "reserved" fields of the ACPI tables. This code is enabled ONLY on SN platforms. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Increase max node count on SN platformsJack Steiner2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a configuration option to allow the maximum number of nodes to be configurable for GENERIC or SN kernels. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Tollhouse HP: IA64 arch changesPrarit Bhargava2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | arch/ia64/sn and include/asm-ia64/sn changes required to support Tollhouse system PCI hotplug, fixes the ia64_sn_sysctl_ioboard_get call, and introduces the PRF_HOTPLUG_SUPPORT feature bit. Signed-off-by: Prarit Bhargava <prarit@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] cleanup dig_irq_initChen, Kenneth W2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | dig_irq_init is equivalent to machvec_noop, no need to define another empty function. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] MCA recovery: kernel context recovery tableRuss Anderson2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Memory errors encountered by user applications may surface when the CPU is running in kernel context. The current code will not attempt recovery if the MCA surfaces in kernel context (privilage mode 0). This patch adds a check for cases where the user initiated the load that surfaces in kernel interrupt code. An example is a user process lauching a load from memory and the data in memory had bad ECC. Before the bad data gets to the CPU register, and interrupt comes in. The code jumps to the IVT interrupt entry point and begins execution in kernel context. The process of saving the user registers (SAVE_REST) causes the bad data to be loaded into a CPU register, triggering the MCA. The MCA surfaces in kernel context, even though the load was initiated from user context. As suggested by David and Tony, this patch uses an exception table like approach, puting the tagged recovery addresses in a searchable table. One difference from the exception table is that MCAs do not surface in precise places (such as with a TLB miss), so instead of tagging specific instructions, address ranges are registers. A single macro is used to do the tagging, with the input parameter being the label of the starting address and the macro being the ending address. This limits clutter in the code. This patch only tags one spot, the interrupt ivt entry. Testing showed that spot to be a "heavy hitter" with MCAs surfacing while saving user registers. Other spots can be added as needed by adding a single macro. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | IA64: Use early_parm to handle mvec_name and nomcaHorms2006-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm not sure of the worthiness of this idea, so please consider it an RFC. Its key merits are: * Reuse existing infrastructure * Greatly tightens up the parsing of nomca * Greatly simplifies the parsing of machvec Addition cleanup (moving setup_mvec() to machvec.c) by Ken Chen. Signed-Off-By: Horms <horms@verge.net.au> Signed-Off-By: Tony Luck <tony.luck@intel.com>
| * | [IA64] move patchlist and machvec into init sectionChen, Kenneth W2006-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ia64_mv is initialized based on platform detected or specified. However, there is one instantiation of each platform type. We don't expect to switch platform vector during run time. Move those platform specific type into init section since a copy is made into global ia64_mv at initialization. Also move instruction patch list into init section as well. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] add init declaration - nolwsysChen, Kenneth W2006-03-22
| | | | | | | | | | | | | | | | | | | | | Add __initdata to nolwsys. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] add init declaration - gate page functionsChen, Kenneth W2006-03-22
| | | | | | | | | | | | | | | | | | | | | | | | Add init declaration to bunch of patch functions and gate page setup function. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] add init declaration to memory initialization functionsChen, Kenneth W2006-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add init declaration to variables/functions used for memory initialization. I don't think they would clash with memory hotplug. If they do, please yell. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] add init declaration to cpu initialization functionsChen, Kenneth W2006-03-22
| | | | | | | | | | | | | | | | | | | | | Add init declaration to cpu initialization functions. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] add __init declaration to mca functionsChen, Kenneth W2006-03-22
| | | | | | | | | | | | | | | | | | | | | | | | Mark init related variable and functions with appropriate __init* declaration to mca functions. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Ignore disabled Local SAPIC Affinity Structure in SRATKenji Kaneshige2006-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the ACPI spec, the OSPM must ignore the contents of the Processor Local APIC/SAPIC Affinity Structure in System Resource Affinity Table (SRAT), if its enable flag is cleared. However, ia64 linux refers all of the Processor Local APIC/SAPIC Affinity Structures in SRAT regardless of the enable flag. This is obviously against the ACPI spec. This patch fixes this bug. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] sn_check_intr: use ia64_get_irr()Bjorn Helgaas2006-03-22
| | | | | | | | | | | | | | | | | | | | | | | | Use the recently-added ia64_get_irr() rather than duplicating the code. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Acked-by: Jes Sorensen <jes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] fix ia64 is_hugepage_only_rangeChen, Kenneth W2006-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix is_hugepage_only_range() definition to be "overlaps" instead of "within architectural restricted hugetlb address range". Simplify the ia64 specific code that used to use is_hugepage_only_range() to just check which region the address is in. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | Merge master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuildLinus Torvalds2006-03-25
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild: (46 commits) kbuild: remove obsoleted scripts/reference_* files kbuild: fix make help & make *pkg kconfig: fix time ordering of writes to .kconfig.d and include/linux/autoconf.h Kconfig: remove the CONFIG_CC_ALIGN_* options kbuild: add -fverbose-asm to i386 Makefile kbuild: clean-up genksyms kbuild: Lindent genksyms.c kbuild: fix genksyms build error kbuild: in makefile.txt note that Makefile is preferred name for kbuild files kbuild: replace PHONY with FORCE kbuild: Fix bug in crc symbol generating of kernel and modules kbuild: change kbuild to not rely on incorrect GNU make behavior kbuild: when warning symbols exported twice now tell user this is the problem kbuild: fix make dir/file.xx when asm symlink is missing kbuild: in the section mismatch check try harder to find symbols kbuild: fix section mismatch check for unwind on IA64 kbuild: kill false positives from section mismatch warnings for powerpc kbuild: kill trailing whitespace in modpost & friends kbuild: small update of allnoconfig description kbuild: make namespace.pl CROSS_COMPILE happy ... Trivial conflict in arch/ppc/boot/Makefile manually fixed up
| * | | kbuild: change kbuild to not rely on incorrect GNU make behaviorPaul Smith2006-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kbuild system takes advantage of an incorrect behavior in GNU make. Once this behavior is fixed, all files in the kernel rebuild every time, even if nothing has changed. This patch ensures kbuild works with both the incorrect and correct behaviors of GNU make. For more details on the incorrect behavior, see: http://lists.gnu.org/archive/html/bug-make/2006-03/msg00003.html Changes in this patch: - Keep all targets that are to be marked .PHONY in a variable, PHONY. - Add .PHONY: $(PHONY) to mark them properly. - Remove any $(PHONY) files from the $? list when determining whether targets are up-to-date or not. Signed-off-by: Paul Smith <psmith@gnu.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
| * | | x86: align per-cpu section to configured cache bytesZach Brown2006-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This matches the fix for a bug seen on x86-64. Test booted on old hardware that had 32 byte cachelines to begin with. Signed-off-by: Zach Brown <zach.brown@oracle.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* | | | [PATCH] cpufreq: speedstep-smi asm fixAndrew Morton2006-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix bug identified by Linus Torvalds <torvalds@osdl.org>: the `out' instruction depends upon the state of memory_data[], so we need to tell gcc that before executing it. (The opcode, not gcc). Fixes http://bugzilla.kernel.org/show_bug.cgi?id=5553 Thanks to Antonio Ospite <ospite@studenti.unina.it> for testing. Cc: Dave Jones <davej@codemonkey.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2006-03-25
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC]: Try to start getting SMP back into shape.
| * | | | [SPARC]: Try to start getting SMP back into shape.Bob Breuer2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Todo items: - IRQ_INPROGRESS flag - use sparc64 irq buckets, or generic irq_desc? - sun4d - re-indent large chunks of sun4m_smp.c - some places assume sequential cpu numbering (i.e. 0,1 instead of 0,2) Last I checked (with 2.6.14), random programs segfault with dual HyperSPARC. And with SuperSPARC II's, it seems stable but will eventually die from a write lock error (wrong lock owner or something). I haven't tried the HyperSPARC + highmem combination recently, so that may still be a problem. Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | | [PATCH] Check if cpu can be onlined before calling smp_prepare_cpu()Ashok Raj2006-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Moved check for online cpu out of smp_prepare_cpu() - Moved default declaration of smp_prepare_cpu() to kernel/cpu.c - Removed lock_cpu_hotplug() from smp_prepare_cpu() to around it, since its called from cpu_up() as well now. - Removed clearing from cpu_present_map during cpu_offline as it breaks using cpu_up() directly during a subsequent online operation. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Cc: Srivatsa Vaddagiri <vatsa@in.ibm.com> Cc: "Li, Shaohua" <shaohua.li@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | [PATCH] collie: fix missing pcmcia bitsPavel Machek2006-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds missing bits of collie (sharp sl-5500) PCMCIA support and MFD support. Signed-off-by: Pavel Machek <pavel@suse.cz> Acked-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | | | [PATCH] kconfig: clarify memory debug optionsAndrew Morton2006-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig text for CONFIG_DEBUG_SLAB and CONFIG_DEBUG_PAGEALLOC have always seemed a bit confusing. Change them to: CONFIG_DEBUG_SLAB: "Debug slab memory allocations" CONFIG_DEBUG_PAGEALLOC: "Debug page memory allocations" Cc: "David S. Miller" <davem@davemloft.net> Cc: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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