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* [SPARC64]: More sensible udelay implementation.David S. Miller2007-07-16
| | | | | | | | | | Take a page from the powerpc folks and just calculate the delay factor directly. Since frequency scaling chips use a system-tick register, the value is going to be the same system-wide. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: SMP build fixes.David S. Miller2007-07-16
| | | | | | | | | | | | | | | | | | With the move of ldom_startcpu_cpuid() into smp.c some other things need to follow along: 1) smp.c is not a driver so we can't use "PFX" macro in the printk calls. 2) smp.c now needs asm/io.h and asm/hvtramp.h, ds.c no longer does 3) kimage_addr_to_ra() also needs to move into smp.c While we're here, update copyright info and my email address in smp.c Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: mdesc.c needs linux/mm.hDavid S. Miller2007-07-16
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix build regressions added by dr-cpu changes.David S. Miller2007-07-16
| | | | | | | | | | | | | | | Do not select HOTPLUG_CPU from SUN_LDOMS, that causes HOTPLUG_CPU to be selected even on non-SMP which is illegal. Only build hvtramp.o when SMP, just like trampoline.o Protect dr-cpu code in ds.c with HOTPLUG_CPU. Likewise move ldom_startcpu_cpuid() to smp.c and protect it and the call site with SUN_LDOMS && HOTPLUG_CPU. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Unconditionally register vio_bus_type.David S. Miller2007-07-16
| | | | | | | | The VIO drivers register themselves unconditionally just like those of any other bus type, so to avoid crashes on non-VIO systems we need to always register vio_bus_type. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Initial LDOM cpu hotplug support.David S. Miller2007-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only adding cpus is supports at the moment, removal will come next. When new cpus are configured, the machine description is updated. When we get the configure request we pass in a cpu mask of to-be-added cpus to the mdesc CPU node parser so it only fetches information for those cpus. That code also proceeds to update the SMT/multi-core scheduling bitmaps. cpu_up() does all the work and we return the status back over the DS channel. CPUs via dr-cpu need to be booted straight out of the hypervisor, and this requires: 1) A new trampoline mechanism. CPUs are booted straight out of the hypervisor with MMU disabled and running in physical addresses with no mappings installed in the TLB. The new hvtramp.S code sets up the critical cpu state, installs the locked TLB mappings for the kernel, and turns the MMU on. It then proceeds to follow the logic of the existing trampoline.S SMP cpu bringup code. 2) All calls into OBP have to be disallowed when domaining is enabled. Since cpus boot straight into the kernel from the hypervisor, OBP has no state about that cpu and therefore cannot handle being invoked on that cpu. Luckily it's only a handful of interfaces which can be called after the OBP device tree is obtained. For example, rebooting, halting, powering-off, and setting options node variables. CPU removal support will require some infrastructure changes here. Namely we'll have to process the requests via a true kernel thread instead of in a workqueue. workqueues run on a per-cpu thread, but when unconfiguring we might need to force the thread to execute on another cpu if the current cpu is the one being removed. Removal of a cpu also causes the kernel to destroy that cpu's workqueue running thread. Another issue on removal is that we may have interrupts still pointing to the cpu-to-be-removed. So new code will be needed to walk the active INO list and retarget those cpus as-needed. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix setting of variables in LDOM guest.David S. Miller2007-07-16
| | | | | | | | | There is a special domain services capability for setting variables in the OBP options node. Guests don't have permanent store for the OBP variables like a normal system, so they are instead maintained in the LDOM control node or in the SC. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix MD property lifetime bugs.David S. Miller2007-07-16
| | | | | | | | | | Property values cannot be referenced outside of mdesc_grab()/mdesc_release() pairs. The only major offender was the VIO bus layer, easily fixed. Add some commentary to mdesc.h describing these rules. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Abstract out mdesc accesses for better MD update handling.David S. Miller2007-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we have to be able to handle MD updates, having an in-tree set of data structures representing the MD objects actually makes things more painful. The MD itself is easy to parse, and we can implement the existing interfaces using direct parsing of the MD binary image. The MD is now reference counted, so accesses have to now take the form: handle = mdesc_grab(); ... operations on MD ... mdesc_release(handle); The only remaining issue are cases where code holds on to references to MD property values. mdesc_get_property() returns a direct pointer to the property value, most cases just pull in the information they need and discard the pointer, but there are few that use the pointer directly over a long lifetime. Those will be fixed up in a subsequent changeset. A preliminary handler for MD update events from domain services is there, it is rudimentry but it works and handles all of the reference counting. It does not check the generation number of the MDs, and it does not generate a "add/delete" list for notification to interesting parties about MD changes but that will be forthcoming. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Use more mearningful names for IRQ registry.David S. Miller2007-07-16
| | | | | | | | | All of the interrupts say "LDX RX" and "LDX TX" currently which is next to useless. Put a device specific prefix before "RX" and "TX" instead which makes it much more useful. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Initial domain-services driver.David S. Miller2007-07-16
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Export powerd facilities for external entities.David S. Miller2007-07-16
| | | | | | | | Besides the existing usage for power-button interrupts, we'll want to make use of this code for domain-services where the LDOM manager can send reboot requests to the guest node. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Add domain-services nodes to VIO device tree.David S. Miller2007-07-16
| | | | | | | They sit under the root of the MD tree unlike the rest of the LDC channel based virtual devices. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Assorted LDC bug cures.David S. Miller2007-07-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | 1) LDC_MODE_RELIABLE is deprecated an unused by anything, plus it and LDC_MODE_STREAM were mis-numbered. 2) read_stream() should try to read as much as possible into the per-LDC stream buffer area, so do not trim the read_nonraw() length by the caller's size parameter. 3) Send data ACKs when necessary in read_nonraw(). 4) In read_nonraw() when we get a pure ACK, advance the RX head unconditionally past it. 5) Provide the ACKID field in the ldcdgb() packet dump in read_nonraw(). This helps debugging stream mode LDC channel problems. 6) Decrease verbosity of rx_data_wait() so that it is more useful. A debugging message each loop iteration is too much. 7) In process_data_ack() stop the loop checking when we hit lp->tx_tail not lp->tx_head. 8) Set the seqid field properly in send_data_nack(). Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Do not ACK an INO if it is disabled or inprogress.David S. Miller2007-07-16
| | | | | | | | | | | | | | | | | | | This is also a partial workaround for a bug in the LDOM firmware which double-transmits RX inos during high load. Without this, such an event causes the kernel to loop forever in the interrupt call chain ACK'ing but never actually running the IRQ handler (and thus clearing the interrupt condition in the device). There is still a bad potential effect when double INOs occur, not covered by this changeset. Namely, if the INO is already on the per-cpu INO vector list, we still blindly re-insert it and thus we can end up losing interrupts already linked in after it. We could deal with that by traversing the list before insertion, but that's too expensive for this edge case. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Add LDOM virtual channel driver and VIO device layer.David S. Miller2007-07-16
| | | | | | | | | | | | | | | | Virtual devices on Sun Logical Domains are built on top of a virtual channel framework. This, with help of hypervisor interfaces, provides a link layer protocol with basic handshaking over which virtual device clients and servers communicate. Built on top of this is a VIO device protocol which has it's own handshaking and message types. At this layer attributes are exchanged (disk size, network device addresses, etc.) descriptor rings are registered, and data transfers are triggers and replied to. Signed-off-by: David S. Miller <davem@davemloft.net>
* missing argument in bin_attribute ->read()/->write()Al Viro2007-07-15
| | | | | | | | Fallout from commit 91a6902958f052358899f58683d44e36228d85c2 ('sysfs: add parameter "struct bin_attribute *" ...') Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* pass -msize-long to sparse on s390Al Viro2007-07-15
| | | | | | | | s390 is the only 32bit with unsigned long for size_t (usual for those is unsigned int). Tell sparse... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* the wrong variable checked after request_irq()Al Viro2007-07-15
| | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreqLinus Torvalds2007-07-13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] Fix typos in powernow-k8 printk's. [CPUFREQ] Restore previously used governor on a hot-replugged CPU [CPUFREQ] bugfix cpufreq in combination with performance governor [CPUFREQ] powernow-k8 compile fix. [CPUFREQ] the overdue removal of X86_SPEEDSTEP_CENTRINO_ACPI [CPUFREQ] Longhaul - Option to disable ACPI C3 support Fixed up arch/i386/kernel/cpu/cpufreq/powernow-k8.c due to revert that got fixed differently in the cpufreq branch. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * [CPUFREQ] Fix typos in powernow-k8 printk's.Dave Jones2007-07-13
| | | | | | | | | | | | | | | | | | | | Based on a patch from Joachim which didn't apply, so I fixed it up by hand, and also corrected the surrounding indentation a little. Signed-off-by: Joachim.Deguara <joachim.deguara@amd.com> Acked-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] powernow-k8 compile fix.Andrew Morton2007-07-13
| | | | | | | | | | | | | | Make it compile on UP. Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] the overdue removal of X86_SPEEDSTEP_CENTRINO_ACPIAdrian Bunk2007-07-13
| | | | | | | | | | | | | | | | This patch contains the overdue removal of X86_SPEEDSTEP_CENTRINO_ACPI. Signed-off-by: Adrian Bunk <bunk@stusta.de> Acked-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * [CPUFREQ] Longhaul - Option to disable ACPI C3 supportRafał Bilski2007-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | On some motherboards ACPI C3 is available, but it isn't causing frequency transition on VIA Nehemiah. Longhaul wasn't working at all earlier, but due to scaling_cur_speed returning true CPU frequency now, it looks like CPU is getting stuck at highest frequency since 2.6.21. I didn't find a reason. Halt is causing frequency transition. Signed-off-by: Rafal Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com>
* | Merge branch 'ioat-md-accel-for-linus' of ↵Linus Torvalds2007-07-13
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://lost.foo-projects.org/~dwillia2/git/iop * 'ioat-md-accel-for-linus' of git://lost.foo-projects.org/~dwillia2/git/iop: (28 commits) ioatdma: add the unisys "i/oat" pci vendor/device id ARM: Add drivers/dma to arch/arm/Kconfig iop3xx: surface the iop3xx DMA and AAU units to the iop-adma driver iop13xx: surface the iop13xx adma units to the iop-adma driver dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines md: remove raid5 compute_block and compute_parity5 md: handle_stripe5 - request io processing in raid5_run_ops md: handle_stripe5 - add request/completion logic for async expand ops md: handle_stripe5 - add request/completion logic for async read ops md: handle_stripe5 - add request/completion logic for async check ops md: handle_stripe5 - add request/completion logic for async compute ops md: handle_stripe5 - add request/completion logic for async write ops md: common infrastructure for running operations with raid5_run_ops md: raid5_run_ops - run stripe operations outside sh->lock raid5: replace custom debug PRINTKs with standard pr_debug raid5: refactor handle_stripe5 and handle_stripe6 (v3) async_tx: add the async_tx api xor: make 'xor_blocks' a library routine for use with async_tx dmaengine: make clients responsible for managing channels dmaengine: refactor dmaengine around dma_async_tx_descriptor ...
| * | ARM: Add drivers/dma to arch/arm/KconfigDan Williams2007-07-13
| | | | | | | | | | | | | | | Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | iop3xx: surface the iop3xx DMA and AAU units to the iop-adma driverDan Williams2007-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the platform device definitions and the architecture specific support routines (i.e. register initialization and descriptor formats) for the iop-adma driver. Changelog: * add support for > 1k zero sum buffer sizes * added dma/aau platform devices to iq80321 and iq80332 setup * fixed the calculation in iop_desc_is_aligned * support xor buffer sizes larger than 16MB * fix places where software descriptors are assumed to be contiguous, only hardware descriptors are contiguous for up to a PAGE_SIZE buffer size * convert to async_tx * add interrupt support * add platform devices for 80219 boards * do not call platform register macros in driver code * remove switch() statements for compatible register offsets/layouts * change over to bitmap based capabilities * remove unnecessary ARM assembly statement * checkpatch.pl fixes * gpl v2 only correction * phys move to dma_async_tx_descriptor Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | iop13xx: surface the iop13xx adma units to the iop-adma driverDan Williams2007-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds the platform device definitions and the architecture specific support routines (i.e. register initialization and descriptor formats) for the iop-adma driver. Changelog: * added 'descriptor pool size' to the platform data * add base support for buffer sizes larger than 16MB (hw max) * build error fix from Kirill A. Shutemov * rebase for async_tx changes * add interrupt support * do not call platform register macros in driver code * remove unnecessary ARM assembly statement * checkpatch.pl fixes * gpl v2 only correction Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2007-07-13
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Workaround for a sparse warning in include/asm-mips/mach-tx4927/ioremap.h [MIPS] Make show_code static and add __user tag [MIPS] Workaround for a sparse warning in include/asm-mips/compat.h [MIPS] Add some __user tags [MIPS] math-emu minor cleanup [MIPS] Kill CONFIG_TX4927BUG_WORKAROUND [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_FB_XPERT98 [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1000_SRC_CLK [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1000_USE32K [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1XXX_PSC_SPI [CHAR] Delete leftovers of old Alchemy UART driver
| * | | [MIPS] Make show_code static and add __user tagAtsushi Nemoto2007-07-13
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Add some __user tagsAtsushi Nemoto2007-07-13
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] math-emu minor cleanupAtsushi Nemoto2007-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Declaring emulpc and contpc as "unsigned long" can get rid of some casts. This also get rid of some sparse warnings. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Kill CONFIG_TX4927BUG_WORKAROUNDAtsushi Nemoto2007-07-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Kill workarounds for very early chip (perhaps pre-TX4927A). Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_FB_XPERT98Ralf Baechle2007-07-13
| | | | | | | | | | | | | | | | | | | | | | | | Noticed by Robert P. J. Day (rpjday@mindspring.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1000_SRC_CLKRalf Baechle2007-07-13
| | | | | | | | | | | | | | | | | | | | | | | | Noticed by Robert P. J. Day (rpjday@mindspring.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1000_USE32KRalf Baechle2007-07-13
| | | | | | | | | | | | | | | | | | | | | | | | Noticed by Robert P. J. Day (rpjday@mindspring.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1XXX_PSC_SPIRalf Baechle2007-07-13
| | |/ | |/| | | | | | | | | | | | | Noticed by Robert P. J. Day (rpjday@mindspring.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* / | Revert "[CPUFREQ] powernow-k8: clarify number of cores."Linus Torvalds2007-07-13
|/ / | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 904f7a3f042b5c6aa9e53ce83f2c9de5e33170ff. As noted by Peter Anvin: "It causes build failures on i386. Yet another case of unnecessary divergence between i386 and x86-64 I'm afraid..." Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-07-12
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (50 commits) [ARM] sa1100: remove boot time RTC initialisation [ARM] sa1100: stop doing our own rtc management over suspend [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs [ARM] 4473/2: Take the HWCAP definitions out of the elf.h file [ARM] pxa: move platform devices to separate header file [ARM] pxa: move device registration into CPU-specific file [ARM] pxa: remove boot time RTC initialisation [ARM] pxa: stop doing our own rtc management over suspend [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma code [ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq() [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs [ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler() [ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio() [ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low() [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS [ARM] 4434/1: PXA: remove PXA_IRQ_SKIP [ARM] pxa: Fix PXA27x suspend type validation, remove pxa_pm_prepare() [ARM] pxa: move pm_ops structure into CPU specific files [ARM] pxa: introduce cpu_is_pxaXXX macros [ARM] pxa: remove MMC register defines from pxa-regs.h ...
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| *-------------. \ Merge branches 'at91', 'davinci', 'imx', 'iop', 'ixp', 'ks8695', 'misc', ↵Russell King2007-07-12
| |\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pxa' and 's3c' into devel
| | | | | | | | | * | [ARM] 4470/2: OSIRIS: large page NAND supportBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the partition layout on the revision B modules which have large page NAND fitted. The new partition table accounts for the use of the 128KiB block parts, which means the second partition on the device is moved to the new boundary. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] 4467/3: BAST: AX88796 device resourcesBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add resources for the AX88796 on the Simtec BAST. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] 4469/1: ANUBIS: large page NAND supportBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the partition layour used on the revision B modules which ship with large page NAND flash as default. The differnce between the old and new layouts is that the large page devices use 128KiB blocks, so the initial loader partition now ends at 128KiB boundary pushing the begining of partition 1 up. The rest of the partitions are in the same place as the small page NAND devices. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] 4468/2: ANUBIS: Add SM501 device resourcesBen Dooks2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add resources for the SM501 present on the Simtec Anubis board, including the framebuffer and the I2C for DDC. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] 4466/1: ANUBIS: Anubis AX88796 supportBen Dooks2007-07-12
| | | | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the resources necessary for the AX88796 driver to attach to the AX88796 network controller fitted on the Simtec Anubis board. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: move platform devices to separate header fileRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: move device registration into CPU-specific fileRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows individual CPU support to determine which platform devices should be registered. Also fix a copy-n-paste bug in the I2C power platform device entry. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: remove boot time RTC initialisationRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC library code contains everything necessary to set the system time from the RTC; for similar reasons as the previous commit, it's far better to let the RTC library code sort this out rather than implement something which might not be appropriate for everyone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] pxa: stop doing our own rtc management over suspendRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the RTC management over a suspend/resume cycle. Firstly, we may not be using the internal RTC for time keeping; some platforms have an external RTC for this inspite of the PXA having an internal RTC. Secondly, the RTC library code handles updating system time on resume. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma codeEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the number of dma channels varies between pxa25x and pxa27x, it introduces some specific code in dma.c. This patch moves the specific code to pxa25x.c and pxa27x.c and makes dma.c more generic. 1. add pxa_init_dma() for dma initialization, the number of channels are passed in by the argument 2. add a "prio" field to the "struct pxa_dma_channel" for the channel priority, and is initialized in pxa_init_dma() 3. use a general priority comparison with the channels "prio" field so to remove the processor specific pxa_for_each_dma_prio macro, this is not lightning fast as the original one, but it is acceptable as it happens when requesting dma, which is usually not so performance critical Signed-off-by: eric miao <eric.miao@marvell.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-07 23:36:39 -0500