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* MIPS: Alchemy: Fix hang with high-frequency edge interruptsManuel Lauss2009-11-02
| | | | | | | | | | | | | | | | | The handle_edge_irq() flowhandler disables edge int sources which occur too fast (i.e. another edge comes in before the irq handler function had a chance to finish). Currently, the mask_ack() callback does not ack the edges in hardware, leading to an endless loop in the flowhandler where it tries to shut up the irq source. When I rewrote the alchemy IRQ code I wrongly assumed the mask_ack() callback was only used by the level flowhandler, hence it omitted the (at the time pointless) edge acks. Turned out I was wrong; so here is a complete mask_ack implementation for Alchemy IC, which fixes the above mentioned problem. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: TXx9: Fix spi-baseclk valueAtsushi Nemoto2009-11-02
| | | | | | | | | | TXx9 SPI bit rate is calculated by: fBR = fSPI / 2 / (n + 1) (fSPI is SPI master clock freq, i.e. imbusclk freq.) So use imbus_clk / 2 as a spi-baseclk. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: bcm63xx: Set the correct BCM3302 CPU nameFlorian Fainelli2009-11-02
| | | | | | | | For consistency with other BCM63xx SoC set the CPU name to "Broadcom BCM6338" when actually running on that system. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_storeZhang Le2009-11-02
| | | | | | | | | | Loongson 2 does not have dcache aliases when is using 16k pages. and the And because Loongson 2 doesn't do SMP , cpu_icache_snoops_remote_store does not matter here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Avoid potential hazard on Context registerRalf Baechle2009-11-02
| | | | | | | | | | set_saved_sp reads Context register. Avoid reading stale value from earlier incomplete write. Issue found and fixed for head.S by Chris Dearman <chris@mips.com>. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Use lockless interrupt controller operations when possible.David Daney2009-11-02
| | | | | | | | Some newer Octeon chips have registers that allow lockless operation of the interrupt controller. Take advantage of them. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinityDavid Daney2009-11-02
| | | | | | | | Since the locks are used from interrupt context we need the irqsave/irqrestore versions of the locking functions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Set S-cache linesize to 64-bytes for MTI's S-cacheRalf Baechle2009-11-02
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SMTC: Avoid queing multiple reschedule IPIsJaidev Patwardhan2009-11-02
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: GCMP: Avoid accessing registers when they are not presentJaidev Patwardhan2009-11-02
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: GIC: Random fixes and enhancements.Chris Dearman2009-11-02
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_startChris Dearman2009-11-02
| | | | | Signed-off-by: Chris Dearman (chris@mips.com) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operandsNigel Stephens2009-11-02
| | | | | | | This patch ensures that the sign bit is always updated for NaN operands. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SPRAM: Clean up support code a littleChris Dearman2009-11-02
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: 1004K: Enable SPRAM support.Ralf Baechle2009-11-02
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4Ralf Baechle2009-11-02
| | | | | | Based on original patch by Chris Dearman <chris@mips.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT.Ralf Baechle2009-11-02
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTI: Fix accesses to device registers on MIPS boardsChris Dearman2009-11-02
| | | | | | | | | This fixes the remaining problems introduced by f197465384bf7ef1af184c2ed1a4e268911a91e3 (incorrect access length & byteswapping in bigendian mode) Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix machine check exception in kmap_coherent()Kevin Cernekee2009-11-02
| | | | | | | | | | | | | | | | | | | | | | | On an SMP system with cache aliases, the following sequence of events may happen: 1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a temporary mapping in the fixmap region 2) copy_page() starts on CPU0 3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page() 4) CPU0 takes the interrupt, interrupting copy_page() 5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again 6) The second invocation of kmap_coherent() on CPU0 tries to use the same fixmap virtual address that was being used by copy_user_highpage() 7) CPU0 throws a machine check exception for the TLB address conflict Fixed by creating an extra set of fixmap entries for use in interrupt handlers. This prevents fixmap VA conflicts between copy_user_highpage() running in user context, and local_r4k_flush_cache_page() invoked from an SMP IPI. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Fix build if CONFIG_PCI is disabled.Ralf Baechle2009-11-02
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: register watchdog device only if enabled in hw configurationFlorian Fainelli2009-11-02
| | | | | | | | | This patch checks if the watchdog enable bit is set in the DCL register meaning that the hardware watchdog actually works and if so, register the ar7_wdt platform_device. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Prepare for watchdog supportFlorian Fainelli2009-11-02
| | | | | | | | This patch prepares the board code to register a bcm63xx_wdt platform_device that we are going to use in a subsequent patch. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Make bcm63xx_uart_register an initfuncFlorian Fainelli2009-11-02
| | | | | | | | | This patch removes the calls to bcm63xx_uart_register in board_bcm963xx.c and make bcm63xx_uart_register an initfunc. Allows us to remove bcm63xx_dev_uart.h which was there to make checkpatch.pl happy. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AU1000: Fix build failure for db1x00 configured for Au1100 SoCFlorian Fainelli2009-11-02
| | | | | | | | | | | | This patch fixes the following warning, which becomes an error due to -Werror to be turned on: CC arch/mips/alchemy/common/gpiolib-au1000.o cc1: warnings being treated as errors arch/mips/alchemy/common/gpiolib-au1000.c: In function 'au1100_gpio2_to_irq': /home/florian/dev/kernel/linux-queue/arch/mips/include/asm/mach-au1x00/gpio-au1000.h:107: warning: control reaches end of non-void function Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM63xx: Fix soft-reset lockup on BCM6345Florian Fainelli2009-11-02
| | | | | | | | | | This patch fixes a lockup on BCM6345 where setting the PLL soft reset bit will also lock the other blocks including UART. Instead of setting only the PLL soft reset bit in the software reset register, set this bit but do not touch the others. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: TXx9: Fix error handling / Fix for noenexisting gpio_remove.Ralf Roesch2009-11-02
| | | | | | | Error was introduced by commit 0385d1f3d394c6814be0b165c153fc3fc254469a. Signed-off-by: Ralf Roesch <ralf.roesch@rw-gmbh.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add IRQF_TIMER flag for timer interruptsWu Zhangjin2009-11-02
| | | | | | | | | | | As the commit 3ee4c147 shows, we need to "Add IRQF_TIMER flag for timer interrupts", Atsushi Nemoto have reported that some other timer interrupts should be considered, Here it is. Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: 64-bit: Fix o32 lookup_dcookie syscallWu Zhangjin2009-11-02
| | | | | | | | | | An o32 aplication passes a 64-bit value in a pair of registers; a 64-bit kernel expects a 64-bit argument in a single register. Signed-off-by: Chen Jie <chenj@lemote.com> Signed-off-by: Hu Hongbing <huhb@lemote.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Remove stray unlock_kernel.Ralf Baechle2009-11-02
| | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Josip Rodin <joy@entuzijast.net>
* MIPS: Add IRQF_TIMER flag for timer interruptsWu Zhangjin2009-11-02
| | | | | | | | | | Along the lines of d6c585a4342a2ff627a29f9aea77c5ed4cd76023, add IRQF_TIMER flag for all timer interrupts This ensures that timer interrupts won't be disabled on suspend and not threaded for PREEMPT_RT. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove redundant local_irq_disable()Wu Zhangjin2009-11-02
| | | | | | | | That code is executed with irq disabled already, so, remove the redundant local_irq_disable() here. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP27: Fix buildRalf Baechle2009-11-02
| | | | | | Broken by 182a85f8a119c789610a9d464f4129ded9f3c107. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Cleanup CONFIG_DEBUG_STACK_USAGE version of alloc_thread_info.Ralf Baechle2009-11-02
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/smp.cDavid Daney2009-11-02
| | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Don't write ones to reserved entryhi bits.Ralf Baechle2009-11-02
| | | | | | | | | | | | | | | | We've silently been relying on the hardware chopping off excess, reserved ASID bits for no better reason that it saving an instruction. Because we already have: #define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK) in <asm/mmu_context.h>. We can use a cleanup to avoid writing non-zero bits into the reserved entryhi bits. This avoid triggering some debugging assertion in the Cavium simulator. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Extend COMMAND_LINE_SIZERalf Baechle2009-11-02
| | | | | | Some firmware may pass well over 256 bytes these days. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6Linus Torvalds2009-10-31
|\ | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6: tty: Mark generic_serial users as BROKEN
| * tty: Mark generic_serial users as BROKENAlan Cox2009-10-30
| | | | | | | | | | | | | | | | | | There isn't much else I can do with these. I can find no hardware for any of them and no users. The code is broken. Signed-off-by: Alan Cox <alan@linux.intel.com> Cc: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds2009-10-31
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] smp: fix sigp sense handling [S390] smp: fix sigp stop handling [S390] cputime: fix overflow on 31 bit systems [S390] call home: fix string length handling [S390] call home: fix error handling in init function [S390] smp: fix prefix handling of offlined cpus [S390] s/r: cmm resume fix [S390] call home: fix local buffer usage in proc handler
| * [S390] smp: fix sigp sense handlingHeiko Carstens2009-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sigp sense only returns the status of a cpu if it is non zero. If the status of the sensed cpu is all zeros condition code 0 (accpeted) is set and no status bits are returned. The current code however assumes that a status was returned and tests bits in it. This means uninitalized data is accessed with random results. Worst case is that the code that checks if cpu is offline on cpu hotplug assumes that the target cpu is offline while it is still running. This leads potentially to memory corruption since resources that are still needed by the target cpu will be freed and could be resused while still in use. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] smp: fix sigp stop handlingHeiko Carstens2009-10-29
| | | | | | | | | | | | | | | | | | | | | | According to the architecture a cpu must not necessarily enter stopped state after completion of a sigp instruction with "stop" order code. So remove the BUG() statement after self sending sigp stop to avoid that it ever gets reached. Also add a sigp busy check to make sure that the order gets delivered. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] cputime: fix overflow on 31 bit systemsMartin Schwidefsky2009-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cputime_to_msecs / cputime_to_clock_t and cputime64_to_clock_t cause fixpoint divide exceptions if the cputime is too large. On a machine that collected 49.7 days worth of idle time reading from /proc/stat will generate oopses like this: Kernel BUG at 001b0c92 [verbose debug info unavailable] fixpoint divide exception: 0009 [#13] SMP Modules linked in: ipv6 CPU: 1 Tainted: G D 2.6.27.10 #5 Process cat (pid: 21352, task: 1fb34138, ksp: 1d2a3d98) Krnl PSW : 070c2000 801b0c92 (show_stat+0x2ca/0x68c) R:0 T:1 IO:1 EX:1 Key:0 M:1 W:0 P:0 AS:0 CC:2 PM:0 Krnl GPRS: 00000001 00001388 00000bb8 0015d2a1 00000000 00000000 000003e8 0001fd91 00000000 00000000 0000129d eecd2ff0 1cc533b9 0036f780 801b0bce 1d2a3cc0 Krnl Code: 801b0c86: f18890abf198 mvo 171(9,%r9),408(9,%r15) 801b0c8c: 98abf170 lm %r10,%r11,368(%r15) 801b0c90: 1da1 dr %r10,%r1 >801b0c92: 90abf170 stm %r10,%r11,368(%r15) 801b0c96: 98abf190 lm %r10,%r11,400(%r15) 801b0c9a: 1da1 dr %r10,%r1 801b0c9c: 90abf190 stm %r10,%r11,400(%r15) 801b0ca0: 18a3 lr %r10,%r3 Call Trace: ([<00000000001b09f4>] show_stat+0x2c/0x68c) [<000000000018dcee>] seq_read+0xb2/0x364 [<00000000001a9980>] proc_reg_read+0x68/0x98 [<00000000001705ee>] vfs_read+0x6e/0xe8 [<0000000000170732>] sys_read+0x36/0x78 [<000000000010f750>] sysc_do_restart+0x12/0x16 [<0000000077f3ad6a>] 0x77f3ad6a <4>---[ end trace 1436ea9559d3de9e ]--- Reported-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * [S390] smp: fix prefix handling of offlined cpusHeiko Carstens2009-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Offlined cpus still have valid prefix register contents. Dumpers will store the register contents of a cpu to the location where its prefix register points to. For offlined cpus the area (lowcore) has been freed and the dumper would write the uninteresting contents of the offline cpu to a memory location which might be in use by some other component and destroy valueable information. To fix this set the prefix register of offline cpus to absolute address zero again. This prevents the current dumpers to write to random memory locations. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* | Merge branch 'bugfix' of ↵Linus Torvalds2009-10-29
|\ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen * 'bugfix' of git://git.kernel.org/pub/scm/linux/kernel/git/jeremy/xen: xen: set up mmu_ops before trying to set any ptes
| * | xen: set up mmu_ops before trying to set any ptesJeremy Fitzhardinge2009-10-27
| |/ | | | | | | | | | | | | | | | | | | xen_setup_stackprotector() ends up trying to set page protections, so we need to have vm_mmu_ops set up before trying to do so. Failing to do so causes an early boot crash. [ Impact: Fix early crash under Xen. ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
* | Merge branch 'sh/for-2.6.32' of ↵Linus Torvalds2009-10-29
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 * 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: Fix hugetlbfs dependencies for SH-3 && MMU configurations. sh: Document uImage.bin target in archhelp. sh: add uImage.bin target sh: rsk7203 CONFIG_MTD=n fix sh: Check for return_to_handler when unwinding the stack sh: Build fix: define more __movmem* symbols sh: __irq_entry annotate do_IRQ(). Fix up sh/powerpc conflicts in fs/Kconfig
| * | sh: Fix hugetlbfs dependencies for SH-3 && MMU configurations.Paul Mundt2009-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hugetlb dependencies presently depend on SUPERH && MMU while the hugetlb page size definitions depend on CPU_SH4 or CPU_SH5. This unfortunately allows SH-3 + MMU configurations to enable hugetlbfs without a corresponding HPAGE_SHIFT definition, resulting in the build blowing up. As SH-3 doesn't support variable page sizes, we tighten up the dependenies a bit to prevent hugetlbfs from being enabled. These days we also have a shiny new SYS_SUPPORTS_HUGETLBFS, so switch to using that rather than adding to the list of corner cases in fs/Kconfig. Reported-by: Kristoffer Ericson <kristoffer.ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: Document uImage.bin target in archhelp.Paul Mundt2009-10-26
| | | | | | | | | | | | | | | | | | | | | This was missing from the previous patch. Reported-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: add uImage.bin targetMagnus Damm2009-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add an uImage.bin target to allow uncompressed uImages. Useful for boards with busted u-boot decompression like the rsk7203 on my desk. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: rsk7203 CONFIG_MTD=n fixMagnus Damm2009-10-26
| | | | | | | | | | | | | | | | | | | | | Fix the rsk7203 board code to build with CONFIG_MTD=n. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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