| Commit message (Collapse) | Author | Age |
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Currently pcm990 camera bus-width management functions request a GPIO and never
free it again. With this approach the GPIO extender driver cannot be unloaded
once camera drivers have been loaded, also unloading theb i2c-pxa bus driver
produces errors, because the GPIO extender driver cannot unregister properly.
Another problem is, that if camera drivers are once loaded before the GPIO
extender driver, the platform code marks the GPIO unavailable and only a reboot
helps to recover. Adding an explicit free_bus method and using it in mt9m001
and mt9v022 drivers fixes these problems.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6: (30 commits)
sparc64: Update defconfig.
sparc: Wire up sys_rt_tgsigqueueinfo().
openprom: Squelch useless GCC warning.
sparc: replace uses of CPU_MASK_ALL_PTR
sparc64: Add proper dynamic ftrace support.
sparc: Simplify code using is_power_of_2() routine.
sparc: move of_device common code to of_device_common
sparc: remove dma-mapping_{32|64}.h
sparc: use dma_map_page instead of dma_map_single
sparc: add sync_single_for_device and sync_sg_for_device to struct dma_ops
sparc: move the duplication in dma-mapping_{32|64}.h to dma-mapping.h
p9100: use standard fields for framebuffer physical address and length
leo: use standard fields for framebuffer physical address and length
cg6: use standard fields for framebuffer physical address and length
cg3: use standard fields for framebuffer physical address and length
cg14: use standard fields for framebuffer physical address and length
bw2: use standard fields for framebuffer physical address and length
sparc64: fix and optimize irq distribution
sparc64: Use new dynamic per-cpu allocator.
sparc64: Only allocate per-cpu areas for possible cpus.
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Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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CPU_MASK_ALL is the (deprecated) "all bits set" cpumask, defined as so:
#define CPU_MASK_ALL (cpumask_t) { { ... } }
Taking the address of such a temporary is questionable at best,
unfortunately 321a8e9d (cpumask: add CPU_MASK_ALL_PTR macro) added
CPU_MASK_ALL_PTR:
#define CPU_MASK_ALL_PTR (&CPU_MASK_ALL)
Which formalizes this practice. One day gcc could bite us over this
usage (though we seem to have gotten away with it so far).
[Description by Rusty Russell]
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Acked-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch moves code common to of_device_32.c and of_device_64.c into
of_device_common.h and of_device_common.c.
The only functional difference is in sparc32 where of_bus_default_map is
used in place of of_bus_sbus_map because they are equivelent.
There is still room for further code consolidation with some minor
refactoring.
Boot tested on sparc32 and compile tested on sparc64.
Signed-off-by: Robert Reif <reif@earthlink.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This modifies SPARC32 to use struct dma_map ops. It means that we can
remove dma-mapping_{32|64}.h.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Tested-by: Robert Reif <reif@earthlink.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch converts dma_map_single and dma_unmap_single to use
map_page and unmap_page respectively and removes unnecessary
map_single and unmap_single. map_page can be used to implement
map_single but the opposite is impossible. Having only dma_map_page in
struct dma_ops is enough.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Tested-by: Robert Reif <reif@earthlink.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This adds sync_single_for_device() and sync_sg_for_device() to struct
dma_ops in order to unify dma-mpping_{32|64}.h. dma-mpping_32.h needs them though dma-mpping_64.h doesn't.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Tested-by: Robert Reif <reif@earthlink.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Tested-by: Robert Reif <reif@earthlink.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
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irq_choose_cpu() should compare the affinity mask against cpu_online_map
rather than CPU_MASK_ALL, since irq_select_affinity() sets the interrupt's
affinity mask to cpu_online_map "and" CPU_MASK_ALL (which ends up being
just cpu_online_map). The mask comparison in irq_choose_cpu() will always
fail since the two masks are not the same. So the CPU chosen is the first CPU
in the intersection of cpu_online_map and CPU_MASK_ALL, which is always CPU0.
That means all interrupts are reassigned to CPU0...
Distributing interrupts to CPUs in a linearly increasing round robin fashion
is not optimal for the UltraSPARC T1/T2. Also, the irq_rover in
irq_choose_cpu() causes an interrupt to be assigned to a different
processor each time the interrupt is allocated and released. This may lead
to an unbalanced distribution over time.
A static mapping of interrupts to processors is done to optimize and balance
interrupt distribution. For the T1/T2, interrupts are spread to different
cores first, and then to strands within a core.
The following is some benchmarks showing the effects of interrupt
distribution on a T2. The test was done with iperf using a pair of T5220
boxes, each with a 10GBe NIU (XAUI) connected back to back.
TCP | Stock Linear RR IRQ Optimized IRQ
Streams | 2.6.30-rc5 Distribution Distribution
| GBits/sec GBits/sec GBits/sec
--------+-----------------------------------------
1 0.839 0.862 0.868
8 1.16 4.96 5.88
16 1.15 6.40 8.04
100 1.09 7.28 8.68
Signed-off-by: Hong H. Pham <hong.pham@windriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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This gets us real close to the generic implementation of
setup_per_cpu_areas() except:
1) We store the per-cpu offset into the trap_block[], whereas
the generic code has it's own static array.
2) We have to initialize the %g5 register to hold the boot cpu's
per-cpu area offset.
3) The OBP/MDESC cpu info scan is performed at the end.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Now that we defer the cpu_data() initializations to the end of per-cpu
setup, we can get rid of this local hack we had to setup the per-cpu
areas eary.
This is a necessary step in order to support HAVE_DYNAMIC_PER_CPU_AREA
since the per-cpu setup must run when page structs are available.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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We need to split up the cpu present mask setup from the cpu_data
initialization, and this is a first step towards that.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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With feedback from Sam Ravnborg.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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Surprisingly this actually makes LOAD_PER_CPU_BASE() a little
more efficient.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Later we're going to want to get at these definitions from
asm/percpu.h and that's not possible via cpudata.h because
of the set of dependencies the non-trap_block[] stuff has.
Signed-off-by: David S. Miller <davem@davemloft.net>
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This really isn't necessary at all, a local variable suits the
job just fine.
This frees up 8 bytes in the trap_block[] that we can use later
to store the per-cpu base addresses.
Signed-off-by: David S. Miller <davem@davemloft.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (27 commits)
Blackfin: hook up new rt_tgsigqueueinfo syscall
Blackfin: improve CLKIN_HZ config default
Blackfin: initial support for ftrace grapher
Blackfin: initial support for ftrace
Blackfin: enable support for LOCKDEP
Blackfin: add preliminary support for STACKTRACE
Blackfin: move custom sections into sections.h
Blackfin: punt unused/wrong mutex-dec.h
Blackfin: add support for irqflags
Blackfin: add support for bzip2/lzma compressed kernel images
Blackfin: convert Kconfig style to def_bool
Blackfin: bf548-ezkit: update smsc911x resources
Blackfin: update aedos-ipipe code to upstream 1.10-00
Blackfin: bf537-stamp: update ADP5520 resources
Blackfin: bf518f-ezbrd: fix SPI CS for SPI flash
Blackfin: define SPI IRQ in board resources
Blackfin: do not configure the UART early if on wrong processor
Blackfin: fix deadlock in SMP IPI handler
Blackfin: fix flag storage for irq funcs
Blackfin: push down exception oops checking
...
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Most boards use 25000000 as the default HZ, so rather than add a whole
bunch more boards, make it the default for everyone. This also fixes
randconfig builds as there was no default before.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Just the basic ftrace support here -- mcount and the ftrace stub.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Blackfin arch has a bunch of custom section markings for its on-chip
regions, but they aren't declared in the right header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Looks like the mutex-dec.h header file was incorrectly copied into the
Blackfin asm path. Nothing uses it, so punt it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This converts the irq handling in the Blackfin arch from the old irq.h /
system.h method to the new irqflags.h. A stepping stone on the way to
other tracing functionality.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Since U-Boot can support these compression types, add appropriate targets
to the Blackfin boot files.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Makes the file easier to read when there isn't so much clutter.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The older smsc911x driver made platform data optional, but the newer one
always requires it, so add proper settings to the BF548-EZKIT.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The ADP5520 hooks up to PF7 rather than PG0.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The SPI flash on the BF518F-EZBRD board is actually hooked up to CS2,
not CS1, so make sure the resources are correct.
URL: http://blackfin.uclinux.org/gf/tracker/5220
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Blackfin SPI driver can be driven by an IRQ now, so declare it in
the board resources.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Before we configure the early UART, check to make sure we are running on
the expected processor - otherwise, we cause problems by configuring pins
that don't exist (and causing an infinite loop of faults).
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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When a low priority interrupt (like ethernet) is triggered between 2 high
priority IPI messages, a deadlock in disable_irq() is hit by the second
IPI handler. This is because the second IPI message is queued within the
first IPI handler, but the handler doesn't process all messages, and new
ones are inserted rather than appended. So now we process all the pending
messages, and append new ones to the pending list.
URL: http://blackfin.uclinux.org/gf/tracker/5226
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The IRQ functions take an "unsigned long" flags variable, not any other
type, so fix the places where we use "int" or "long".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than maintain a duplicate list of valid exceptions we can take in
the kernel both in the first if() check and the switch() check, delay the
oops check to after the switch(). All valid exceptions will have returned
by this point leaving only the invalid ones.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The trap_c() code pushes the hardware trace status onto the stack, but
doesn't always restore it when returning from some trap code paths. So
unify the exit code paths to all head to the end of the function.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The KGDB code uses this when switching processors to make sure the icache
is in a valid state.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Since the compiled-for cpu revision can be significant, include it in the
cpuinfo output along side the cpu revision we're currently running on.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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