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* MIPS: math-emu: Turn macros into functions where possible.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Harden ieee754int.h against multiple inclusion.Ralf Baechle2014-05-21
| | | | | | | The header file had no include guards; this only happened to work because the file only contains macro definitions and protypes. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Reformat code according to coding style.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Move all debug fs code to a separate file.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Remove fine example of cargo cult programming.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Header file weeding.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: branch: Make inclusion of <asm/branch.h> safe.Ralf Baechle2014-05-21
| | | | | | It was relying on other headers having been included before. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Use helpers to manipulate CAUSEF_BD flag.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: branch: New helpers to modify branch delay slot flag in struct pt_regsRalf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Get rid of typedefs.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Use English spelling of `constant' rather than Danish.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Mark exception handling functions as __cold.Ralf Baechle2014-05-21
| | | | | | | Optimizes the code flow and shaves of half a percent of the math-emu code size. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Use __BITFIELD_FIELD to eleminate redundant definitions.Ralf Baechle2014-05-21
| | | | | | | Union _ieee754sp was even duplicated even though there are no endian dependencies in it all. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Move definition of __BITFIELD_FIELD to sharable header.Ralf Baechle2014-05-21
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-05-20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS fixes from Ralf Baechle: "MIPS fixes for various loose ends: - Fix workarounds for R4000 erratum. - Patch up DEC, Siemens-Nixdorf and Loongson hardware support. - Wire up renameat2 syscall. - Delete unused file - it was causing false warnings from maintenance scripts. - Revert a patch because it's functionality is now implemented twice which causes superfluous /proc/cpuinfo output. - Fix a microMIPS regression" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: mm: Fix broken microMIPS kernel regression. MIPS: Add new AUDIT_ARCH token for the N32 ABI on MIPS64 MIPS: Wire up renameat2 syscall. MIPS: inst.h: Rename BITFIELD_FIELD to __BITFIELD_FIELD. MIPS: Remove file missed when removing rm9k support a while ago. MIPS/loongson2_cpufreq: Fix CPU clock rate setting MIPS: Loongson: No need to select GENERIC_HARDIRQS_NO__DO_IRQ MIPS: csum_partial.S CPU_DADDI_WORKAROUNDS bug fix MIPS: __strncpy_from_user_asm CPU_DADDI_WORKAROUNDS bug fix MIPS: __delay CPU_DADDI_WORKAROUNDS bug fix MIPS: DEC/SNI: O32 wrapper stack switching fixes MIPS: DEC: Bus error handler <asm/cpu-type.h> fixes MAINTAINERS: TURBOchannel: Update entry Revert "MIPS: MT: proc: Add support for printing VPE and TC ids"
| * MIPS: mm: Fix broken microMIPS kernel regression.Steven J. Hill2014-05-14
| | | | | | | | | | | | | | | | | | | | | | | | Commit f4ae17aa0f2122b52f642985b46210a1f2eceb0a [MIPS: mm: Use scratch for PGD when !CONFIG_MIPS_PGD_C0_CONTEXT] broke microMIPS kernel builds. This patch refactors that code similar to what was done for the 'clear_page' and 'copy_page' functions. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6744/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add new AUDIT_ARCH token for the N32 ABI on MIPS64Markos Chandras2014-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A MIPS64 kernel may support ELF files for all 3 MIPS ABIs (O32, N32, N64). Furthermore, the AUDIT_ARCH_MIPS{,EL}64 token does not provide enough information about the ABI for the 64-bit process. As a result of which, userland needs to use complex seccomp filters to decide whether a syscall belongs to the o32 or n32 or n64 ABI. Therefore, a new arch token for MIPS64/n32 is added so it can be used by seccomp to explicitely set syscall filters for this ABI. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Eric Paris <eparis@redhat.com> Acked-by: Paul Moore <pmoore@redhat.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: linux-mips@linux-mips.org Link: http://sourceforge.net/p/libseccomp/mailman/message/32239040/ Patchwork: https://patchwork.linux-mips.org/patch/6818/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Wire up renameat2 syscall.Ralf Baechle2014-05-13
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: inst.h: Rename BITFIELD_FIELD to __BITFIELD_FIELD.Ralf Baechle2014-05-12
| | | | | | | | | | | | | | <uapi/asm/inst.h> is exported to userland so the macro name BITFIELD_FIELD pollutes the namespace. Prefix the name with __ fixes this. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Remove file missed when removing rm9k support a while ago.Ralf Baechle2014-05-12
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS/loongson2_cpufreq: Fix CPU clock rate settingAaro Koskinen2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loongson2 has been using (incorrectly) kHz for cpu_clk rate. This has been unnoticed, as loongson2_cpufreq was the only place where the rate was set/get. After commit 652ed95d5fa6074b3c4ea245deb0691f1acb6656 (cpufreq: introduce cpufreq_generic_get() routine) things however broke, and now loops_per_jiffy adjustments are incorrect (1000 times too long). The patch fixes this by changing cpu_clk rate to Hz. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: stable@vger.kernel.org Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: cpufreq@vger.kernel.org Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Patchwork: https://patchwork.linux-mips.org/patch/6678/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson: No need to select GENERIC_HARDIRQS_NO__DO_IRQPaul Bolle2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 0e476d91244e ("MIPS: Loongson: Add Loongson-3 Kconfig options") added "select GENERIC_HARDIRQS_NO__DO_IRQ". But the Kconfig symbol GENERIC_HARDIRQS_NO__DO_IRQ was already removed in v2.6.38, so that select is a nop. Drop it. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6677/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: csum_partial.S CPU_DADDI_WORKAROUNDS bug fixMaciej W. Rozycki2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change reverts most of commit 60724ca59eda766a30be57aec6b49bc3e2bead91 [MIPS: IP checksums: Remove unncessary .set pseudos] that introduced warnings with the CPU_DADDI_WORKAROUNDS option set: arch/mips/lib/csum_partial.S: Assembler messages: arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" [...] arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" [and so on, and so on...] The warnings are benign and good code is produced regardless because no macros that'd use the assembler's temporary register are involved, however the `.set noat' directives removed by the commit referred are crucial to guarantee this is still going to be the case after any changes in the future. Therefore they need to be brought back to place which this change does. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6686/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: __strncpy_from_user_asm CPU_DADDI_WORKAROUNDS bug fixMaciej W. Rozycki2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This corrects assembler warnings and broken code generated in __strncpy_from_user_asm: arch/mips/lib/strncpy_user.S: Assembler messages: arch/mips/lib/strncpy_user.S:52: Warning: Macro instruction expanded into multiple instructions in a branch delay slot with the CPU_DADDI_WORKAROUNDS option set. The function schedules delay slots manually where there is really no need to as GAS is happy to do it all itself, so undo it all and remove `.set noreorder'. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6685/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: __delay CPU_DADDI_WORKAROUNDS bug fixMaciej W. Rozycki2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With CPU_DADDI_WORKAROUNDS enabled __delay assembles with a macro in a branch delay slot: {standard input}: Assembler messages: {standard input}:18: Warning: Macro instruction expanded into multiple instructions in a branch delay slot and broken code results: 0000000000000000 <__delay>: 0: 1480ffff bnez a0,0 <__delay> 4: 24010001 li at,1 8: 0081202f dsubu a0,a0,at c: 03e00008 jr ra 10: 00000000 nop 14: 00000000 nop Consequently the function loops indefinitely, showing up prominently as a hang in the delay loop calibration at bootstrap. This change corrects the problem by forcing the immediate 1 into a register while keeping code produced identical where CPU_DADDI_WORKAROUNDS is disabled. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6669/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: DEC/SNI: O32 wrapper stack switching fixesMaciej W. Rozycki2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 231a35d37293ab88d325a9cb94e5474c156282c0 [[MIPS] RM: Collected changes] broke DECstation support by introducing an incompatible copy of arch/mips/dec/prom/call_o32.S in arch/mips/fw/lib/, built unconditionally. The copy happens to land earlier of the two among the modules used in the link and is therefore chosen for the DECstation rather than the intended original. As a result random kernel data is corrupted because a pointer to the "%s" formatted output template is used as a temporary stack pointer rather than being passed down to prom_printf. This also explains why prom_printf still works, up to a point -- the next argument is the actual string to output so it works just fine as the output template until enough kernel data has been corrupted to cause a crash. This change adjusts the modified wrapper in arch/mips/fw/lib/call_o32.S to let callers request no stack switching by passing a null temporary stack pointer in $a1, reworks the DECstation callers to work with the updated interface and removes the old copy from arch/mips/dec/prom/call_o32.S. A few minor readability adjustments are included as well, most importantly O32_SZREG is now used throughout where applicable rather than hardcoded multiplies of 4 and $fp is used to access the argument save area as a more usual register to operate the stack with rather than $s0. Finally an update is made to the temporary stack space used by the SNI platform to guarantee 8-byte alignment as per o32 requirements. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6668/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: DEC: Bus error handler <asm/cpu-type.h> fixesMaciej W. Rozycki2014-05-12
| | | | | | | | | | | | | | | | | | | | | | Commit 69f24d1784b631b81a54eb57c49bf46536dd2382 [MIPS: Optimize current_cpu_type() for better code.] missed an update for two DECstation bus error support files that now do not build, this is a fix. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6667/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * Revert "MIPS: MT: proc: Add support for printing VPE and TC ids"Ralf Baechle2014-05-12
| | | | | | | | | | | | | | Reverts commit 795038a6910937fa167d47f6f6183db0eb8fb706 because d6d3c9afaab47418ab2d7f874fb8aeac1f067104 provides the same functionality in a more generic way. Both patches applied however means that the VPE and TC IDs get printed twice currently.
* | Merge branch 'parisc-3.15-4' of ↵Linus Torvalds2014-05-20
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc fixes from Helge Deller: "There are two patches in here: The first patch greatly improves latency and corrects the memory ordering in our light-weight atomic locking syscall. The second patch ratelimits printing of userspace segfaults in the same way as it's done on other platforms. This fixes a possible DOS on parisc since it prevents the syslog to grow too fast. For example, when the debian acl2 package was built on our debian buildd servers, this package produced lots of gigabytes in syslog in very short time and thus filled our harddisks, which then turned the server nearly completely unaccessible and unresponsive" * 'parisc-3.15-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Improve LWS-CAS performance parisc: ratelimit userspace segfault printing
| * | parisc: Improve LWS-CAS performanceJohn David Anglin2014-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The attached change significantly improves the performance of the LWS-CAS code in syscall.S. This allows a number of packages to build (e.g., zeromq3, gtest and libxs) that previously failed because slow LWS-CAS performance under contention. In particular, interrupts taken while the lock was taken degraded performance significantly. The change does the following: 1) Disables interrupts around the CAS operation, and 2) Changes the loads and stores to use the ordered completer, "o", on PA 2.0. "o" and "ma" with a zero offset are equivalent. The latter is accepted on both PA 1.X and 2.0. The use of ordered loads and stores probably makes no difference on all existing hardware, but it seemed pedantically correct. In particular, the CAS operation must complete before LDCW lock is released. As written before, a processor could reorder the operations. I don't believe the period interrupts are disabled is long enough to significantly increase interrupt latency. For example, the TLB insert code is longer. Worst case is a memory fault in the CAS operation. Signed-off-by: John David Anglin <dave.anglin@bell.net> Cc: stable@vger.kernel.org # 3.13+ Signed-off-by: Helge Deller <deller@gmx.de>
| * | parisc: ratelimit userspace segfault printingHelge Deller2014-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ratelimit printing of userspace segfaults and make it runtime configurable via the /proc/sys/debug/exception-trace variable. This should resolve syslog from growing way too fast and thus prevents possible system service attacks. Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org # 3.13+
* | | Merge tag 'arm64-fixes' of ↵Linus Torvalds2014-05-20
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull two arm64 fixes from Catalin Marinas: - arm64 migrate_irqs() fix following commit ffde1de64012 (irqchip: Gic: Support forced affinity setting) - fix arm64 pud_huge() to return 0 when only 2 levels page tables are used (__PAGETABLE_PMD_FOLDED defined and pmd_huge already covers block entries at the first level), otherwise KVM gets confused * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: fix pud_huge() for 2-level pagetables arm64: use cpu_online_mask when using forced irq_set_affinity
| * | | arm64: fix pud_huge() for 2-level pagetablesMark Salter2014-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following happens when trying to run a kvm guest on a kernel configured for 64k pages. This doesn't happen with 4k pages: BUG: failure at include/linux/mm.h:297/put_page_testzero()! Kernel panic - not syncing: BUG! CPU: 2 PID: 4228 Comm: qemu-system-aar Tainted: GF 3.13.0-0.rc7.31.sa2.k32v1.aarch64.debug #1 Call trace: [<fffffe0000096034>] dump_backtrace+0x0/0x16c [<fffffe00000961b4>] show_stack+0x14/0x1c [<fffffe000066e648>] dump_stack+0x84/0xb0 [<fffffe0000668678>] panic+0xf4/0x220 [<fffffe000018ec78>] free_reserved_area+0x0/0x110 [<fffffe000018edd8>] free_pages+0x50/0x88 [<fffffe00000a759c>] kvm_free_stage2_pgd+0x30/0x40 [<fffffe00000a5354>] kvm_arch_destroy_vm+0x18/0x44 [<fffffe00000a1854>] kvm_put_kvm+0xf0/0x184 [<fffffe00000a1938>] kvm_vm_release+0x10/0x1c [<fffffe00001edc1c>] __fput+0xb0/0x288 [<fffffe00001ede4c>] ____fput+0xc/0x14 [<fffffe00000d5a2c>] task_work_run+0xa8/0x11c [<fffffe0000095c14>] do_notify_resume+0x54/0x58 In arch/arm/kvm/mmu.c:unmap_range(), we end up doing an extra put_page() on the stage2 pgd which leads to the BUG in put_page_testzero(). This happens because a pud_huge() test in unmap_range() returns true when it should always be false with 2-level pages tables used by 64k pages. This patch removes support for huge puds if 2-level pagetables are being used. Signed-off-by: Mark Salter <msalter@redhat.com> [catalin.marinas@arm.com: removed #ifndef around PUD_SIZE check] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org> # v3.11+
| * | | arm64: use cpu_online_mask when using forced irq_set_affinitySudeep Holla2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 01f8fa4f01d8("genirq: Allow forcing cpu affinity of interrupts") enabled the forced irq_set_affinity which previously refused to route an interrupt to an offline cpu. Commit ffde1de64012("irqchip: Gic: Support forced affinity setting") implements this force logic and disables the cpu online check for GIC interrupt controller. When __cpu_disable calls migrate_irqs, it disables the current cpu in cpu_online_mask and uses forced irq_set_affinity to migrate the IRQs away from the cpu but passes affinity mask with the cpu being offlined also included in it. When calling irq_set_affinity with force == true in a cpu hotplug path, the caller must ensure that the cpu being offlined is not present in the affinity mask or it may be selected as the target CPU, leading to the interrupt not being migrated. This patch uses cpu_online_mask when using forced irq_set_affinity so that the IRQs are properly migrated away. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | | | Merge tag 'metag-for-v3.15-2' of ↵Linus Torvalds2014-05-20
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag Pull Metag architecture and related fixes from James Hogan: "Mostly fixes for metag and parisc relating to upgrowing stacks. - Fix missing compiler barriers in metag memory barriers. - Fix BUG_ON on metag when RLIMIT_STACK hard limit is increased beyond safe value. - Make maximum stack size configurable. This reduces the default user stack size back to 80MB (especially on parisc after their removal of _STK_LIM_MAX override). This only affects metag and parisc. - Remove metag _STK_LIM_MAX override to match other arches and follow parisc, now that it is safe to do so (due to the BUG_ON fix mentioned above). - Finally now that both metag and parisc _STK_LIM_MAX overrides have been removed, it makes sense to remove _STK_LIM_MAX altogether" * tag 'metag-for-v3.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag: asm-generic: remove _STK_LIM_MAX metag: Remove _STK_LIM_MAX override parisc,metag: Do not hardcode maximum userspace stack size metag: Reduce maximum stack size to 256MB metag: fix memory barriers
| * | | | metag: Remove _STK_LIM_MAX overrideJames Hogan2014-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Meta overrode _STK_LIM_MAX (the default RLIMIT_STACK hard limit) to 256MB, apparently in an attempt to prevent setup_arg_pages's STACK_GROWSUP code from choosing the maximum stack size of 1GB, which is far too large for Meta's limited virtual address space and hits a BUG_ON (stack_top is usually 0x3ffff000). However the commit "metag: Reduce maximum stack size to 256MB" reduces the absolute stack size limit to a safe value for metag. This allows the default _STK_LIM_MAX override to be removed, bringing the default behaviour in line with all other architectures. Parisc in particular recently removed their override of _STK_LIMT_MAX in commit e0d8898d76a7 (parisc: remove _STK_LIM_MAX override) since it subtly affects stack allocation semantics in userland. Meta's uapi/asm/resource.h can now be removed and switch to using generic-y. Suggested-by: Helge Deller <deller@gmx.de> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-metag@vger.kernel.org Cc: John David Anglin <dave.anglin@bell.net>
| * | | | parisc,metag: Do not hardcode maximum userspace stack sizeHelge Deller2014-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch affects only architectures where the stack grows upwards (currently parisc and metag only). On those do not hardcode the maximum initial stack size to 1GB for 32-bit processes, but make it configurable via a config option. The main problem with the hardcoded stack size is, that we have two memory regions which grow upwards: stack and heap. To keep most of the memory available for heap in a flexmap memory layout, it makes no sense to hard allocate up to 1GB of the memory for stack which can't be used as heap then. This patch makes the stack size for 32-bit processes configurable and uses 80MB as default value which has been in use during the last few years on parisc and which hasn't showed any problems yet. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: linux-parisc@vger.kernel.org Cc: linux-metag@vger.kernel.org Cc: John David Anglin <dave.anglin@bell.net>
| * | | | metag: Reduce maximum stack size to 256MBJames Hogan2014-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specify the maximum stack size for arches where the stack grows upward (parisc and metag) in asm/processor.h rather than hard coding in fs/exec.c so that metag can specify a smaller value of 256MB rather than 1GB. This fixes a BUG on metag if the RLIMIT_STACK hard limit is increased beyond a safe value by root. E.g. when starting a process after running "ulimit -H -s unlimited" it will then attempt to use a stack size of the maximum 1GB which is far too big for metag's limited user virtual address space (stack_top is usually 0x3ffff000): BUG: failure at fs/exec.c:589/shift_arg_pages()! Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Helge Deller <deller@gmx.de> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: linux-parisc@vger.kernel.org Cc: linux-metag@vger.kernel.org Cc: John David Anglin <dave.anglin@bell.net> Cc: stable@vger.kernel.org # only needed for >= v3.9 (arch/metag)
| * | | | metag: fix memory barriersMikulas Patocka2014-05-14
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Volatile access doesn't really imply the compiler barrier. Volatile access is only ordered with respect to other volatile accesses, it isn't ordered with respect to general memory accesses. Gcc may reorder memory accesses around volatile access, as we can see in this simple example (if we compile it with optimization, both increments of *b will be collapsed to just one): void fn(volatile int *a, long *b) { (*b)++; *a = 10; (*b)++; } Consequently, we need the compiler barrier after a write to the volatile variable, to make sure that the compiler doesn't reorder the volatile write with something else. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Acked-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: James Hogan <james.hogan@imgtec.com>
* | | | Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds2014-05-20
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Peter Anvin. * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86-64, modify_ldt: Make support for 16-bit segments a runtime option x86, mm, hugetlb: Add missing TLB page invalidation for hugetlb_cow() x86, rdrand: When nordrand is specified, disable RDSEED as well
| * | | | x86-64, modify_ldt: Make support for 16-bit segments a runtime optionLinus Torvalds2014-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checkin: b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels disabled 16-bit segments on 64-bit kernels due to an information leak. However, it does seem that people are genuinely using Wine to run old 16-bit Windows programs on Linux. A proper fix for this ("espfix64") is coming in the upcoming merge window, but as a temporary fix, create a sysctl to allow the administrator to re-enable support for 16-bit segments. It adds a "/proc/sys/abi/ldt16" sysctl that defaults to zero (off). If you hit this issue and care about your old Windows program more than you care about a kernel stack address information leak, you can do echo 1 > /proc/sys/abi/ldt16 as root (add it to your startup scripts), and you should be ok. The sysctl table is only added if you have COMPAT support enabled on x86-64, but I assume anybody who runs old windows binaries very much does that ;) Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Link: http://lkml.kernel.org/r/CA%2B55aFw9BPoD10U1LfHbOMpHWZkvJTkMcfCs9s3urPr1YyWBxw@mail.gmail.com Cc: <stable@vger.kernel.org>
| * | | | x86, mm, hugetlb: Add missing TLB page invalidation for hugetlb_cow()Anthony Iliopoulos2014-05-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The invalidation is required in order to maintain proper semantics under CoW conditions. In scenarios where a process clones several threads, a thread operating on a core whose DTLB entry for a particular hugepage has not been invalidated, will be reading from the hugepage that belongs to the forked child process, even after hugetlb_cow(). The thread will not see the updated page as long as the stale DTLB entry remains cached, the thread attempts to write into the page, the child process exits, or the thread gets migrated to a different processor. Signed-off-by: Anthony Iliopoulos <anthony.iliopoulos@huawei.com> Link: http://lkml.kernel.org/r/20140514092948.GA17391@server-36.huawei.corp Suggested-by: Shay Goikhman <shay.goikhman@huawei.com> Acked-by: Dave Hansen <dave.hansen@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: <stable@vger.kernel.org> # v2.6.16+ (!)
| * | | | x86, rdrand: When nordrand is specified, disable RDSEED as wellH. Peter Anvin2014-05-11
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One can logically expect that when the user has specified "nordrand", the user doesn't want any use of the CPU random number generator, neither RDRAND nor RDSEED, so disable both. Reported-by: Stephan Mueller <smueller@chronox.de> Cc: Theodore Ts'o <tytso@mit.edu> Link: http://lkml.kernel.org/r/21542339.0lFnPSyGRS@myon.chronox.de Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* | | | Merge tag 'stable/for-linus-3.15-rc5-tag' of ↵Linus Torvalds2014-05-12
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen bug fixes from David Vrabel: - Fix arm64 crash on boot. - Quiet a noisy arm build warning (virt_to_pfn() redefined). * tag 'stable/for-linus-3.15-rc5-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: arm64: introduce virt_to_pfn xen/events/fifo: correctly align bitops arm/xen: Remove definiition of virt_to_pfn in asm/xen/page.h
| * | | | arm64: introduce virt_to_pfnStefano Stabellini2014-05-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | virt_to_pfn has been defined in arch/arm/include/asm/memory.h by commit e26a9e0 "ARM: Better virt_to_page() handling" and Xen has come to rely on it. Introduce virt_to_pfn on arm64 too. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | | arm/xen: Remove definiition of virt_to_pfn in asm/xen/page.hJulien Grall2014-04-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | virt_to_pfn has been defined in asm/memory.h by the commit e26a9e0 "ARM: Better virt_to_page() handling" This will result of a compilation warning when CONFIG_XEN is enabled. arch/arm/include/asm/xen/page.h:80:0: warning: "virt_to_pfn" redefined [enabled by default] #define virt_to_pfn(v) (PFN_DOWN(__pa(v))) ^ In file included from arch/arm/include/asm/page.h:163:0, from arch/arm/include/asm/xen/page.h:4, from include/xen/page.h:4, from arch/arm/xen/grant-table.c:33: The definition in memory.h is nearly the same (it directly expand PFN_DOWN), so we can safely drop virt_to_pfn in xen include. Signed-off-by: Julien Grall <julien.grall@linaro.org> Signed-off-by: David Vrabel <david.vrabel@citrix.com>
| * | | | Merge commit 'e26a9e0' into stable/for-linus-3.15David Vrabel2014-04-28
| |\ \ \ \
* | \ \ \ \ Merge tag 'fixes-for-linus' of ↵Linus Torvalds2014-05-12
|\ \ \ \ \ \ | |_|_|/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Seems like we've had more fixes than usual this release cycle, but there's nothing in particular that we're doing differently. Perhaps it's just one of those cycles where more people are finding more regressions (and/or that the latency of when people actually test what's been in the tree for a while is catching up so that we get the bug reports now). The bigger changes here are are for TI and Marvell platforms: * Timing changes for GPMC (generic localbus) on OMAP causing some largeish DTS deltas. * Fixes to window allocation on PCI for mvebu touching drivers/ stuff. Patches have acks from subsystem maintainers where needed. * A fix from Thomas for a botched DT conversion in drivers/edma. There's a handful of other fixes for the above platforms as well as sunxi, at91, i.MX. I also included a MAINTAINER update for Broadcom, and a trivial move of a binding doc. I know you said you'd be offline this week, but I might as well post it for when you return. :)" I'm not quite offline yet. Doing a few pulls in the last hour before my internet goes away.. * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits) MAINTAINERS: update Broadcom ARM tree location and add an SoC family ARM: dts: i.MX53: Fix ipu register space size ARM: dts: kirkwood: fix mislocated pcie-controller nodes ARM: sunxi: Enable GMAC in sunxi_defconfig ARM: common: edma: Fix xbar mapping ARM: sun7i: Fix i2c4 base address ARM: Kirkwood: T5325: Fix double probe of Codec ARM: mvebu: enable the SATA interface on Armada 375 DB ARM: mvebu: specify I2C bus frequency on Armada 370 DB ARM: mvebu: use qsgmii phy-mode for Armada XP GP interfaces ARM: mvebu: fix NOR bus-width in Armada XP OpenBlocks AX3 Device Tree ARM: mvebu: fix NOR bus-width in Armada XP DB Device Tree ARM: mvebu: fix NOR bus-width in Armada XP GP Device Tree ARM: dts: AM3517: Disable absent IPs inherited from OMAP3 ARM: dts: OMAP2: Fix interrupts for OMAP2420 mailbox ARM: dts: OMAP5: Add mailbox dt node to fix boot warning ARM: OMAP5: Switch to THUMB mode if needed on secondary CPU ARM: dts: am437x-gp-evm: Do not reset gpio5 ARM: dts: omap3-igep0020: use SMSC9221 timings PCI: mvebu: split PCIe BARs into multiple MBus windows when needed ...
| * | | | | Merge tag 'davinci-fixes-for-v3.15-rc4' of ↵Olof Johansson2014-05-11
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes Pull "DaVinci fixes for v3.15" from Sekhar Nori: The patch fixes EDMA crossbar mapping to actually make it work. The patch has been tagged for stable. * tag 'davinci-fixes-for-v3.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: common: edma: Fix xbar mapping Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | ARM: common: edma: Fix xbar mappingThomas Gleixner2014-04-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is another great example of trainwreck engineering: commit 2646a0e529 (ARM: edma: Add EDMA crossbar event mux support) added support for using EDMA on peripherals which have no direct EDMA event mapping. The code compiles and does not explode in your face, but that's it. 1) Reading an u16 array from an u32 device tree array simply does not work. Even if the function is named "edma_of_read_u32_to_s16_array". It merily calls of_property_read_u16_array. So the resulting 16bit array will have every other entry = 0. 2) The DT entry for the xbar registers related to xbar has length 0x10 instead of the real length: 0xfd0 - 0xf90 = 0x40. Not a real problem as it does not cross a page boundary, but wrong nevertheless. 3) But none of this matters as the mapping never happens: After reading nonsense edma_of_read_u32_to_s16_array() invalidates the first array entry pair, so nobody can ever notice the braindamage by immediate explosion. Seems the QA criteria for this code was solely not to explode when someone adds edma-xbar-event-map entries to the DT. Goal achieved, congratulations! Not really helpful if someone wants to use edma on a device which requires a xbar mapping. Fix the issues by: - annotating the device tree entry with "/bits/ 16" as documented in the of_property_read_u16_array kernel doc - make the size of the xbar register mapping correct - invalidating the end of the array and not the start This convoluted mess wants to be completely rewritten as there is no point to keep the xbar_chan array memory and the iomapping of the xbar regs around forever. Marking the xbar mapped channels as used should be done right there. But that's a different issue and this patch is small enough to make it work and allows a simple backport for stable. Cc: stable@vger.kernel.org # v3.12+ Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 20:07:21 -0500