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* x86: add noclflush optionAndi Kleen2008-01-30
| | | | | | | | To disable CLFLUSH usage, especially in change_page_attr(). Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: convert TSC disabling to generic cpuid disable bitmapAndi Kleen2008-01-30
| | | | | | | | Fix from: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: don't disable RDTSC in userland for 32bit notscAndi Kleen2008-01-30
| | | | | | | | | | Modern 32bit userland doesn't even boot when the TSC is disabled because ld.so tends to contain RDTSCs. So make notsc only effective for the kernel, similar to 64bit. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: convert some existing cpuid disable options to new generic bitmapAndi Kleen2008-01-30
| | | | | | | | | This convers nofxsr, mem=nopentium and nosep to use the new generic cpuid disable bitmap instead of using own variables. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add framework to disable CPUID bits on the command lineAndi Kleen2008-01-30
| | | | | | | | | | There are already various options to disable specific cpuid bits on the command line. They all use their own variable. Add a generic mask to make this easier in the future. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fill in missing pv_mmu_ops entries for PAGETABLE_LEVELS >= 3Eduardo Habkost2008-01-30
| | | | | | | | This finally makes paravirt-ops able to compile and boot under x86_64. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: don't set pagetable_setup_{start,done} hooks on 64-bitEduardo Habkost2008-01-30
| | | | | | | | | | paravirt_pagetable_setup_{start,done}() are not used (yet) under x86_64, and native_pagetable_setup_{start,done}() don't exist on x86_64. So they don't need to be set. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: provide __parainstructions sectionGlauber de Oliveira Costa2008-01-30
| | | | | | | | | This patch adds the __parainstructions section to vmlinux.lds.S. It's needed for the patching system. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add asm_offset PARAVIRT constantsGlauber de Oliveira Costa2008-01-30
| | | | | | | | This patch adds the constant PARAVIRT needs in asm_offsets_64.c Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fill pv_cpu_ops structure with cr8 fieldsGlauber de Oliveira Costa2008-01-30
| | | | | | | | | This patch fills in the read and write cr8 fields with their native version. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: provide a native_init_IRQ function on 64-bitGlauber de Oliveira Costa2008-01-30
| | | | | | | | | x86_64 lacks a native_init_IRQ() function, so we turn the arch's init_IRQ() function into a native construct Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add stringify headerGlauber de Oliveira Costa2008-01-30
| | | | | | | | | We use a __stringify construction at paravirt_patch_64.c. It's better practice to include the stringify header directly Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: checking aperture report for node insteadYinghai Lu2008-01-30
| | | | | | | | | | | | | | | | | | | | | | currently when gart iommu is enabled by BIOS or previous we got " Checking aperture... CPU 0: aperture @4000000 size 64MB CPU 1: aperture @4000000 size 64MB " we should use use Node instead. we will get " Checking aperture... Node 0: aperture @4000000 size 64MB Node 1: aperture @4000000 size 64MB " Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: move select_idle_routine() call after detect_ht()Hiroshi Shimamoto2008-01-30
| | | | | | | | | | | | Move the select_idle_routine() call to after the detect_ht() call at identify_cpu() on 64-bit. This change is for printing the polling idle and HT enabled warning message properly. Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: move warning message of polling idle and HT enabledHiroshi Shimamoto2008-01-30
| | | | | | | | | | | | The warning message at idle_setup() is never shown because smp_num_sibling hasn't been updated at this point yet. Move this polling idle and HT enabled warning to select_idle_routine(). I also implement this warning on 64-bit kernel. Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix unconditional arch/x86/kernel/pcspeaker.o compilingMichael Opdenacker2008-01-30
| | | | | | | | do not add the pcspkr platform device if pcspkr support is disabled. Signed-off-by: Michael Opdenacker <michael@free-electrons.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: only call early_init_amd one timeYinghai Lu2008-01-30
| | | | | | | | | | | | | | | | | | | | Andi's patch " x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detection Need this in the next patch in time_init and that happens early. This includes a minor fix on i386 where early_intel_workarounds() [which is now called early_init_intel] really executes early as the comments say. " calling early_init_amd in early_identify_cpu and identify_cpu two times. this patch remove the one in identify_cpu Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86, 32-bit: trim memory not covered by wb mtrrsJesse Barnes2008-01-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some machines, buggy BIOSes don't properly setup WB MTRRs to cover all available RAM, meaning the last few megs (or even gigs) of memory will be marked uncached. Since Linux tends to allocate from high memory addresses first, this causes the machine to be unusably slow as soon as the kernel starts really using memory (i.e. right around init time). This patch works around the problem by scanning the MTRRs at boot and figuring out whether the current end_pfn value (setup by early e820 code) goes beyond the highest WB MTRR range, and if so, trimming it to match. A fairly obnoxious KERN_WARNING is printed too, letting the user know that not all of their memory is available due to a likely BIOS bug. Something similar could be done on i386 if needed, but the boot ordering would be slightly different, since the MTRR code on i386 depends on the boot_cpu_data structure being setup. This patch fixes a bug in the last patch that caused the code to run on non-Intel machines (AMD machines apparently don't need it and it's untested on other non-Intel machines, so best keep it off). Further enhancements and fixes from: Yinghai Lu <Yinghai.Lu@Sun.COM> Andi Kleen <ak@suse.de> Signed-off-by: Jesse Barnes <jesse.barnes@intel.com> Tested-by: Justin Piszcz <jpiszcz@lucidpixels.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: print which shared library/executable faulted in segfault etc. messages v3Andi Kleen2008-01-30
| | | | | | | | | | | | | | | | | | | | | | | They now look like: hal-resmgr[13791]: segfault at 3c rip 2b9c8caec182 rsp 7fff1e825d30 error 4 in libacl.so.1.1.0[2b9c8caea000+6000] This makes it easier to pinpoint bugs to specific libraries. And printing the offset into a mapping also always allows to find the correct fault point in a library even with randomized mappings. Previously there was no way to actually find the correct code address inside the randomized mapping. Relies on earlier patch to shorten the printk formats. They are often now longer than 80 characters, but I think that's worth it. [includes fix from Eric Dumazet to check d_path error value] Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: don't disable the APIC if it hasn't been mapped yetAndi Kleen2008-01-30
| | | | | | | | | | | When the kernel panics early for some unrelated reason there would be eventually an early exception inside panic because clear_local_APIC tried to disable the not yet mapped APIC. Check for that explicitely. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: optimize lock prefix switching to run less frequentlyAndi Kleen2008-01-30
| | | | | | | | | | | | | | | | | | | | | | On VMs implemented using JITs that cache translated code changing the lock prefixes is a quite costly operation that forces the JIT to throw away and retranslate a lot of code. Previously a SMP kernel would rewrite the locks once for each CPU which is quite unnecessary. This patch changes the code to never switch at boot in the normal case (SMP kernel booting with >1 CPU) or only once for SMP kernel on UP. This makes a significant difference in boot up performance on AMD SimNow! Also I expect it to be a little faster on native systems too because a smp switch does a lot of text_poke()s which each synchronize the pipeline. v1->v2: Rename max_cpus v1->v2: Fix off by one in UP check (Thomas Gleixner) Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: replace hard coded reservations in 64-bit early boot code with dynamic ↵Andi Kleen2008-01-30
| | | | | | | | | | | | | | | table On x86-64 there are several memory allocations before bootmem. To avoid them stomping on each other they used to be all hard coded in bad_area(). Replace this with an array that is filled as needed. This cleans up the code considerably and allows to expand its use. Cc: peterz@infradead.org Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: unify printk strings in fault_32|64.cHarvey Harrison2008-01-30
| | | | | | | | | | | | Adding the address of the faulting library missed removing a line ending from X86_32. Also update the shorter printk format for X86_32 in fault_64.c to make it easier to se the remaining differences. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: use shorter addresses in i386 segfault printksAndi Kleen2008-01-30
| | | | | | Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: use the correct cpuid method to detect MWAIT support for C statesAndi Kleen2008-01-30
| | | | | | | | | | | | | | | | | | | | Previously there was a AMD specific quirk to handle the case of AMD Fam10h MWAIT not supporting any C states. But it turns out that CPUID already has ways to detectly detect that without using special quirks. The new code simply checks if MWAIT supports at least C1 and doesn't use it if it doesn't. No more vendor specific code. Note this is does not simply clear MWAIT because MWAIT can be still useful even without C states. Credit goes to Ben Serebrin for pointing out the (nearly) obvious. Cc: "Andreas Herrmann" <andreas.herrmann3@amd.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: move MWAIT idle check to generic CPU initialization on 32-bitAndi Kleen2008-01-30
| | | | | | | | | | Previously it was only run for Intel CPUs, but AMD Fam10h implements MWAIT too. This matches 64bit behaviour. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: rename stack_pointer to kernel_trap_spHarvey Harrison2008-01-30
| | | | | | | | | | | Choose a less generic name for such a special case. Add a comment explaining the odd use in X86_32. Change the one user of stack_pointer. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fixup NR-CPUS patch for numatravis@sgi.com2008-01-30
| | | | | | | | | | | | | | | This patch removes the EXPORT_SYMBOL for: x86_cpu_to_node_map_init x86_cpu_to_node_map_early_ptr ... thus fixing the section mismatch problem. Also, the mem -> node hash lookup is fixed. Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* arch/x86/mm/numa_64.c: section fixAndrew Morton2008-01-30
| | | | | | | | | | | WARNING: vmlinux.o(__ksymtab+0x670): Section mismatch: reference to .init.data:x86_cpu_to_node_map_init (between '__ksymtab_x86_cpu_to_node_map_init' and '__ksymtab_node_data') Cc: Matthew Dobson <colpatch@us.ibm.com> Cc: Mike Travis <travis@sgi.com> Cc: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: reduce memory and intra-node effectsMike Travis2008-01-30
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: adjust/fix LDT handling for XenJan Beulich2008-01-30
| | | | | | | | | | | | | | | | | | | Based on patch from Jan Beulich <jbeulich@novell.com>. Don't rely on kmalloc(PAGE_SIZE) returning PAGE_SIZE aligned memory (Xen requires GDT *and* LDT to be page-aligned). Using the page allocator interface also removes the (albeit small) slab allocator overhead. The same change being done for 64-bits for consistency. Further, the Xen hypercall interface expects the LDT address to be virtual, not machine. [ Adjusted to unified ldt.c - Jeremy ] Signed-off-by: Jan Beulich <jbeulich@novell.com> Acked-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86-64: clean up linker scriptJan Beulich2008-01-30
| | | | | | | | | Remove the dead .text.lock. Move _etext and __{start,stop}___ex_table into their sections. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: serverworks: IRQ routing needs no _pAlan Cox2008-01-30
| | | | | | | | | I can find no reason for the _p on the serverworks IRQ routing logic, and a review of the documentation contains no indication that any such delay is needed so lets try this Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: isolate PIC/PIT in/out callsAlan Cox2008-01-30
| | | | | | | | | | | | | | | | | Rather than remove and/or mangle inb_p/outb_p we want to remove the use of them from inappropriate places. For the PIC/PIT this may eventually depend on 32/64bitism or similar so start by adding inb/outb_pit and inb/outb_pic so that we can make them use any scheme we settle on without disturbing the existing, correct (for ISA), port 0x80 usage. (eg we can make inb_pit use udelay without messing up inb_p). Floppy already does this for the fdc. That really only leaves the CMOS as a core logic item to tackle, and bits of parallel port handling in the chipset layers. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix singlestep handling in reenter_kprobeAbhishek Sagar2008-01-30
| | | | | | | | | | | | | | Highlight peculiar cases in singles-step kprobe handling. In reenter_kprobe(), a breakpoint in KPROBE_HIT_SS case can only occur when single-stepping a breakpoint on which a probe was installed. Since such probes are single-stepped inline, identifying these cases is unambiguous. All other cases leading up to KPROBE_HIT_SS are possible bugs. Identify and WARN_ON such cases. Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix synchronize_rcu(): high latency on idle systemBenjamin LaHaise2008-01-30
| | | | | | | | | | | | | | an otherwise idle system takes about 3 ticks per network interface in unregister_netdev() due to multiple calls to synchronize_rcu(), which adds up to quite a few seconds for tearing down thousands of interfaces. By flushing pending rcu callbacks in the idle loop, the system makes progress hundreds of times faster. If this is indeed a sane thing to, it probably needs to be done for other architectures than x86. And yes, the network stack shouldn't call synchronize_rcu() quite so much, but fixing that is a little more involved. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add ENDPROC() markersJohn Reiser2008-01-30
| | | | | | | | | | | The ENDPROCs() were not used everywhere. Some code used just END() instead, while other code used nothing. um/sys-i386/checksum.S didn't #include <linux/linkage.h> . I also got confused because gcc puts the .type near the ENTRY, while ENDPROC puts it on the opposite end. Signed off by: John Reiser <jreiser@BitWagon.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: function ifdefs in fault_32|64.cHarvey Harrison2008-01-30
| | | | | | | | | Add caller of is_errata93() to X86_32, ifdef'd to do nothing. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: last of trivial fault_32|64.c unificationHarvey Harrison2008-01-30
| | | | | | | | | | | Comments, indentation, printk format. Uses task_pid_nr() on X86_64 now, but this is always defined to task->pid. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: do_page_fault small unificationHarvey Harrison2008-01-30
| | | | | | | | | | | | | Copy the prefetch of map_sem from X86_64 and move the check notify_page_fault (soon to be kprobe_handle_fault) out of the unlikely if() statement. This makes the X86_32|64 pagefault handlers closer to each other. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: remove last user of get_segment_eipHarvey Harrison2008-01-30
| | | | | | | | | | | | | | | | | is_prefetch was the last user of get_segment_eip and only on X86_32. This function returned the faulting instruction's address and set the upper segment limit. Instead, use the convert_ip_to_linear helper and rely on probe_kernel_address to do the segment checks which was already done everywhere the segment limit was being checked on X86_32. Remove get_segment_eip as well. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: common x86_32|64 namingHarvey Harrison2008-01-30
| | | | | | | | | Rename convert_rip_to_linear to convert_ip_to_linear for shared X86_32|64 use. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: use wrmsrl in kprobes.c, step.cHarvey Harrison2008-01-30
| | | | | | | | | | | | | | Where x86_32 passed zero in the high 32 bits, use wrmsrl which will zero extend for us. This allows ifdefs for 32/64 bit to be eliminated. Eliminate ifdef in step.c. Similar cleanup was done when unifying kprobes_32|64.c and wrmsr() was chosen there over wrmsrl(). This patch changes these to wrmsrl. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change bios_cpu_apicid to percpu data variabletravis@sgi.com2008-01-30
| | | | | | | | | | | | | | | | | Change static bios_cpu_apicid array to a per_cpu data variable. This includes using a static array used during initialization similar to the way x86_cpu_to_apicid[] is handled. There is one early use of bios_cpu_apicid in apic_is_clustered_box(). The other reference in cpu_present_to_apicid() is called after smp_set_apicids() has setup the percpu version of bios_cpu_apicid. [ mingo@elte.hu: build fix ] Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change NR_CPUS arrays in acpi-cpufreqtravis@sgi.com2008-01-30
| | | | | | | | | | | | Change the following static arrays sized by NR_CPUS to per_cpu data variables: acpi_cpufreq_data *drv_data[NR_CPUS] Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change NR_CPUS arrays in numa_64travis@sgi.com2008-01-30
| | | | | | | | | | | | Change the following static arrays sized by NR_CPUS to per_cpu data variables: char cpu_to_node_map[NR_CPUS]; Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: cleanup x86_cpu_to_apicid referencestravis@sgi.com2008-01-30
| | | | | | | | | | | Clean up references to x86_cpu_to_apicid. Removes extraneous comments and standardizes on "x86_*_early_ptr" for the early kernel init references. Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change NR_CPUS arrays in topologytravis@sgi.com2008-01-30
| | | | | | | | | | | | | | Change the following static arrays sized by NR_CPUS to per_cpu data variables: i386_cpu cpu_devices[NR_CPUS]; (And change the struct name to x86_cpu.) Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change NR_CPUS arrays in smpboot_64travis@sgi.com2008-01-30
| | | | | | | | | | | | | | | | Change the following static arrays sized by NR_CPUS to per_cpu data variables: task_struct *idle_thread_array[NR_CPUS]; This is only done if CONFIG_HOTPLUG_CPU is defined as otherwise, the array is removed after initialization anyways. Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change NR_CPUS arrays in powernow-k8travis@sgi.com2008-01-30
| | | | | | | | | | | | Change the following static arrays sized by NR_CPUS to per_cpu data variables: powernow_k8_data *powernow_data[NR_CPUS]; Signed-off-by: Mike Travis <travis@sgi.com> Reviewed-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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