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| | * x86: Avoid race condition in pci_enable_msix()Brandon Phiilps2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit ced5b697a76d325e7a7ac7d382dbbb632c765093 upstream. Keep chip_data in create_irq_nr and destroy_irq. When two drivers are setting up MSI-X at the same time via pci_enable_msix() there is a race. See this dmesg excerpt: [ 85.170610] ixgbe 0000:02:00.1: irq 97 for MSI/MSI-X [ 85.170611] alloc irq_desc for 99 on node -1 [ 85.170613] igb 0000:08:00.1: irq 98 for MSI/MSI-X [ 85.170614] alloc kstat_irqs on node -1 [ 85.170616] alloc irq_2_iommu on node -1 [ 85.170617] alloc irq_desc for 100 on node -1 [ 85.170619] alloc kstat_irqs on node -1 [ 85.170621] alloc irq_2_iommu on node -1 [ 85.170625] ixgbe 0000:02:00.1: irq 99 for MSI/MSI-X [ 85.170626] alloc irq_desc for 101 on node -1 [ 85.170628] igb 0000:08:00.1: irq 100 for MSI/MSI-X [ 85.170630] alloc kstat_irqs on node -1 [ 85.170631] alloc irq_2_iommu on node -1 [ 85.170635] alloc irq_desc for 102 on node -1 [ 85.170636] alloc kstat_irqs on node -1 [ 85.170639] alloc irq_2_iommu on node -1 [ 85.170646] BUG: unable to handle kernel NULL pointer dereference at 0000000000000088 As you can see igb and ixgbe are both alternating on create_irq_nr() via pci_enable_msix() in their probe function. ixgbe: While looping through irq_desc_ptrs[] via create_irq_nr() ixgbe choses irq_desc_ptrs[102] and exits the loop, drops vector_lock and calls dynamic_irq_init. Then it sets irq_desc_ptrs[102]->chip_data = NULL via dynamic_irq_init(). igb: Grabs the vector_lock now and starts looping over irq_desc_ptrs[] via create_irq_nr(). It gets to irq_desc_ptrs[102] and does this: cfg_new = irq_desc_ptrs[102]->chip_data; if (cfg_new->vector != 0) continue; This hits the NULL deref. Another possible race exists via pci_disable_msix() in a driver or in the number of error paths that call free_msi_irqs(): destroy_irq() dynamic_irq_cleanup() which sets desc->chip_data = NULL ...race window... desc->chip_data = cfg; Remove the save and restore code for cfg in create_irq_nr() and destroy_irq() and take the desc->lock when checking the irq_cfg. Reported-and-analyzed-by: Brandon Philips <bphilips@suse.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <1265793639-15071-3-git-send-email-yinghai@kernel.org> Signed-off-by: Brandon Phililps <bphilips@suse.de> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * x86, xen: Disable highmem PTE allocation even when CONFIG_HIGHPTE=yIan Campbell2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 817a824b75b1475f1b067c8cee318c7b4d66fcde upstream. There's a path in the pagefault code where the kernel deliberately breaks its own locking rules by kmapping a high pte page without holding the pagetable lock (in at least page_check_address). This breaks Xen's ability to track the pinned/unpinned state of the page. There does not appear to be a viable workaround for this behaviour so simply disable HIGHPTE for all Xen guests. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> LKML-Reference: <1267204562-11844-1-git-send-email-ian.campbell@citrix.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: Pasi Kärkkäinen <pasik@iki.fi> Cc: <xen-devel@lists.xensource.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * x86: Add iMac9,1 to pci_reboot_dmi_tableJustin P. Mattock2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 0a832320f1bae6a4169bf683e201378f2437cfc1 upstream. On the iMac9,1 /sbin/reboot results in a black mangled screen. Adding this DMI entry gets the machine to reboot cleanly as it should. Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> LKML-Reference: <1266362249-3337-1-git-send-email-justinmattock@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * x86, ia32_aout: do not kill argument mappingJiri Slaby2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 318f6b228ba88a394ef560efc1bfe028ad5ae6b6 upstream. Do not set current->mm->mmap to NULL in 32-bit emulation on 64-bit load_aout_binary after flush_old_exec as it would destroy already set brpm mapping with arguments. Introduced by b6a2fea39318e43fee84fa7b0b90d68bed92d2ba mm: variable length argument support where the argument mapping in bprm was added. [ hpa: this is a regression from 2.6.22... time to kill a.out? ] Signed-off-by: Jiri Slaby <jslaby@suse.cz> LKML-Reference: <1265831716-7668-1-git-send-email-jslaby@suse.cz> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ollie Wild <aaw@google.com> Cc: x86@kernel.org Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * oprofile/x86: fix msr access to reserved countersRobert Richter2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit cfc9c0b450176a077205ef39092f0dc1a04e020a upstream. During switching virtual counters there is access to perfctr msrs. If the counter is not available this fails due to an invalid address. This patch fixes this. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * oprofile/x86: use kzalloc() instead of kmalloc()Robert Richter2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | commit c17c8fbf349482e89b57d1b800e83e9f4cf40c47 upstream. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * oprofile/x86: remove node check in AMD IBS initializationRobert Richter2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 89baaaa98a10cad5cc8516c7208b02d9fc711890 upstream. Standard AMD systems have the same number of nodes as there are northbridge devices. However, there may kernel configurations (especially for 32 bit) or system setups exist, where the node number is different or it can not be detected properly. Thus the check is not reliable and may fail though IBS setup was fine. For this reason it is better to remove the check. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * oprofile: remove tracing build dependencyRobert Richter2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 18b4a4d59e97e7ff13ee84b5bec79f3fc70a9f0a upstream. The commit 1155de4 ring-buffer: Make it generally available already made ring-buffer available without the TRACING option enabled. This patch removes the TRACING dependency from oprofile. Fixes also oprofile configuration on ia64. The patch also applies to the 2.6.32-stable kernel. Reported-by: Tony Jones <tonyj@suse.de> Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * oprofile/x86: fix perfctr nmi reservation for mulitplexingRobert Richter2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 68dc819ce829f7e7977a56524e710473bdb55115 upstream. Multiple virtual counters share one physical counter. The reservation of virtual counters fails due to duplicate allocation of the same counter. The counters are already reserved. Thus, virtual counter reservation may removed at all. This also makes the code easier. Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * x86/PCI: Prevent mmconfig memory corruptionThomas Gleixner2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit bb8d41330ce27edb91adb6922d3f8e1a8923f727 upstream. commit ff097ddd4 (x86/PCI: MMCONFIG: manage pci_mmcfg_region as a list, not a table) introduced a nasty memory corruption when pci_mmcfg_list is empty. pci_mmcfg_check_end_bus_number() dereferences pci_mmcfg_list.prev even when the list is empty. The following write hits some variable near to pci_mmcfg_list. Further down a similar problem exists, where cfg->list.next is dereferenced unconditionally and a comparison with some variable near to pci_mmcfg_list happens. Add a check for the last element into the for_each_entry() loop and remove all the other crappy logic which is just a leftover of the old array based code which was replaced by the list conversion. Reported-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| | * x86, uv: uv_global_gru_mmr_address() macro fixJack Steiner2010-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit e1e0138d7d10fd447c71cc70f367eac514bd3ce4 upstream. Fix bug in uv_global_gru_mmr_address macro. Macro failed to cast an int value to a long prior to a left shift > 32. Signed-off-by: Jack Steiner <steiner@sgi.com> LKML-Reference: <20100107161240.GA2610@sgi.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | x86: Fix iomap_atomic with highmem=y againThomas Gleixner2010-03-16
| | | | | | | | | | | | | | | | | | This whole highmem mess is racking my nerves ! Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | Revert "Loongson: add a new option FUJITSU_QUIRKS"Thomas Gleixner2010-03-12
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 876c52cc046e00eaa2ffc5124dc187106ef57594. Breaks !MIPS Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | Merge branch 'rt-2.6.33-queue' of git://dev.lemote.com/rt4ls into rt/2.6.33Thomas Gleixner2010-03-12
| |\ \
| | * | Loongson: add a new option FUJITSU_QUIRKSWu Zhangjin2010-03-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This option enables the quirks of fujitsu disk on some old FuLoong-2F series(6002, 6003), If you want to use the libata, this option must be enabled, otherwise, the kernel will report "IRQ #14 nobody cared". but for the old IDE driver, this option is not needed and for some new FuLoong-2F series(6004, 6005, 6014, 6015), this must be disabled to avoid the kernel hang on booting. Note: a better method is determining it through the machtype, but currently, the machtype only reflect the fuloong, yeeloong, not reflect the model of them, for example, fuloong-6002, fuloong-6003, in the future, this machtype should be improved. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | Loongson: Lemote-2F: USB: Not Emulate Non-Posted WritesWu Zhangjin2010-03-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch, when copying data between the USB storage devices and the hard disk, the USB device will disconnect regularly. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | Loongson: Cleanup the comment of reset_cpu()Wu Zhangjin2010-03-11
| | | | | | | | | | | | | | | | Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | Loongson: make _rdmsr, _wrmsr be atomicWu Zhangjin2010-03-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The _rdmsr, _wrdmsr operation must be atomic to ensure accessing the right msr address we want. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: Loongson: add defconfig for YeeLoongWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | This is a minimal defconfig of PREEMTP_RT for the yeeloong2f netbook. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: Loongson: speedup the irq dispatchWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch annotates the irq dispatch functions as inline, this may not be compiled with gcc 3.4.6, only tested with gcc 4.4.1. And also, this patch tries to tune the order of the interrupts to speedup the interrupts from northbright and sourthbrige. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: Un-thread several interruptsWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch un-thread all of the interrupts whose handler is no_action, which can return quickly, and also, several other interrupts, such as bus error interrupt, halt interrupt, for they are urgent to the system, to un-thread them too. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | Loongson-2F: Fixup of problems introduced by -mfix-loongson2f-jump of ↵Wu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | binutils 2.20.1 The -mfix-loongson2f-jump option provided by the binutils 2.20.1 have fixed the Out-of-order Issue of Loongson-2F described in Chapter 15 of "Loongson2F User Manual"[1,2], but introduced some problems. The option changes all of the jumping target to "addr & 0xcfffffff" through the at($1) register, but for the REBOOT address of loongson-2F: 0xbfc00000, this is totally wrong, so, this patch try to avoid the problem via telling the assembler not to use at($1) register. [1] Loongson2F User Manual(Chinese Version) http://www.loongson.cn/uploadfile/file/200808211 [2] English Version of Chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Reported-and-tested-by: Liu Shiwei <liushiwei@gmail.com> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | Loongson-2F: Enable fixups of binutils 2.20.1Wu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the "Fixups of Loongson2F" patch[1] to binutils have been applied into binutils 2.20.1. It's time to enable the options provided by the patch to compile the kernel. Without these fixups, the system will hang unexpectedly for the bug of processor. To learn more about these fixups, please refer to the following references. [1] "Fixups of Loongson2F" patch for binutils(actually for gas) http://sourceware.org/ml/binutils/2009-11/msg00387.html [2] Chapter 15 of "Loongson2F User Manual"(Chinese Version) http://www.loongson.cn/uploadfile/file/200808211 [3] English Version of the above chapter 15 http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
| | * | Loongson-2F: Flush the branch target history such as BTB and RASWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to workaround the Issue of Loongson-2F，We need to do: "When switching from user model to kernel model, you should flush the branch target history such as BTB and RAS." This patch did clear BTB(branch target buffer), forbid RAS(row address strobe) via Loongson-2F's 64bit diagnostic register. [1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211 [2] English Version of Chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: Loongson: make the MFGPT timer depends on !PREEMPT_RTWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a MFGPT timer in Lemote-2F family of machines, which have low precision and not support oneshot mode, so, only let it be un-available in PREEMTPT_RT for we have an MIPS-builtin high-resolution timer: r4k timer. For we disable it for PREEMPT_RT, there is no need to convert the related lock to raw_ one. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: make cpufreq support depends on !PREEMTP_RTWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cpufreq support will change the cpu frequency dynamically, and also for most of the MIPS timer's frequency are relative to the cpu frequency, for example, in Loongson, the MIPS timer is half of the cpu frequency, if the cpu frequency changes all the time, the MIPS timer will be mussy. all of the above will make the whole system un-determinable, so, just disable the cpufreq support when PREEMPT_RT is used. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: Loongson: Un-thread cascade interruptsWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two cascade interrupts in Loongson machines, one for bonito northbridge, another for the 8259A controller in the southbridge. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: check resched in do_signal()Wu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: Convert the schedule to __scheduleWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a new __schedule() defined in the Preempt-rt patch, which should be called between local_irq_disble and local_irq_enable. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: Un-thread i8259A cascade interruptWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch un-threads the i8259A cascade interrupts, and convert the related lock to raw_spinlock_t type. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | RT: MIPS: Make the die_lock be rawWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel is going to die, the lock must be raw to ensure nobody can preempt it at this urgent time. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | MIPS: r4k: Add a high resolution sched_clock()Wu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (v8 -> v9: O Make it depends on 64BIT for the current mips_sched_clock() only support 64bit currently. v7 -> v8: O Make it works with the exisiting clocksource_mips.mult, clocksource_mips.shift and copes with the 64bit calculation's overflow problem with the method introduced by David Daney in "MIPS: Octeon: Use non-overflowing arithmetic in sched_clock". To reduce the duplication, I have abstracted an inline mips_sched_clock() function to arch/mips/include/asm/time.h from arch/mips/cavium-octeon/csrc-octeon.c. v6 -> v7: O Make it depends on !CPU_FREQ and CPU_HAS_FIXED_C0_COUNT This sched_clock() is only available with the processor has fixed cp0 MIPS count register or even has dynamic cp0 MIPS count register but with CPU_FREQ disabled. NOTE: If your processor has fixed c0 count, please select CPU_HAS_FIXED_C0_COUNT for it and send a related patch to Ralf. v5 -> v6: o hard-codes the cycle2ns_scale_factor as 8 for 30(cs->shift) is too big. With 30, the return value of sched_clock() will also overflow quickly. o moves the sched_clock() back into csrc-r4k.c as David and Sergei recommended. o inits c0 count as zero for PRINTK_TIME=y. o drops the HR_SCHED_CLCOK option for the current sched_clock() is stable enough to replace the jiffies based one. ) This patch adds a cnt32_to_63() and MIPS c0 count based sched_clock(), which provides high resolution. Without it, the Ftrace for MIPS will give useless timestamp information. Because cnt32_to_63() needs to be called at least once per half period to work properly, Differ from the old version, this v2 revision set up a kernel timer to ensure the requirement of some MIPSs which have short c0 count period. And also, we init the c0 count as ZERO(just as jiffies does) in time_init() before plat_time_init(), without it, PRINTK_TIME=y will get wrong timestamp information. (NOTE: some platforms have initiazlied c0 count as zero, but some not, this may introduce some duplication, perhaps a new patch is needed to remove the initialized of c0 count in the platforms later?) This is originally from arch/arm/plat-orion/time.c This revision works well for function graph tracer now, and also, PRINTK_TIME=y will get normal timestamp informatin. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | MIPS: cavium-octeon: rewrite the sched_clock() based on mips_sched_clock()Wu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit "MIPS: add a common mips_sched_clock()" have abstracted the solution of the 64bit calculation's overflow problem into a common mips_sched_clock() function in arch/mips/include/asm/time.h, This patch just rewrites the sched_clock() for cavium-octeon on it. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | MIPS: add a common mips_sched_clock()Wu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the high resolution sched_clock() for r4k has the same overflow problem and solution mentioned in "MIPS: Octeon: Use non-overflowing arithmetic in sched_clock". "With typical mult and shift values, the calculation for Octeon's sched_clock overflows when using 64-bit arithmetic. Use 128-bit calculations instead." To reduce the duplication, This patch abstracts the solution into an inline funciton mips_sched_clock() into arch/mips/include/asm/time.h from arch/mips/cavium-octeon/csrc-octeon.c. Two patches for Cavium and R4K will be sent out respectively to use this common function. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| | * | MIPS: Don't trace irqsoff for idleWu Zhangjin2010-03-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the X86 platform did in arch/x86/kernel/{process_32.c,process_64.c}, we also don't trace irqsoff for idle. If "There's no useful work to be done", we don't care about the irqsoff duration. If we trace for idle, the max duration of irqsoff will be always as the idle time and eventually make the irqsoff tracer out of action. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
| * | | x86: Fix 32bit HIGHMEM=n compileThomas Gleixner2010-03-10
| | | | | | | | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | | x86: highmem: Remove stale function prototypeThomas Gleixner2010-03-10
| |/ / | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | highmem, -rt: Implement pfn and prot kmapsPeter Zijlstra2010-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | iomap_32 uses kmap_atomic_prot_pfn() for its maps, but on -rt we have to use kmap() for such mappings, so teach kmap about pfn and prot thingies. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | x86: pci: Prevent mmconfig memory corruptionThomas Gleixner2010-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit ff097ddd4 (x86/PCI: MMCONFIG: manage pci_mmcfg_region as a list, not a table) introduced a nasty memory corruption when pci_mmcfg_list is empty. pci_mmcfg_check_end_bus_number() dereferences pci_mmcfg_list.prev even when the list is empty. The following write hits some variable near to pci_mmcfg_list. Further down a similar problem exists, where cfg->list.next is dereferenced unconditionally and a comparison with some variable near to pci_mmcfg_list happens. Add a check for the last element into the for_each_entry() loop and remove all the other crappy logic which is just a leftover of the old array based code which was replaced by the list conversion. Reported-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> LKML-Reference: <alpine.LFD.2.00.1002251638230.4245@localhost.localdomain> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | Merge branch 'linus' into rt/headThomas Gleixner2010-02-25
| |\| | | | | | | | | | | | | | | | | | | Conflicts: Makefile Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| | * Merge branch 'urgent' of ↵Linus Torvalds2010-02-24
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6 * 'urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6: parisc: Set PCI CLS early in boot.
| | | * parisc: Set PCI CLS early in boot.Carlos O'Donell2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the PCI CLS early in the boot process to prevent device failures. In pcibios_set_master use the new pci_cache_line_size instead of a hard-coded value. Signed-off-by: Carlos O'Donell <carlos@codesourcery.com> Reviewed-by: Grant Grundler <grundler@google.com> Signed-off-by: Kyle McMartin <kyle@redhat.com>
| | * | Merge branch 'release' of ↵Linus Torvalds2010-02-24
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Fix broken sn2 build
| | | * | [IA64] Fix broken sn2 buildHedi Berriche2010-02-23
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert the change made to arch/ia64/sn/kernel/setup.c by commit 204fba4aa303ea4a7bb726a539bf4a5b9e3203d0 as it breaks the build. Fixing the build the b94b08081fcecf83fa690d6c5664f6316fe72208 way breaks xpc because genksyms then fails to generate an CRC for per_cpu____sn_cnodeid_to_nasid because of limitations in the generic genksyms code. Signed-off-by: Hedi Berriche <hedi@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * | microblaze: Fix out_le32() macroSteven J. Magnani2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Trailing semicolon causes compilation involving out_le32() to fail. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| | * | microblaze: Fix cache loop function for cache rangeMichal Simek2010-02-24
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | I create wrong asm code but none test shows that this part of code is wrong. I am not convinces that were good idea to create asm optimized macros for caches. The reason is that there is not optimization with previous code that's why make sense to add old code and do some benchmarking which functions are faster. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | KVM: x86: Kick VCPU outside PIC lock againJan Kiszka2010-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This restores the deferred VCPU kicking before 956f97cf. We need this over -rt as wake_up* requires non-atomic context in this configuration. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Cc: Avi Kivity <avi@redhat.com> Cc: Gleb Natapov <gleb@redhat.com> LKML-Reference: <4B84F466.2080009@siemens.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | rwsem: Make inner lock rawThomas Gleixner2010-02-24
| | | | | | | | | | | | | | | | | | | | | There is no reason to convert the lock protecting rwsems (the ownerless variant) to a sleeping spinlock on -rt. Convert it to raw. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | Merge branch 'master' of ↵Thomas Gleixner2010-02-23
| |\| | | | | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into rt/head
| | * Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2010-02-22
| | |\ | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: MIPS: BCM47xx: Fix 128MB RAM support MIPS: Highmem: Fix build error
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