aboutsummaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAge
* x86: mrst: Remove apb timer read workaroundjacob.jun.pan@linux.intel.com2011-02-18
| | | | | | | | | | | | | | | | | | | | | APB timer current count was unreliable in the earlier silicon, which could result in time going backwards. This problem has been fixed in the current silicon stepping. This patch removes the workaround which was used to check and prevent timer rolling back when APB timer is used as clocksource device. The workaround code was also flawed by potential race condition around the cached read value last_read. Though a fix can be done by assigning last_read to a local variable at the beginning of apbt_read_clocksource(), but this is not necessary anymore. [ tglx: A sane timer on an Intel chip - I can't believe it ] Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Alan Cox <alan@linux.intel.com> LKML-Reference: <1298065374-25532-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86/pci: Remove unused variableSebastian Andrzej Siewior2011-02-18
| | | | | | | | | | |arch/x86/pci/ce4100.c: In function `ce4100_conf_read': |arch/x86/pci/ce4100.c:257:9: warning: unused variable `retval' Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: dirk.brandewie@gmail.com LKML-Reference: <1292600033-12271-16-git-send-email-bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* mrst/vrtc: Avoid using cmos rtc opsFeng Tang2011-02-14
| | | | | | | | | | | | | | If we don't assign Moorestown specific wallclock init and ops function the rtc/persisent clock code will use cmos rtc for access, this will crash Moorestown in that the ioports are not present. Also in vrtc driver, should avoid using cmos access to check UIP status. [feng.tang@intel.com: use set_fixmap_offset_nocache() to simplify code] Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86/platform: Add a wallclock_init func to x86_init.timers opsFeng Tang2011-02-14
| | | | | | | | | | | | Some wall clock devices use MMIO based HW register, this new function will give them a chance to do some initialization work before their get/set_time service get called, which is usually in early kernel boot phase. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86, earlyprintk: Move mrst early console to platform/ and fix a typoFeng Tang2010-12-06
| | | | | | | | | | Move the code to arch/x86/platform/mrst/. Also fix a typo to use the correct config option: ONFIG_EARLY_PRINTK_MRST Signed-off-by: Feng Tang <feng.tang@intel.com> Cc: alan@linux.intel.com LKML-Reference: <1291348298-21263-1-git-send-email-feng.tang@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86, apbt: Setup affinity for apb timers acting as per-cpu timerFeng Tang2010-12-06
| | | | | | | | | | | | Commit a5ef2e70 "x86: Sanitize apb timer interrupt handling" forgot the affinity setup when cleaning up the code, this patch just adds the forgotten part Signed-off-by: Feng Tang <feng.tang@intel.com> Cc: Jacob Pan <jacob.jun.pan@intel.com> Cc: Alan Cox <alan@linux.intel.com> LKML-Reference: <1291348298-21263-2-git-send-email-feng.tang@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* ce4100: Add errata fixes for UART on CE4100Dirk Brandewie2010-12-06
| | | | | | | | | | | | | | | | | | | This patch enables the UART on the CE4100. The UART has a couple of issues that need to be worked around. First the UART is mostly PC compatible except that it is clocked eight times faster than a standard PC so the default configuration provided in arch/x86/include/asm/serial.h needs to be overridden. Second the TX interrupt may not be set correctly all the time. Lastly accessing the UART via I/O space for early_prink() hangs the chip when the IOAPIC is enabled. A custom mem_serial_in() is provided to work around the TX interrupt issue. The configuration issues are dealt with in the call back registered with the 8250 driver via serial8250_set_isa_configurator() Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> LKML-Reference: <1290436128-17958-1-git-send-email-dirk.brandewie@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: platform: Move iris to x86/platform where it belongsThomas Gleixner2010-11-20
| | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86, mrst: Check platform_device_register() return codeVasiliy Kulikov2010-11-18
| | | | | | | | | | platform_device_register() may fail, if so propagate the return code from mrst_device_create(). Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> LKML-Reference: <1290104207-31279-1-git-send-email-segoon@openwall.com> Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* x86/platform: Add Eurobraille/Iris power off supportShérab2010-11-18
| | | | | | | | | | | | The Iris machines from Eurobraille do not have APM or ACPI support to shut themselves down properly. A special I/O sequence is needed to do so. This modle runs this I/O sequence at kernel shutdown when its force parameter is set to 1. Signed-off-by: Shérab <Sebastien.Hinderer@ens-lyon.org> Acked-by: "H. Peter Anvin" <hpa@zytor.com> [ did minor coding style edits ] Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86, mrst: Fix dependencies of "select INTEL_SCU_IPC"Randy Dunlap2010-11-17
| | | | | | | | | | | | | | | | | | commit b9fc71f47 (x86, mrst: The shutdown for MRST requires the SCU IPC mechanism) introduced the following warning: warning: (X86_MRST && PCI && PCI_GOANY && X86_32 && X86_EXTENDED_PLATFORM && X86_IO_APIC) selects INTEL_SCU_IPC which has unmet direct dependencies (X86 && X86_PLATFORM_DEVICES && X86_MRST) which is due to the hierarchical menu structure. Select X86_PLATFORM_DEVICES as well. Originally-from: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LKML-Reference: <20101115101406.77e072ef.randy.dunlap@oracle.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
* x86, mrst: The shutdown for MRST requires the SCU IPC mechanismAlan Cox2010-11-17
| | | | | | | | | Fix the build failure reported by Randy. Reported-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Alan Cox <alan@linux.intel.com> LKML-Reference: <20101115173110.6877.83958.stgit@localhost.localdomain> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: Ce4100: Add reboot_fixup() for CE4100Dirk Brandewie2010-11-11
| | | | | | | | | | This patch adds the CE4100 reboot fixup to reboot_fixups_32.c [ tglx: Moved PCI id to reboot_fixups_32.c ] Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com> LKML-Reference: <5bdcfb4f0206fa721570504e95659a03b815bc5e.1289331834.git.dirk.brandewie@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* ce4100: Add PCI register emulation for CE4100Dirk Brandewie2010-11-11
| | | | | | | | | | | | | | | This patch provides access methods for PCI registers that mis-behave on the CE4100. Each register can be assigned a private init, read and write routine. The exception to this is the bridge device. The bridge device is the only device on bus zero (0) that requires any fixup so it is a special case. [ tglx: minor coding style cleanups, __init annotation and simplification of ce4100_conf_read/write ] Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com> LKML-Reference: <40b6751381c2275dc359db5a17989cce22ad8db7.1289331834.git.dirk.brandewie@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: Add CE4100 platform supportThomas Gleixner2010-11-11
| | | | | | | | | | Add CE4100 platform support. CE4100 needs early setup like moorestown. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> LKML-Reference: <94720fd7f5564a12ebf202cf2c4f4c0d619aab35.1289331834.git.dirk.brandewie@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: mrst: Set vRTC's IRQ to level trigger typeFeng Tang2010-11-11
| | | | | | | | | | | | | | | | | When setting up the mpc_intsrc structure for vRTC's IRQ, we need to set its irqflag to level trigger, otherwise it will be taken as edge triggered and the vRTC IRQ will fire only once, as there is never a EOI issued from the IA core for it. The original code worked in previous kernel. This is because it was configured to level trigger type by luck. It fell into the default PCI trigger category which is level triggered. Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> LKML-Reference: <20101111155019.12924.569.stgit@localhost.localdomain> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: mrst: Add audio driver bindingsVinod Koul2010-11-11
| | | | | | | | | | | This patch adds the sound card bindings for Moorestown (pmic_audio) and the Medfield platform (msic_audio) as IPC devices. This ensures they will be created at the right time. Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> LKML-Reference: <20101110174044.11340.78008.stgit@localhost.localdomain> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* rtc: Add drivers/rtc/rtc-mrst.cFeng Tang2010-11-11
| | | | | | | | | | | | | Provide the standard kernel rtc driver interface on top of the vrtc layer added in the previous patch. Signed-off-by: Feng Tang <feng.tang@intel.com> LKML-Reference: <20101110172911.3311.20593.stgit@localhost.localdomain> [Fixed swapped arguments on IPC] Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> [Cleaned up and the device creation moved to arch/x86/platform] Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: mrst: Add vrtc driver which serves as a wall clock deviceFeng Tang2010-11-11
| | | | | | | | | | | | | | | Moorestown platform doesn't have a m146818 RTC device like traditional x86 PC, but a firmware emulated virtual RTC device(vrtc), which provides some basic RTC functions like get/set time. vrtc serves as the only wall clock device on Moorestown platform. [ tglx: Changed the exports to _GPL ] Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> LKML-Reference: <20101110172837.3311.40483.stgit@localhost.localdomain> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: mrst: Add Moorestown specific reboot/shutdown supportAlek Du2010-11-11
| | | | | | | | | | Moorestowns needs to use a special IPC command to reboot or shutdown the platform. Signed-off-by: Alek Du <alek.du@intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> LKML-Reference: <20101110164928.6365.94243.stgit@localhost.localdomain> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: mrst: Parse SFI timer table for all timer configsJacob Pan2010-11-09
| | | | | | | | | | | | | | | Penwell has APB timer based watchdog timers, it requires platform code to parse SFI MTMR tables in order to claim its timer. This patch will always parse SFI MTMR regardless of system timer configuration choices. Otherwise, SFI MTMR table may not get parsed if running on Medfield with always-on local APIC timers and constant TSC. Watchdog timer driver will then not get a timer to use. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> LKML-Reference: <20101109112800.20591.10802.stgit@localhost.localdomain> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86/mrst: Add SFI platform device parsing codeFeng Tang2010-11-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SFI provides a series of tables. These describe the platform devices present including SPI and I²C devices, as well as various sensors, keypads and other glue as well as interfaces provided via the SCU IPC mechanism (intel_scu_ipc.c) This patch is a merge of the core elements and relevant fixes from the Intel development code by Feng, Alek, myself into a single coherent patch for upstream submission. It provides the needed infrastructure to register I2C, SPI and platform devices described by the tables, as well as handlers for some of the hardware already supported in kernel. The 0.8 firmware also provides GPIO tables. Devices are created at boot time or if they are SCU dependant at the point an SCU is discovered. The existing Linux device mechanisms will then handle the device binding. At an abstract level this is an SFI to Linux device translator. Device/platform specific setup/glue is in this file. This is done so that the drivers for the generic I²C and SPI bus devices remain cross platform as they should. (Updated from RFC version to correct the emc1403 name used by the firmware and a wrongly used #define) Signed-off-by: Alek Du <alek.du@linux.intel.com> LKML-Reference: <20101109112158.20013.6158.stgit@localhost.localdomain> [Clean ups, removal of 0.7 support] Signed-off-by: Feng Tang <feng.tang@linux.intel.com> [Clean ups] Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'rmobile-fixes-for-linus' of ↵Linus Torvalds2010-11-08
|\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 * 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: mmc: sh_mmcif: Convert extern inline to static inline. ARM: mach-shmobile: Allow GPIO chips to register IRQ mappings. ARM: mach-shmobile: fix sh7372 after a recent clock framework rework ARM: mach-shmobile: include drivers/sh/Kconfig ARM: mach-shmobile: ap4evb: Add HDMI sound support ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support ARM: shmobile: remove sh_timer_config clk member
| * Merge branch 'rmobile/core' into rmobile-fixes-for-linusPaul Mundt2010-11-07
| |\
| | * ARM: mach-shmobile: Allow GPIO chips to register IRQ mappings.Paul Mundt2010-11-03
| | | | | | | | | | | | | | | | | | | | | As non-PFC chips are added that may support IRQs, pass through to the generic helper. This follows the the SH change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * ARM: mach-shmobile: fix sh7372 after a recent clock framework reworkGuennadi Liakhovetski2010-11-02
| | | | | | | | | | | | | | | | | | | | | | | | The updated sh clock framework has introduced a .nr_freqs element of struct clk, which has to be initialised with the number of possible frequencies. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * ARM: mach-shmobile: include drivers/sh/KconfigPaul Mundt2010-11-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | Many of the config bit are presently duplicated between the platforms, which will gradually cleaned up through centralization. For the moment we expose some new INTC features through drivers/sh/Kconfig that the ARM platforms presently don't enable, so make it generally available. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * ARM: mach-shmobile: ap4evb: Add HDMI sound supportKuninori Morimoto2010-10-31
| | | | | | | | | | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock supportKuninori Morimoto2010-10-31
| | | | | | | | | | | | | | | Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | |
| \ \
| \ \
| \ \
| \ \
| \ \
| \ \
| \ \
*-------. \ \ Merge branches 'sh/pio-death', 'sh/nommu', 'sh/clkfwk', 'sh/core' and ↵Paul Mundt2010-11-07
|\ \ \ \ \ \ \ | |_|_|_|_|/ / |/| | | | | | | | | | | | | 'sh/intc-extension' into sh-fixes-for-linus
| | | | * | | sh: Simplify phys_addr_mask()/PTE_PHYS_MASK for 29/32-bit.Paul Mundt2010-11-03
| | | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given that __in_29bit_mode() is a constant for the non-PMB case, we can simply use the PMB-facing version of phys_addr_mask() and drop the other variants. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | | * | / sh: make some needlessly global sh7724 clocks staticGuennadi Liakhovetski2010-11-07
| | | | |/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These clocks are currently only used inside one .c file and are not declared in any headers, therefore having them global is useless. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * | | sh: nommu: Support building without an uncached mapping.Paul Mundt2010-11-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that nommu selects 32BIT we run in to the situation where SH-2A supports an uncached identity mapping by way of the BSC, while the SH-2 does not. This provides stubs for the PC manglers and tidies up some of the system*.h mess in the process. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * | | sh: nommu: use 32-bit phys mode.Paul Mundt2010-11-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nommu code has regressed somewhat in that 29BIT gets set for the SH-2/2A configs regardless of the fact that they are really 32BIT sans MMU or PMB. This does a bit of tidying to get nommu properly selecting 32BIT as it was before. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * | | sh: mach-se: Fix up SE7206 no ioport build.Paul Mundt2010-11-03
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | There was a leftover inw() used here that really just wants to be a __raw_readw() instead. Convert it over. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-se: Rip out superfluous 7751 PIO routines.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MRSHPC is wholly unused here, no need to trap it specially. If support is added in the future it can be taken care of via platform data like on the others. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-se: Rip out superfluous 770x PIO routines.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | Platform data takes care of all of these these days, kill them off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-edosk7705: Kill off machtype, consolidate board def.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | Trivial shuffling and tidying. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-edosk7705: update for this century, kill off PIO trapping.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only reason this board needs to do PIO trapping is for ethernet, which happens to follow the same scheme as its bigger brother the edosk7760. With ethernet properly supported through the platform device, we can kill off the left over PIO abortion. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-se: Rip out superfluous 7206 PIO routines.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PIO trapping was only for MRSHPC and the SMC ethernet. Given that the SMC ethernet is already properly handled and that nothing is using the MRSHPC, none of this is needed. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-systemh: Kill off dead board.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code has been untouched since it was merged many years ago, and has severely bitrotted since, suggesting that the board has no real users left. Notice of intent to remove has been sent out over the last few years, with no takers. Kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-snapgear: Kill off machtype, consolidate board def.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the secureedge5410 was ever supported by this code, so make the board specification explicit rather than perpetuating a mach group. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-snapgear: Rip out superfluous PIO routines.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | None of these PIO routines do anything other than basic error checking, get rid of them and use the generic fallbacks. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: mach-microdev: SuperIO-relative ioport mapping.Paul Mundt2010-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The microdev only has to contend with silly PIO mangling on anything within the SuperIO range. As each of the SuperIO modules is already speciail cased, we just shift that logic over to the ioport map. With microdev PCI never being merged (and being fudamentally broken in hardware), and the ethernet chip only doing 16-bit accesses already, there's no need to maintain any of the extra special casing. Kill it all off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | Merge branch 'kvm-updates/2.6.37' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2010-11-05
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'kvm-updates/2.6.37' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: PPC: BookE: Load the lower half of MSR KVM: PPC: BookE: fix sleep with interrupts disabled KVM: PPC: e500: Call kvm_vcpu_uninit() before kvmppc_e500_tlb_uninit(). PPC: KVM: Book E doesn't have __end_interrupts. KVM: x86: Issue smp_call_function_many with preemption disabled KVM: x86: fix information leak to userland KVM: PPC: fix information leak to userland KVM: MMU: fix rmap_remove on non present sptes KVM: Write protect memory after slot swap
| * | | | KVM: PPC: BookE: Load the lower half of MSRScott Wood2010-11-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was preventing the guest from setting any bits in the hardware MSR which aren't forced on, such as MSR[SPE]. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | | | KVM: PPC: BookE: fix sleep with interrupts disabledScott Wood2010-11-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not legal to call mutex_lock() with interrupts disabled. This will assert with debug checks enabled. If there's a real need to disable interrupts here, it could be done after the mutex is acquired -- but I don't see why it's needed at all. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | | | KVM: PPC: e500: Call kvm_vcpu_uninit() before kvmppc_e500_tlb_uninit().Scott Wood2010-11-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VCPU uninit calls some TLB functions, and the TLB uninit function frees the memory used by them. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | | | PPC: KVM: Book E doesn't have __end_interrupts.Scott Wood2010-11-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix an unresolved symbol with CONFIG_KVM_GUEST plus CONFIG_RELOCATABLE on Book E. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | | | KVM: x86: Issue smp_call_function_many with preemption disabledJan Kiszka2010-11-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | smp_call_function_many is specified to be called only with preemption disabled. Fulfill this requirement. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-19 06:34:39 -0500