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* MIPS: ath79: add initial support for the Atheros PB44 reference boardGabor Juhos2011-01-18
| | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1950/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: utilize the MIPS multi-machine supportGabor Juhos2011-01-18
| | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1949/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: ath79: add GPIOLIB supportGabor Juhos2011-01-18
| | | | | | | | | | | | | | | This patch implements generic GPIO routines for the built-in GPIO controllers of the Atheros AR71XX/AR724X/AR913X SoCs. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1948/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCsGabor Juhos2011-01-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds initial support for various Atheros SoCs based on the MIPS 24Kc core. The following models are supported at the moment: - AR7130 - AR7141 - AR7161 - AR9130 - AR9132 - AR7240 - AR7241 - AR7242 The current patch contains minimal support only, but the resulting kernel can boot into user-space with using of an initramfs image on various boards which are using these SoCs. Support for more built-in devices and individual boards will be implemented in further patches. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1947/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: jump label: Add MIPS support.David Daney2011-01-18
| | | | | | | | | | | | | | In order not to be left behind, we add jump label support for MIPS. Tested on 64-bit big endian (Octeon), and 32-bit little endian (malta/qemu). Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Jason Baron <jbaron@redhat.com> Patchwork: https://patchwork.linux-mips.org/patch/1923/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use WARN() in uasm for better diagnostics.David Daney2011-01-18
| | | | | | | | | | | | | | On the off chance that uasm ever warns about overflow, there is no way to know what the offending instruction is. Change the printks to WARNs, so we can get a nice stack trace. It has the added benefit of being much more noticeable than the short single line warning message, so is less likely to be ignored. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1905/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Optimize TLB handlers for Octeon CPUsDavid Daney2011-01-18
| | | | | | | | | | Octeon can use scratch registers in the TLB handlers. Octeon II can use LDX instructions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1904/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add LDX and LWX instructions to uasm.David Daney2011-01-18
| | | | | | | | | Needed by Octeon II optimized TLB handlers. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Pachwork: https://patchwork.linux-mips.org/patch/1903/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use BBIT instructions in TLB handlersDavid Daney2011-01-18
| | | | | | | | | | | If the CPU supports BBIT0 and BBIT1, use them in TLB handlers as they are more efficient than an AND followed by an branch and then restoring the clobbered register. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1873/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Declare uasm bbit0 and bbit1 functions.David Daney2011-01-18
| | | | | | | | | | these are already defined, but declaring them allow them to be used outside of uasm.c. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1872/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use C0_KScratch (if present) to hold PGD pointer.David Daney2011-01-18
| | | | | | | | | | Decide at runtime to use either Context or KScratch to hold the PGD pointer. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1876/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add DINSM to uasm.David Daney2011-01-18
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1875/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Probe for presence of KScratch registers.David Daney2011-01-18
| | | | | | | | | Probe c0_config4 for KScratch registers and report them in /proc/cpuinfo. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1877/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add generic support for multiple machines within a single kernelGabor Juhos2011-01-18
| | | | | | | | | | | | | | | | | | This patch adds a generic solution to support multiple machines based on a given SoC within a single kernel image. It is implemented already for several other architectures but MIPS has no generic support for that yet. [Ralf: This competes with DT but DT is a much more complex solution and this code has been used by OpenWRT for a long time so for now DT is a bad reason to stop the merge but longer term this should be migrated to DT.] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: kaloz@openwrt.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1814/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use printf extension %pR for struct resourceJoe Perches2011-01-18
| | | | | | | | | | | Using %pR standardizes the struct resource output. Signed-off-by: Joe Perches <joe@perches.com> To: Jiri Kosina <trivial@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1772/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Sibyte: Use vzalloc in sbbus profilerJoe Perches2011-01-18
| | | | | | | | | Signed-off-by: Joe Perches <joe@perches.com> To: Jiri Kosina <trivial@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1756/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
*---. Merge branches 'core-fixes-for-linus', 'x86-fixes-for-linus', ↵Linus Torvalds2011-01-15
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'timers-fixes-for-linus' and 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'core-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: rcu: avoid pointless blocked-task warnings rcu: demote SRCU_SYNCHRONIZE_DELAY from kernel-parameter status rtmutex: Fix comment about why new_owner can be NULL in wake_futex_pi() * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, olpc: Add missing Kconfig dependencies x86, mrst: Set correct APB timer IRQ affinity for secondary cpu x86: tsc: Fix calibration refinement conditionals to avoid divide by zero x86, ia64, acpi: Clean up x86-ism in drivers/acpi/numa.c * 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: timekeeping: Make local variables static time: Rename misnamed minsec argument of clocks_calc_mult_shift() * 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: tracing: Remove syscall_exit_fields tracing: Only process module tracepoints once perf record: Add "nodelay" mode, disabled by default perf sched: Fix list of events, dropping unsupported ':r' modifier Revert "perf tools: Emit clearer message for sys_perf_event_open ENOENT return" perf top: Fix annotate segv perf evsel: Fix order of event list deletion
| | * | x86, olpc: Add missing Kconfig dependenciesH. Peter Anvin2011-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OLPC uses select for OLPC_OPENFIRMWARE, which means OLPC has to enforce the dependencies for OLPC_OPENFIRMWARE. Make sure it does so. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: Daniel Drake <dsd@laptop.org> Cc: Andres Salomon <dilinger@queued.net> Cc: Grant Likely <grant.likely@secretlab.ca> LKML-Reference: <20100923162846.D8D409D401B@zog.reactivated.net> Cc: <stable@kernel.org> 2.6.37
| | * | x86, mrst: Set correct APB timer IRQ affinity for secondary cpuJacob Pan2011-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Offlining the secondary CPU causes the timer irq affinity to be set to CPU 0. When the secondary CPU is back online again, the wrong irq affinity will be used. This patch ensures secondary per CPU timer always has the correct IRQ affinity when enabled. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1294963604-18111-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: <stable@kernel.org> 2.6.37
| | * | x86: tsc: Fix calibration refinement conditionals to avoid divide by zeroJohn Stultz2011-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Konrad Wilk reported that the new delayed calibration crashes with a divide by zero on Xen. The reason is that Xen sets the pmtimer address, but reading from it returns 0xffffff. That results in the ref_start and ref_stop value being the same, so the delta is zero which causes the divide by zero later in the calculation. The conditional (!hpet && !ref_start && !ref_stop) which sanity checks the calibration reference values doesn't really make sense. If the refs are null, but hpet is on, we still want to break out. The div by zero would be possible to trigger by chance if both reads from the hardware provided the exact same value (due to hardware wrapping). So checking if both the ref values are the same should handle if we don't have hardware (both null) or if they are the same value (either by invalid hardware, or by chance), avoiding the div by zero issue. [ tglx: Applied the same fix to native_calibrate_tsc() where this check was copied from ] Reported-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: John Stultz <johnstul@us.ibm.com> LKML-Reference: <1295024788-15619-1-git-send-email-johnstul@us.ibm.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-01-15
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits) ARM: pxa: fix building issue of missing physmap.h ARM: mmp: PXA910 drive strength FAST using wrong value ARM: mmp: MMP2 drive strength FAST using wrong value ARM: pxa: fix recursive calls in pxa_low_gpio_chip AT91: Support for gsia18s board AT91: Acme Systems FOX Board G20 board files AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h ARM: pxa: fix suspend/resume array index miscalculation ARM: pxa: use cpu_has_ipr() consistently in irq.c ARM: pxa: remove unused variable in clock-pxa3xx.c ARM: pxa: fix warning in zeus.c ARM: sa1111: fix typo in sa1111_retrigger_lowirq() ARM mxs: clkdev related compile fixes ARM i.MX mx31_3ds: Fix MC13783 regulator names ARM: plat-stmp3xxx: irq_data conversion. ARM: plat-spear: irq_data conversion. ARM: plat-orion: irq_data conversion. ARM: plat-omap: irq_data conversion. ARM: plat-nomadik: irq_data conversion. ARM: plat-mxc: irq_data conversion. ... Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert Buytenhek's irq_data conversion clashing with some omap irq updates)
| * \ \ \ Merge branch 'for-rmk' of ↵Russell King2011-01-15
| |\ \ \ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable
| | * | | | ARM: S5PV310: Add Support System MMUDonguk Ryu2011-01-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support System MMU for S5PV310 and S5PC210. Signed-off-by: Donguk Ryu <du.ryu@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> [kgene.kim@samsung.com: changed SYSMMU config name] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | ARM: S5P: Add Support System MMUDonguk Ryu2011-01-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support System MMU which supports address transition from virtual address to physical address. Basically, each hardware block is connected System MMU block can use directly vitrual address when it accesses physical memory not using physical address. Signed-off-by: Donguk Ryu <du.ryu@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> [kgene.kim@samsung.com: removed useless codes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | ARM: SAMSUNG: Add support for clock debugging through debug-fs interfaceAmit Daniel Kachhap2011-01-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for clock information exposed to debug-fs interface. Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> [kgene.kim@samsung.com: removed useless empty lines] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | Merge branch 'next-s3c24xx' into for-nextKukjin Kim2011-01-06
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| | | * | | | ARM: S3C24XX: Add support UART3 for S3C2443 and S3C2416Abhilash Kesavan2011-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both S3C2443 and S3C2416 support 4 UART channels, this patch adds support for the missing uart channel. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | ARM: SAMSUNG: Don't export __init functions to modulesYauhen Kharuzhy2011-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are few functions marked as __init, but exported to modules in devices declaration files. s3c_nand_set_platdata() and s3c24xx_ts_set_platdata() are used only by boards init code now, so remove EXPORT_SYMBOL() for them. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | ARM: S3C2443: Implement GPIO pull-up/down configuration methodsYauhen Kharuzhy2011-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | S3C2443 has two-bits pull-up/pull-down configuration fields in GPIO registers, but values are differ from other SoCs with two-bits configuration. gpio-cfg-helpers.h already has prototypes for s3c2443-style pull-up/down methods, so implement them. Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | ARM: S3C2416: Add support of SD/MMC card detect on SMDK2416Yauhen Kharuzhy2011-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable card detect by GPIO pin on hsmmc1 device (SD0 on SMDK2416 board) and enable card polling on hsmmc0 (SD1). Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | ARM: S3C2416: Add platform helpers for setup SDHCIYauhen Kharuzhy2011-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Samsung S3C2416 has two SDHCI controllers compatible with other Samsung's SoCs (S3C64XX, S5PC100 etc...). Add required platform setup code that the devices can be used with sdhci-s3c driver. Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> [kgene.kim@samsung.com: change to __raw_{readl,writel} from {readl,writel}] [kgene.kim@samsung.com: build error fixes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | ARM: S3C24XX: Add address map and clock definitions for HSMMC0Yauhen Kharuzhy2011-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define maps for HSMMC devices. S3C2443 has one HSMMC device with base address 0x4A800000. S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000. So suppose that S3C2443 has only HSMMC1. Define clock for hsmmc0 device and register it. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | Merge branch 'dev/cleanup-clocks' into for-nextKukjin Kim2011-01-04
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| | | * | | | | ARM: S5PV310: Tidy init+disable clock usage and s3c24xx_register_clocks cleanupKukjin Kim2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using and cleanups the return of s3c24xx_register_clocks() because it includes it. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | | ARM: S5PV210: Tidy init+disable clock usage and s3c24xx_register_clocks cleanupKukjin Kim2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using and cleanups the return of s3c24xx_register_clocks() because it includes it. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | | ARM: S5PC100: Tidy register and disable clock usageKukjin Kim2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | | ARM: S5P6450: Tidy register and disable clock usageKukjin Kim2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | | ARM: S5P6442: Tidy register and disable clock usageKukjin Kim2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | | ARM: S5P6440: Tidy register and disable clock usageKukjin Kim2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | | ARM: S3C64XX: Tidy register and disable clock usageKukjin Kim2011-01-04
| | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | Merge branch 'next-s3c64xx' into for-nextKukjin Kim2011-01-03
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| | | * | | | | ARM: S3C64XX: Clear DMA_HALT upon startJassi Brar2011-01-03
| | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The stop function sets the DMA_HALT bit, which prevents the DMA transfer to resume after stop, for example during audio PAUSE/PLAY cycle. Clear the HALT bit during start. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | Merge branch 'next-samsung-irq_data' into for-nextKukjin Kim2011-01-03
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| | | * | | | | ARM: SAMSUNG: some GENERIC_HARDIRQS_NO_DEPRECATED build fixesLennert Buytenhek2011-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When GENERIC_HARDIRQS_NO_DEPRECATED is enabled, a number of struct irq_desc members stop being directly accessible, and need to be accessed via the irq_data struct instead -- this patch fixes up the plat-samsung sites that still access those members directly. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | | ARM: S5P: irq_data conversionLennert Buytenhek2011-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | * | | | | ARM: S3C24XX: irq_data conversionLennert Buytenhek2011-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> [kgene.kim@samsung.com: coding-style fixes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | | Merge branch 'next-s5pv310' into for-nextKukjin Kim2011-01-03
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-s5pv310/Makefile
| | | * \ \ \ \ \ Merge branch 'dev/s5pv310-cpufreq' into next-s5pv310Kukjin Kim2011-01-03
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| | | | * | | | | | ARM: S5PV310: Update Kconfig and Makefile for supporting CPUFREQSunyoung Kang2010-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds ARCH_HAS_CPUFREQ in Kconfig of ARCH_S5PV310 and updates Makefile for supporting build S5PV310 CPUFREQ driver. Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | | | * | | | | | ARM: S5PV310: Add FOUT APLL get rate functionJaecheol Lee2010-12-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FOUT APLL clock is used as a source of ARM core clock. So we need that the clock source can be changed dynamically by using CPUFREQ driver. This patch can give correct frequency when calling clk_get_rate() function. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Sangwook Ju <sw.ju@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 22:18:35 -0500