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* [POWERPC] Compilation fixes for ppc4xx PCI-less configsWojtek Kaniewski2006-12-04
| | | | | | | | | | | Fix compilation without PCI support for Bubinga, CPCI405 and EP405. bios_fixup() for these boards uses functions available only with CONFIG_PCI, so linker fails. Signed-off-by: Wojtek Kaniewski <wojtekka@toxygen.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Book-E reg MCSR msg misquotednkalmala2006-12-04
| | | | | | | | | | PPC/booke reg MCSR value misquoted Signed-off-by: nkalmala <nkalmala@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make soft_enabled irqs preempt safeHugh Dickins2006-12-04
| | | | | | | | | Rewrite local_get_flags and local_irq_disable to use r13 explicitly, to avoid the risk that gcc will split get_paca()->soft_enabled into a sequence unsafe against preemption. Similar care in local_irq_restore. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix slb.c for combined buildStephen Rothwell2006-12-04
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix xmon.c for combined buildStephen Rothwell2006-12-04
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix time.c for combined buildStephen Rothwell2006-12-04
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix sysfs.c for combined buildStephen Rothwell2006-12-04
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix irq.c for combined buildStephen Rothwell2006-12-04
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Merge 32 and 64 bits asm-powerpc/io.hBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | powerpc: Merge 32 and 64 bits asm-powerpc/io.h The rework on io.h done for the new hookable accessors made it easier, so I just finished the work and merged 32 and 64 bits io.h for arch/powerpc. arch/ppc still uses the old version in asm-ppc, there is just too much gunk in there that I really can't be bothered trying to cleanup. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove ioremap64 and fixup_bigphys_addrBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | | In order to suppose platforms with devices above 4Gb on 32 bits platforms with a >32 bits physical address space, we used to have a special ioremap64 along with a fixup routine fixup_bigphys_addr. This shouldn't be necessary anymore as struct resource now supports 64 bits addresses even on 32 bits archs. This patch enables that option when CONFIG_PHYS_64BIT is set and removes ioremap64 and fixup_bigphys_addr. This is a preliminary work for the upcoming merge of 32 and 64 bits io.h Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Cell iommu supportJeremy Kerr2006-12-04
| | | | | | | | | | | | | | This patch adds full cell iommu support (and iommu disabled mode). It implements mapping/unmapping of iommu pages on demand using the standard powerpc iommu framework. It also supports running with iommu disabled for machines with less than 2GB of memory. (The default is off in that case, though it can be forced on with the kernel command line option iommu=force). Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make cell use direct DMA opsBenjamin Herrenschmidt2006-12-04
| | | | | | | | Now that the direct DMA ops supports an offset, we use that instead of defining our own. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make direct DMA use node local allocationsBenjamin Herrenschmidt2006-12-04
| | | | | | | | | This patch makes dma_alloc_coherent() use node local allocation when using the direct DMA ops. The node is obtained from the new device extension. If no such extension is present, the current node is used. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add an optional offset to direct DMA on 64 bitsBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | This patch adds an optional global offset that can be added to DMA addresses when using the direct DMA operations. That brings it a step closer to the 32 bits direct DMA operations, and makes it useable on Cell when the MMU is disabled and we are using a spider southbridge. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Cell "Spider" MMIO workaroundsBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | This patch implements a workaround for a Spider PCI host bridge bug where it doesn't enforce some of the PCI ordering rules unless some manual manipulation of a special register is done. In order to be fully compliant with the PCI spec, I do this on every MMIO read operation. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bitsBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the way iSeries hooks on PCI IO operations (both MMIO and PIO) and provides a generic way for other platforms to do so (we have need to do that for various other platforms). While reworking the IO ops, I ended up doing some spring cleaning in io.h and eeh.h which I might want to split into 2 or 3 patches (among others, eeh.h had a lot of useless stuff in it). A side effect is that EEH for PIO should work now (it used to pass IO ports down to the eeh address check functions which is bogus). Also, new are MMIO "repeat" ops, which other archs like ARM already had, and that we have too now: readsb, readsw, readsl, writesb, writesw, writesl. In the long run, I might also make EEH use the hooks instead of wrapping at the toplevel, which would make things even cleaner and relegate EEH completely in platforms/iseries, but we have to measure the performance impact there (though it's really only on MMIO reads) Since I also need to hook on ioremap, I shuffled the functions a bit there. I introduced ioremap_flags() to use by drivers who want to pass explicit flags to ioremap (and it can be hooked). The old __ioremap() is still there as a low level and cannot be hooked, thus drivers who use it should migrate unless they know they want the low level version. The patch "arch provides generic iomap missing accessors" (should be number 4 in this series) is a pre-requisite to provide full iomap API support with this patch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Cell fixup DMA offset for new southbridgeBenjamin Herrenschmidt2006-12-04
| | | | | | | | | This patch makes the Cell DMA code work on both the Spider and the Axon south bridges by turning cell_dma_valid into a variable instead of a constant. This is a temporary patch until we have full iommu support. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Generic OF platform driver for PCI host bridges.Benjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | | | | When enabled in Kconfig, it will pick up any of_platform_device matching it's match list (currently type "pci", "pcix", "pcie", or "ht" and setup a PHB for it. Platform must provide a ppc_md.pci_setup_phb() for it to work (for doing the necessary initialisations specific to a given PHB like setting up the config space ops). It's currently only available on 64 bits as the 32 bits PCI code can't quite cope with it in it's current form. I will fix that later. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add "parent" struct device for PCI host bridgesBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | Add a "parent" struct device to our PCI host bridge data structure so that PCI can be rooted off another device in sysfs. Note that arch/ppc doesn't use it, only arch/powerpc, though it's available for both 32 and 64 bits. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Resolve the BUID for RTAS PCI config space accessesBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | The BUID is the first entry of a PCI host bridge "reg" property. Now that PCI busses can be anywhere in the device-tree, we need to fully translate the value there to a CPU physical address before we can use it with RTAS. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Resolve the parent address of a PCI bus rangeBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | When parsing the OF "ranges" properties of PCI host busses to determine the mapping of a PCI bus, we need to translate the "parent" address using the prom_parse.c routines in order to obtain a CPU physical address. This wasn't necessary while PCI busses were always at the root of the device-tree but this is no longer the case on Cell where they can be anywhere in the tree. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add DMA ops support for of_platform_device to CellBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | This patch adds a bus device notifier to the of_platform bus type on cell to setup the DMA operations for of_platform_devices. We currently use the PCI operations as Cell use a special version of them that happens to be suitable for our needs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Refactor 64 bits DMA operationsBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | | | | This patch completely refactors DMA operations for 64 bits powerpc. 32 bits is untouched for now. We use the new dev_archdata structure to add the dma operations pointer and associated data to struct device. While at it, we also add the OF node pointer and numa node. In the future, we might want to look into merging that with pci_dn as well. The old vio, pci-iommu and pci-direct DMA ops are gone. They are now replaced by a set of generic iommu and direct DMA ops (non PCI specific) that can be used by bus types. The toplevel implementation is now inline. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Hook of_platform_bus_probe with cellBenjamin Herrenschmidt2006-12-04
| | | | | | | | Hook up of_platform_bus_probe with the cell platform in order to publish the non-PCI devices in the device-tree of cell blades as of_platform_device(s) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Souped-up of_platform_device supportBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | This patch first splits of_device.c and of_platform.c, the later containing the bits relative to of_platform_device's. On the "breaks" side of things, drivers uisng of_platform_device(s) need to include asm/of_platform.h now and of_(un)register_driver is now of_(un)register_platform_driver. In addition to a few utility functions to locate of_platform_device(s), the main new addition is of_platform_bus_probe() which allows the platform code to trigger an automatic creation of of_platform_devices for a whole tree of devices. The function acts based on the type of the various "parent" devices encountered from a provided root, using either a default known list of bus types that can be "probed" or a passed-in list. It will only register devices on busses matching that list, which mean that typically, it will not register PCI devices, as expected (since they will be picked up by the PCI layer). This will be used by Cell platforms using 4xx-type IOs in the Axon bridge and can be used by any embedded-type device as well. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Native cell support for MPIC in southbridgeBenjamin Herrenschmidt2006-12-04
| | | | | | | | Add support for southbridges using the MPIC interrupt controller to the native cell platforms. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Improve MPIC driver auto-configuration from DTBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | This patch applies on top of the MPIC DCR support. It makes the MPIC driver capable of a lot more auto-configuration based on the device-tree, for example, it can retreive it's own physical address if not passed as an argument, find out if it's DCR or MMIO mapped, and set the BIG_ENDIAN flag automatically in the presence of a "big-endian" property in the device-tree node. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Support for DCR based MPICBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | | | This patch implements support for DCR based MPIC implementations. Such implementations have the MPIC_USES_DCR flag set and don't use the phys_addr argument of mpic_alloc (they require a valid dcr mapping in the device node) This version of the patch can use a little bif of cleanup still (I can probably consolidate rb->dbase/doff, at least once I'm sure on how the hardware is actually supposed to work vs. possible simulator issues) and it should be possible to build a DCR-only version of the driver. I need to cleanup a bit the CONFIG_* handling for that and probably introduce CONFIG_MPIC_MMIO and CONFIG_MPIC_DCR. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Generic DCR infrastructureBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | This patch adds new dcr_map/dcr_read/dcr_write accessors for DCRs that can be used by drivers to transparently address either native DCRs or memory mapped DCRs. The implementation for memory mapped DCRs is done after the binding being currently worked on for SLOF and the Axon chipset. This patch enables it for the cell native platform Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove ppc_md.pci_map_irq & ppc_swizzle for ARCH=powerpcBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | These were inherited from ARCH=ppc, but are not needed since parsing of interrupts should be done via the of_* functions (who can do swizzling). If we ever need to do non-standard swizzling on bridges without a device-node, then we might add back a slightly different version of ppc_md.pci_swizzle but for now, that is not the case. I removed the couple of calls for these in 83xx. If that breaks something, then there is a problem with the device-tree on these. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make pci_read_irq_line the defaultBenjamin Herrenschmidt2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the way IRQs are fixed up on PCI for arch powerpc. It makes pci_read_irq_line() called by default in the PCI code for devices that are probed, and add an optional per-device fixup in ppc_md for platforms that really need to correct what they obtain from pci_read_irq_line(). It also removes ppc_md.irq_bus_setup which was only used by pSeries and should not be needed anymore. I've also removed the pSeries s7a workaround as it can't work with the current interrupt code anyway. I'm trying to get one of these machines working so I can test a proper fix for that problem. I also haven't updated the old-style fixup code from 85xx_cds.c because it's actually buggy :) It assigns pci_dev->irq hard coded numbers which is no good with the new IRQ mapping code. It should at least use irq_create_mapping(NULL, hard_coded_number); and possibly also set_irq_type() to set them as level low. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'linux-2.6' into for-linusPaul Mackerras2006-12-03
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| * [NET]: X86_64 checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | * sanitize prototypes, annotate * usual ntohs->shift Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: V850 checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | * sanitize prototypes, annotate * collapse csum_partial_copy * usual ntohs->shift Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: UML checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | | | * sanitize prototypes, annotate * kill csum_partial_copy_fromuser * kill shift-by-16 in checksum calculations * ntohs->shift in checksum calculations Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: SH64 checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | | | * sanitize prototypes, annotate * collapse csum_partial_copy * kill csum_partial_copy_fromuser * ntohs->shift in checksum calculation Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: PARISC checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | * sanitized prototypes, annotated * kill shift-by-16 in checksum calculation Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: MIPS checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | * sanitize prototypes, annotate * kill shift-by-16 in checksum calculations * htons->shift in l-e checksum calculations Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: M68Knommu checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | * sanitize prototypes, annotated * collapsed csum_partial_copy() Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: M68K checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | * sanitize prototypes, annotate Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: M32R checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | * sanitize prototypes, annotate * ntohs -> shift in checksum calculations in l-e case * kill shift-by-16 in checksum calculations Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: IA64 checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | | | * sanitize prototypes, annotate * ntohs -> shift in checksum calculations * kill access_ok() in csum_partial_copy_from_user * collapse do_csum_partial_copy_from_user Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: H8300 checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | | | * sanitize prototypes and annotate * collapse csum_partial_copy NB: csum_partial() is almost certainly still buggy. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: FRV checksum annotations.Al Viro2006-12-03
| | | | | | | | | | | | | | | | * sanitize prototypes and annotate * collapse csum_partial_copy Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: Cris checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | * sanitize prototypes and annotate * kill cast-as-lvalue abuses in csum_partial() * usual ntohs-equals-shift for checksum purposes Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: Alpha checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | | | | | | | | | | | | | | | | * sanitize prototypes and annotate * kill useless access_ok() in csum_partial_copy_from_user() (the only caller checks it already). * do_csum_partial_copy_from_user() is not needed now * replace htons(len) with len << 8 - they are the same wrt checksums on little-endian. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * [NET]: Kill direct includes of asm/checksum.hAl Viro2006-12-03
| | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * Merge branch 'release' of ↵Linus Torvalds2006-12-02
| |\ | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6 * 'release' of master.kernel.org:/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6: Revert "ACPI: SCI interrupt source override"
| | * Revert "ACPI: SCI interrupt source override"Len Brown2006-12-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 281ea49b0c294649a6de47a6f8fbe5611137726b, which broke ACPI Interrupt source overrides that move the SCI from one IRQ in PIC mode to another in IOAPIC mode. If the SCI shared an interrupt line with another device, this would result in a "irq 18: nobody cared" type failure. http://bugzilla.kernel.org/show_bug.cgi?id=7601 Signed-off-by: Len Brown <len.brown@intel.com>
| * | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2006-12-01
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits) [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case. [MIPS] Remove unused definition of cpu_to_lelongp() [MIPS] Remove userspace proofing from <asm/bitops.h>. [MIPS] Remove old junk left from old atomic_lock. [MIPS] Use conditional traps for BUG_ON on MIPS II and better. [MIPS] mips HPT cleanup: make clocksource_mips public [MIPS] do_IRQ cleanup [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. [MIPS] Remove redundant r4k_blast_icache() calls [MIPS] Work around bogus gcc warnings. [MIPS] Fix double inclusions [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq [MIPS] IRQ cleanups [MIPS] mips hpt cleanup: get rid of mips_hpt_init [MIPS] PB1200: Remove duplicate definitions [MIPS] Fix alignment hole in struct cache_desc; shrink struct. [MIPS] Oprofile: kernel support for the R10000. [MIPS] Remove unused R10000 performance counter definitions. [MIPS] Add support for kexec [MIPS] Don't print presence of WAIT instruction on bootup. ...
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